From: Alexander Monakov <amonakov@ispras.ru>
To: Jeff Law <jeffreyalaw@gmail.com>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>,
Vineet Gupta <vineetg@rivosinc.com>,
gcc-patches@gcc.gnu.org, Kito Cheng <kito.cheng@gmail.com>,
Jojo R <rjiejie@linux.alibaba.com>
Subject: Re: [PATCH] riscv: implement TARGET_MODE_REP_EXTENDED
Date: Mon, 21 Nov 2022 18:33:48 +0300 (MSK) [thread overview]
Message-ID: <b0993e1-2b14-9d53-c4c-f2e28c4a3fee@ispras.ru> (raw)
In-Reply-To: <b7ef7fad-00a3-aa60-26b8-258945ec078b@gmail.com>
On Mon, 21 Nov 2022, Jeff Law wrote:
> They're writing assembly code -- in my book that means they'd better have a
> pretty good understanding of the architecture, its limitations and quirks.
That GCC ties together optimization and inline asm interface via its internal
TARGET_MODE_REP_EXTENDED macro is not a quirk of the RISC-V architecture.
It's a quirk of GCC.
Alexander
prev parent reply other threads:[~2022-11-21 15:33 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-05 21:44 Philipp Tomsich
2022-09-06 11:39 ` Alexander Monakov
2022-09-16 23:48 ` Jeff Law
2022-09-17 7:59 ` Palmer Dabbelt
2022-11-04 23:00 ` Philipp Tomsich
2022-11-05 6:16 ` [PATCH] [PHIOPT] Add A ? B + CST : B match and simplify optimizations Zhongyunde
2022-11-05 6:34 ` Andrew Pinski
2022-11-05 9:03 ` Zhongyunde
2022-11-08 14:58 ` Richard Biener
2022-11-08 15:51 ` 钟云德
2022-11-09 8:00 ` Richard Biener
2022-11-07 13:55 ` [PATCH] riscv: implement TARGET_MODE_REP_EXTENDED Alexander Monakov
2022-11-08 23:45 ` Philipp Tomsich
2022-11-09 17:21 ` Alexander Monakov
2022-11-20 16:09 ` Jeff Law
2022-11-21 13:49 ` Alexander Monakov
2022-11-21 14:56 ` Jeff Law
2022-11-21 15:33 ` Alexander Monakov [this message]
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