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* [PATCH] amdgcn: Fix instruction generation for exp2 and log2 operations
@ 2022-11-03 17:47 Kwok Cheung Yeung
  2022-11-03 18:01 ` Andrew Stubbs
  0 siblings, 1 reply; 2+ messages in thread
From: Kwok Cheung Yeung @ 2022-11-03 17:47 UTC (permalink / raw)
  To: gcc-patches, Andrew Stubbs

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Hello

This patch fixes a bug introduced in a previous patch adding support for 
generating native instructions for the exp2 and log2 patterns. The 
problem is that the name of the instruction implementing the exp2 
operation is v_exp (and not v_exp2), and similarly log2 is implemented 
by v_log, so we cannot use the RTL name of the operation when outputting 
the instruction.

I've added an extra iterator for the GCN operation name and used that 
when outputting instructions instead. I have also added an extra 
testcase for GCN that exercises this case.

Okay for trunk?

Thanks

Kwok

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From c0e74e01743cd3a3e0dcb2a071396e3a5751ff4c Mon Sep 17 00:00:00 2001
From: Kwok Cheung Yeung <kcy@codesourcery.com>
Date: Thu, 3 Nov 2022 17:19:11 +0000
Subject: [PATCH] amdgcn: Fix instruction generation for exp2 and log2
 operations

The GCN instructions for the exp2 and log2 operations are v_exp_* and v_log_*
respectively, which unfortunately do not line up with the RTL naming
convention.  To deal with this, a new set of int attributes is now used when
generating the assembly for these instructions.

2022-11-03  Kwok Cheung Yeung  <kcy@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md (math_unop_insn): New attribute.
	(<math_unop><mode>2, <math_unop><mode>2<exec>, <math_unop><mode>2,
	<math_unop><mode>2<exec>, *<math_unop><mode>2_insn,
	*<math_unop><mode>2<exec>_insn): Use math_unop_insn to generate
	assembler output.

	gcc/testsuite/
	* gcc.target/gcn/unsafe-math-1.c: New.
---
 gcc/config/gcn/gcn-valu.md                   | 20 ++++++++++++++------
 gcc/testsuite/gcc.target/gcn/unsafe-math-1.c | 10 ++++++++++
 2 files changed, 24 insertions(+), 6 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/gcn/unsafe-math-1.c

diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 3b619512e13..9f4353831bd 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -2549,13 +2549,21 @@
    (UNSPEC_SIN "sin")
    (UNSPEC_COS "cos")])
 
+(define_int_attr math_unop_insn
+  [(UNSPEC_FLOOR "floor")
+   (UNSPEC_CEIL "ceil")
+   (UNSPEC_EXP2 "exp")
+   (UNSPEC_LOG2 "log")
+   (UNSPEC_SIN "sin")
+   (UNSPEC_COS "cos")])
+
 (define_insn "<math_unop><mode>2"
   [(set (match_operand:FP 0 "register_operand"  "=  v")
 	(unspec:FP
 	  [(match_operand:FP 1 "gcn_alu_operand" "vSvB")]
 	  MATH_UNOP_1OR2REG))]
   ""
-  "v_<math_unop>%i0\t%0, %1"
+  "v_<math_unop_insn>%i0\t%0, %1"
   [(set_attr "type" "vop1")
    (set_attr "length" "8")])
 
@@ -2565,7 +2573,7 @@
 	  [(match_operand:V_FP 1 "gcn_alu_operand" "vSvB")]
 	  MATH_UNOP_1OR2REG))]
   ""
-  "v_<math_unop>%i0\t%0, %1"
+  "v_<math_unop_insn>%i0\t%0, %1"
   [(set_attr "type" "vop1")
    (set_attr "length" "8")])
 
@@ -2575,7 +2583,7 @@
 	  [(match_operand:FP_1REG 1 "gcn_alu_operand" "vSvB")]
 	  MATH_UNOP_1REG))]
   "flag_unsafe_math_optimizations"
-  "v_<math_unop>%i0\t%0, %1"
+  "v_<math_unop_insn>%i0\t%0, %1"
   [(set_attr "type" "vop1")
    (set_attr "length" "8")])
 
@@ -2585,7 +2593,7 @@
 	  [(match_operand:V_FP_1REG 1 "gcn_alu_operand" "vSvB")]
 	  MATH_UNOP_1REG))]
   "flag_unsafe_math_optimizations"
-  "v_<math_unop>%i0\t%0, %1"
+  "v_<math_unop_insn>%i0\t%0, %1"
   [(set_attr "type" "vop1")
    (set_attr "length" "8")])
 
@@ -2595,7 +2603,7 @@
 	  [(match_operand:FP_1REG 1 "gcn_alu_operand" "vSvB")]
 	  MATH_UNOP_TRIG))]
   "flag_unsafe_math_optimizations"
-  "v_<math_unop>%i0\t%0, %1"
+  "v_<math_unop_insn>%i0\t%0, %1"
   [(set_attr "type" "vop1")
    (set_attr "length" "8")])
 
@@ -2605,7 +2613,7 @@
 	  [(match_operand:V_FP_1REG 1 "gcn_alu_operand" "vSvB")]
 	  MATH_UNOP_TRIG))]
   "flag_unsafe_math_optimizations"
-  "v_<math_unop>%i0\t%0, %1"
+  "v_<math_unop_insn>%i0\t%0, %1"
   [(set_attr "type" "vop1")
    (set_attr "length" "8")])
 
diff --git a/gcc/testsuite/gcc.target/gcn/unsafe-math-1.c b/gcc/testsuite/gcc.target/gcn/unsafe-math-1.c
new file mode 100644
index 00000000000..2b54fa232e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/gcn/unsafe-math-1.c
@@ -0,0 +1,10 @@
+/* { dg-do link } */
+/* { dg-options "-O0 -ffast-math" } */
+
+int main (void)
+{
+  float x = 0.123456f;
+
+  float r1 = __builtin_exp2f (x);
+  float r2 = __builtin_log2f (x);
+}
-- 
2.25.1


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] amdgcn: Fix instruction generation for exp2 and log2 operations
  2022-11-03 17:47 [PATCH] amdgcn: Fix instruction generation for exp2 and log2 operations Kwok Cheung Yeung
@ 2022-11-03 18:01 ` Andrew Stubbs
  0 siblings, 0 replies; 2+ messages in thread
From: Andrew Stubbs @ 2022-11-03 18:01 UTC (permalink / raw)
  To: Kwok Cheung Yeung, gcc-patches

On 03/11/2022 17:47, Kwok Cheung Yeung wrote:
> Hello
> 
> This patch fixes a bug introduced in a previous patch adding support for 
> generating native instructions for the exp2 and log2 patterns. The 
> problem is that the name of the instruction implementing the exp2 
> operation is v_exp (and not v_exp2), and similarly log2 is implemented 
> by v_log, so we cannot use the RTL name of the operation when outputting 
> the instruction.
> 
> I've added an extra iterator for the GCN operation name and used that 
> when outputting instructions instead. I have also added an extra 
> testcase for GCN that exercises this case.
> 
> Okay for trunk?

OK.

Andrew


^ permalink raw reply	[flat|nested] 2+ messages in thread

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2022-11-03 18:01 ` Andrew Stubbs

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