From: Richard Biener <rguenther@suse.de>
To: Aldy Hernandez <aldyh@redhat.com>
Cc: Tamar Christina <Tamar.Christina@arm.com>,
Jeff Law <jeffreyalaw@gmail.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
nd <nd@arm.com>, "MacLeod, Andrew" <amacleod@redhat.com>
Subject: Re: [PATCH 1/2]middle-end: Add new tbranch optab to add support for bit-test-and-branch operations
Date: Sat, 5 Nov 2022 15:23:18 +0100 (CET) [thread overview]
Message-ID: <p6op76pq-6821-o376-9n46-4761n24n2pp@fhfr.qr> (raw)
In-Reply-To: <CAGm3qMVPD9UBf-dRVPX8+HjAKS5EDkypSndXKnFymx6YzUaYYA@mail.gmail.com>
On Wed, 2 Nov 2022, Aldy Hernandez wrote:
> On Wed, Nov 2, 2022 at 10:55 AM Tamar Christina <Tamar.Christina@arm.com> wrote:
> >
> > Hi Aldy,
> >
> > I'm trying to use Ranger to determine if a range of an expression is a single bit.
> >
> > If possible in case of a mask then also the position of the bit that's being checked by the mask (or the mask itself).
>
> Just instantiate a ranger, and ask for the range of an SSA name (or an
> arbitrary tree expression) at a particular gimple statement (or an
> edge):
>
> gimple_ranger ranger;
> int_range_max r;
> if (ranger.range_of_expr (r, <SSA_NAME>, <STMT>)) {
> // do stuff with range "r"
> if (r.singleton_p ()) {
> wide_int num = r.lower_bound ();
> // Check the bits in NUM, etc...
> }
> }
>
> You can see the full ranger API in gimple-range.h.
>
> Note that instantiating a new ranger is relatively lightweight, but
> it's not free. So unless you're calling range_of_expr sporadically,
> you probably want to have one instance for your pass. You can pass
> around the gimple_ranger around your pass. Another way of doing this
> is calling enable_rager() at pass start, and then doing:
>
> get_range_query (cfun)->range_of_expr (r, <SSA_NAME>, <STMT>));
>
> gimple-loop-versioning.cc has an example of using enable_ranger /
> disable_ranger.
>
> I am assuming you are interested in ranges for integers / pointers.
> Otherwise (floats, etc) you'd have to use "Value_Range" instead of
> int_range_max. I can give you examples on that if necessary.
>
> Let me know if that helps.
I think you maybe just want get_nonzero_bits?
> Aldy
>
> >
> > Do you have any pointers/existing code I can look at to do this?
> >
> > Kind regards,
> > Tamar
> >
> > > -----Original Message-----
> > > From: Jeff Law <jeffreyalaw@gmail.com>
> > > Sent: Tuesday, November 1, 2022 5:00 PM
> > > To: Tamar Christina <Tamar.Christina@arm.com>; gcc-patches@gcc.gnu.org
> > > Cc: nd <nd@arm.com>; rguenther@suse.de
> > > Subject: Re: [PATCH 1/2]middle-end: Add new tbranch optab to add support
> > > for bit-test-and-branch operations
> > >
> > >
> > > On 11/1/22 09:53, Tamar Christina wrote:
> > > >>
> > > >>> from the machine description.
> > > >>>
> > > >>> +@cindex @code{tbranch@var{mode}4} instruction pattern @item
> > > >>> +@samp{tbranch@var{mode}4} Conditional branch instruction
> > > combined
> > > >>> +with a bit test-and-compare instruction. Operand 0 is a comparison
> > > >>> +operator. Operand 1 is the operand of the comparison. Operand 2 is
> > > >>> +the bit position of Operand 1 to test.
> > > >>> +Operand 3 is the @code{code_label} to jump to.
> > > >> Should we refine/document the set of comparison operators allowed?
> > > >> Is operand 1 an arbitrary RTL expression or more limited? I'm
> > > >> guessing its relatively arbitrary given how you've massaged the
> > > >> existing branch-on-bit patterns from the aarch backend.
> > > > It can be any expression in theory. However in practical terms we
> > > > usually force the values to registers before calling the expansion.
> > > > My assumption is that this is for CSE purposes but that's only a guess.
> > >
> > > Understood. And generally yes, forcing expressions into regs is good for CSE.
> > >
> > >
> > > >
> > > >> Do we have enough information lying around from Ranger to avoid the
> > > need
> > > >> to walk the def-use chain to discover that we're masking off all but one
> > > bit?
> > > >>
> > > > That's an interesting thought. I'll try to see if I can figure out how to query
> > > > Ranger here. It would be nice to do so here.
> > >
> > > Reach out to Aldy, I suspect he can probably give you the necessary
> > > pseudocode pretty quickly.
> > >
> > >
> > > Jeff
> > >
> >
>
>
--
Richard Biener <rguenther@suse.de>
SUSE Software Solutions Germany GmbH, Frankenstrasse 146, 90461 Nuernberg,
Germany; GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman;
HRB 36809 (AG Nuernberg)
next prev parent reply other threads:[~2022-11-05 14:23 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-31 11:53 Tamar Christina
2022-10-31 11:53 ` [PATCH 2/2]AArch64 Support new tbranch optab Tamar Christina
2022-11-14 15:58 ` Tamar Christina
2022-11-15 10:36 ` Richard Sandiford
2022-11-15 10:42 ` Tamar Christina
2022-11-15 10:50 ` Richard Sandiford
2022-11-15 11:00 ` Tamar Christina
2022-11-15 11:14 ` Richard Sandiford
2022-11-15 11:23 ` Tamar Christina
2022-11-15 11:33 ` Richard Sandiford
2022-11-15 11:39 ` Tamar Christina
2022-11-22 13:48 ` Tamar Christina
2022-11-22 14:00 ` Richard Sandiford
2022-11-24 12:18 ` Tamar Christina
2022-12-01 16:44 ` Tamar Christina
2022-12-05 14:06 ` Richard Sandiford
2022-10-31 11:54 ` [PATCH]AArch64 Extend umov and sbfx patterns Tamar Christina
2022-10-31 12:26 ` Richard Sandiford
2022-11-11 14:42 ` Tamar Christina
2022-11-15 11:10 ` Richard Sandiford
2022-10-31 21:16 ` [PATCH 1/2]middle-end: Add new tbranch optab to add support for bit-test-and-branch operations Jeff Law
2022-11-01 15:53 ` Tamar Christina
2022-11-01 17:00 ` Jeff Law
2022-11-02 9:55 ` Tamar Christina
2022-11-02 11:08 ` Aldy Hernandez
2022-11-05 14:23 ` Richard Biener [this message]
2022-11-14 15:56 ` Tamar Christina
2022-11-14 16:22 ` Jeff Law
2022-11-15 7:33 ` Richard Biener
2022-12-01 16:29 ` Tamar Christina
2022-12-02 7:09 ` Richard Biener
2022-12-05 12:00 ` Richard Sandiford
2022-12-05 13:14 ` Richard Sandiford
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