* [PATCH 2/8] sim: mips: unify itable generation (a bit)
2022-12-25 19:28 ` [PATCH 1/8] sim: mips: rename multi_flags to igen_itable_flags Mike Frysinger
@ 2022-12-25 19:28 ` Mike Frysinger
2022-12-25 19:28 ` [PATCH 3/8] sim: mips: hoist itable igen rules up to common builds Mike Frysinger
` (5 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2022-12-25 19:28 UTC (permalink / raw)
To: gdb-patches
The m16 & multi targets generate itable once even when all the other
modules are generated multiple times. The default igen target will
generate itable with everything else out of convenience. This means
flags are passed which don't affect the generated itable there.
We can unify the itable generation by making sure the right -F/-M
filter variables are passed down. Since there's already a dedicated
rule & variable in the multi build mode, generalize that and switch
the m16 & igen builds over too.
I spent a lot of time staring at this code, building for diff mips
targets, and exploring all the shell code paths. I think this is
safe, but only time (and users) will really tell.
---
sim/configure | 4 ++++
sim/mips/Makefile.in | 54 ++++++++++++++++---------------------------
sim/mips/acinclude.m4 | 2 ++
3 files changed, 26 insertions(+), 34 deletions(-)
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 3861e4e50779..4cd596421190 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -92,7 +92,7 @@ IGEN_INCLUDE=\
# NB: Since these can be built by a number of generators, care
# must be taken to ensure that they are only dependant on
# one of those generators.
-BUILT_SRC_FROM_GEN = \
+BUILT_SRC_FROM_IGEN_ITABLE = \
itable.h \
itable.c \
@@ -100,8 +100,24 @@ SIM_IGEN_ALL = tmp-igen
SIM_M16_ALL = tmp-m16
SIM_MULTI_ALL = tmp-multi
-$(BUILT_SRC_FROM_GEN): $(SIM_$(SIM_MIPS_GEN)_ALL)
+$(BUILT_SRC_FROM_IGEN_ITABLE): tmp-itable
+tmp-itable: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
+ $(ECHO_IGEN) $(IGEN_RUN) \
+ $(IGEN_TRACE) \
+ -I $(srcdir) \
+ -Werror \
+ -Wnodiscard \
+ -Wnowidth \
+ -Wnounimplemented \
+ $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
+ -G gen-direct-access \
+ -G gen-zero-r0 \
+ -i $(IGEN_INSN) \
+ -n itable.h -ht itable.h \
+ -n itable.c -t itable.c \
+ #
+ $(SILENCE) touch $@
BUILT_SRC_FROM_IGEN = \
@@ -145,8 +161,6 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
-n model.c -m model.c \
-n support.h -hf support.h \
-n support.c -f support.c \
- -n itable.h -ht itable.h \
- -n itable.c -t itable.c \
-n engine.h -he engine.h \
-n engine.c -e engine.c \
-n irun.c -r irun.c
@@ -228,25 +242,12 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
-n m32_support.h -hf m32_support.h \
-n m32_support.c -f m32_support.c \
#
- $(ECHO_IGEN) $(IGEN_RUN) \
- $(IGEN_TRACE) \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- -Wnowidth \
- $(SIM_MIPS_IGEN_FLAGS) $(SIM_MIPS_M16_FLAGS) \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -i $(IGEN_INSN) \
- -n itable.h -ht itable.h \
- -n itable.c -t itable.c \
- #
$(SILENCE) touch $@
BUILT_SRC_FROM_MULTI = $(SIM_MIPS_MULTI_SRC)
$(BUILT_SRC_FROM_MULTI): tmp-multi
-tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi
+tmp-multi: tmp-mach-multi tmp-run-multi
tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
p=`echo $${t} | sed -e 's/:.*//'` ; \
@@ -292,21 +293,6 @@ tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
|| exit; \
done
$(SILENCE) touch $@
-tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
- $(ECHO_IGEN) $(IGEN_RUN) \
- $(IGEN_TRACE) \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- -Wnowidth \
- $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -i $(IGEN_INSN) \
- -n itable.h -ht itable.h \
- -n itable.c -t itable.c \
- #
- $(SILENCE) touch $@
tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
case $${t} in \
@@ -347,7 +333,7 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
$(SILENCE) touch $@
clean-extra:
- rm -f $(BUILT_SRC_FROM_GEN)
+ rm -f $(BUILT_SRC_FROM_IGEN_ITABLE)
rm -f $(BUILT_SRC_FROM_IGEN)
rm -f $(BUILT_SRC_FROM_M16)
rm -f $(BUILT_SRC_FROM_MULTI)
diff --git a/sim/mips/acinclude.m4 b/sim/mips/acinclude.m4
index 116dc1e6141b..452dfc84514f 100644
--- a/sim/mips/acinclude.m4
+++ b/sim/mips/acinclude.m4
@@ -321,6 +321,8 @@ __EOF__
], [dnl
dnl For clean-extra target.
SIM_MIPS_MULTI_SRC=doesnt-exist.c
+ SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_IGEN_FLAGS)'
+ AS_VAR_IF([SIM_MIPS_GEN], ["M16"], [AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [' $(SIM_MIPS_M16_FLAGS)'])])
])
SIM_MIPS_IGEN_FLAGS="-F ${sim_mips_igen_filter} ${sim_mips_igen_machine}"
SIM_MIPS_M16_FLAGS="-F ${sim_mips_m16_filter} ${sim_mips_m16_machine}"
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 3/8] sim: mips: hoist itable igen rules up to common builds
2022-12-25 19:28 ` [PATCH 1/8] sim: mips: rename multi_flags to igen_itable_flags Mike Frysinger
2022-12-25 19:28 ` [PATCH 2/8] sim: mips: unify itable generation (a bit) Mike Frysinger
@ 2022-12-25 19:28 ` Mike Frysinger
2022-12-25 19:28 ` [PATCH 4/8] sim: mips: rename "igen" generation mode to "single" Mike Frysinger
` (4 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2022-12-25 19:28 UTC (permalink / raw)
To: gdb-patches
Since this rule is pretty simple, hoist it up to the common build.
---
sim/Makefile.in | 98 ++++++++++++++++++++++++++++++++------------
sim/mips/Makefile.in | 33 +--------------
sim/mips/local.mk | 52 +++++++++++++++++++++--
3 files changed, 121 insertions(+), 62 deletions(-)
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 4cd596421190..187f574f2496 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -6,7 +6,6 @@
SIM_MIPS_IGEN_FLAGS = @SIM_MIPS_IGEN_FLAGS@
SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
SIM_MIPS_GEN = @SIM_MIPS_GEN@
-SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
@@ -64,8 +63,6 @@ SIM_EXTRA_CLEAN = clean-extra
all: $(SIM_$(SIM_MIPS_GEN)_ALL)
-SIM_EXTRA_DEPS = itable.h
-
## COMMON_POST_CONFIG_FRAG
IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
@@ -89,37 +86,10 @@ IGEN_INCLUDE=\
$(srcdir)/mips3264r2.igen \
$(srcdir)/mips3264r6.igen \
-# NB: Since these can be built by a number of generators, care
-# must be taken to ensure that they are only dependant on
-# one of those generators.
-BUILT_SRC_FROM_IGEN_ITABLE = \
- itable.h \
- itable.c \
-
SIM_IGEN_ALL = tmp-igen
SIM_M16_ALL = tmp-m16
SIM_MULTI_ALL = tmp-multi
-$(BUILT_SRC_FROM_IGEN_ITABLE): tmp-itable
-
-tmp-itable: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
- $(ECHO_IGEN) $(IGEN_RUN) \
- $(IGEN_TRACE) \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- -Wnowidth \
- -Wnounimplemented \
- $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -i $(IGEN_INSN) \
- -n itable.h -ht itable.h \
- -n itable.c -t itable.c \
- #
- $(SILENCE) touch $@
-
-
BUILT_SRC_FROM_IGEN = \
icache.h \
icache.c \
@@ -333,9 +303,8 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
$(SILENCE) touch $@
clean-extra:
- rm -f $(BUILT_SRC_FROM_IGEN_ITABLE)
rm -f $(BUILT_SRC_FROM_IGEN)
rm -f $(BUILT_SRC_FROM_M16)
rm -f $(BUILT_SRC_FROM_MULTI)
rm -f tmp-*
- rm -f micromips16*.o micromips32*.o m16*.o m32*.o itable*.o
+ rm -f micromips16*.o micromips32*.o m16*.o m32*.o
diff --git a/sim/mips/local.mk b/sim/mips/local.mk
index 21a6f5cb56b1..beed8f28a169 100644
--- a/sim/mips/local.mk
+++ b/sim/mips/local.mk
@@ -24,11 +24,57 @@
noinst_PROGRAMS += %D%/run
-## TODO: Delete this once mips igen rules move here from Makefile.in.
-SIM_ALL_RECURSIVE_DEPS += $(IGEN)
-
%C%_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
AM_MAKEFLAGS += %C%_SIM_EXTRA_HW_DEVICES="$(%C%_SIM_EXTRA_HW_DEVICES)"
+%C%_BUILT_SRC_FROM_IGEN_ITABLE = \
+ %D%/itable.h \
+ %D%/itable.c
+%C%_BUILD_OUTPUTS = \
+ $(%C%_BUILT_SRC_FROM_IGEN_ITABLE) \
+ %D%/stamp-igen-itable
+
+## This makes sure build tools are available before building the arch-subdirs.
+SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
+
+$(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
+
+%C%_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
+%C%_IGEN_INSN = $(srcdir)/%D%/mips.igen
+%C%_IGEN_INSN_INC = \
+ %D%/dsp.igen \
+ %D%/dsp2.igen \
+ %D%/m16.igen \
+ %D%/m16e.igen \
+ %D%/mdmx.igen \
+ %D%/micromipsdsp.igen \
+ %D%/micromips.igen \
+ %D%/mips3264r2.igen \
+ %D%/mips3264r6.igen \
+ %D%/mips3d.igen \
+ %D%/sb1.igen \
+ %D%/tx.igen \
+ %D%/vr.igen
+
+## NB: Since these can be built by a number of generators, care
+## must be taken to ensure that they are only dependant on
+## one of those generators.
+%D%/stamp-igen-itable: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(IGEN)
+ $(AM_V_GEN)$(IGEN_RUN) \
+ $(%C%_IGEN_TRACE) \
+ -I $(srcdir)/%D% \
+ -Werror \
+ -Wnodiscard \
+ -Wnowidth \
+ -Wnounimplemented \
+ $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
+ -G gen-direct-access \
+ -G gen-zero-r0 \
+ -i $(%C%_IGEN_INSN) \
+ -n itable.h -ht %D%/itable.h \
+ -n itable.c -t %D%/itable.c
+ $(AM_V_at)touch $@
+
+MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
## These are created by mips/acinclude.m4 during configure time.
DISTCLEANFILES += %D%/multi-include.h %D%/multi-run.c
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 4/8] sim: mips: rename "igen" generation mode to "single"
2022-12-25 19:28 ` [PATCH 1/8] sim: mips: rename multi_flags to igen_itable_flags Mike Frysinger
2022-12-25 19:28 ` [PATCH 2/8] sim: mips: unify itable generation (a bit) Mike Frysinger
2022-12-25 19:28 ` [PATCH 3/8] sim: mips: hoist itable igen rules up to common builds Mike Frysinger
@ 2022-12-25 19:28 ` Mike Frysinger
2022-12-25 19:28 ` [PATCH 5/8] sim: mips: hoist "single" igen rules up to common builds Mike Frysinger
` (3 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2022-12-25 19:28 UTC (permalink / raw)
To: gdb-patches
The naming in here has grown organically and is confusing to follow.
Originally there was only one set of rules for generating code from
the igen sources, so calling it "tmp-igen" and such made sense. But
when other multigen modes were added ("m16" & "multi") which also
used igen, it's not clear what's common igen and what's specific to
this generation mode. So rename the set of rules from "igen" to
"single" so it's easier to follow.
---
sim/Makefile.in | 2 +-
sim/configure | 50 +++++++++++++++++++++----------------------
sim/mips/Makefile.in | 18 ++++++++--------
sim/mips/acinclude.m4 | 50 +++++++++++++++++++++----------------------
4 files changed, 60 insertions(+), 60 deletions(-)
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 187f574f2496..d9b489858c54 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -3,7 +3,7 @@
## COMMON_PRE_CONFIG_FRAG
-SIM_MIPS_IGEN_FLAGS = @SIM_MIPS_IGEN_FLAGS@
+SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
SIM_MIPS_GEN = @SIM_MIPS_GEN@
SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
@@ -15,7 +15,7 @@ arch = mips
# Object files created by various simulator generators.
-SIM_IGEN_OBJ = \
+SIM_SINGLE_OBJ = \
support.o \
itable.o \
semantics.o \
@@ -86,11 +86,11 @@ IGEN_INCLUDE=\
$(srcdir)/mips3264r2.igen \
$(srcdir)/mips3264r6.igen \
-SIM_IGEN_ALL = tmp-igen
+SIM_SINGLE_ALL = tmp-single
SIM_M16_ALL = tmp-m16
SIM_MULTI_ALL = tmp-multi
-BUILT_SRC_FROM_IGEN = \
+BUILT_SRC_FROM_SINGLE = \
icache.h \
icache.c \
idecode.h \
@@ -105,15 +105,15 @@ BUILT_SRC_FROM_IGEN = \
engine.c \
irun.c \
-$(BUILT_SRC_FROM_IGEN): tmp-igen
+$(BUILT_SRC_FROM_SINGLE): tmp-single
-tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
+tmp-single: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
$(ECHO_IGEN) $(IGEN_RUN) \
$(IGEN_TRACE) \
-I $(srcdir) \
-Werror \
-Wnodiscard \
- $(SIM_MIPS_IGEN_FLAGS) \
+ $(SIM_MIPS_SINGLE_FLAGS) \
-G gen-direct-access \
-G gen-zero-r0 \
-B 32 \
@@ -192,7 +192,7 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
-I $(srcdir) \
-Werror \
-Wnodiscard \
- $(SIM_MIPS_IGEN_FLAGS) \
+ $(SIM_MIPS_SINGLE_FLAGS) \
-G gen-direct-access \
-G gen-zero-r0 \
-B 32 \
@@ -303,7 +303,7 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
$(SILENCE) touch $@
clean-extra:
- rm -f $(BUILT_SRC_FROM_IGEN)
+ rm -f $(BUILT_SRC_FROM_SINGLE)
rm -f $(BUILT_SRC_FROM_M16)
rm -f $(BUILT_SRC_FROM_MULTI)
rm -f tmp-*
diff --git a/sim/mips/acinclude.m4 b/sim/mips/acinclude.m4
index 452dfc84514f..111dd87618e3 100644
--- a/sim/mips/acinclude.m4
+++ b/sim/mips/acinclude.m4
@@ -59,19 +59,19 @@ AC_MSG_RESULT([$SIM_MIPS_FPU_BITSIZE])
AC_SUBST(SIM_MIPS_FPU_BITSIZE)
dnl Select the IGEN architecture.
-SIM_MIPS_GEN=IGEN
-sim_mips_igen_machine="-M mipsIV"
+SIM_MIPS_GEN=SINGLE
+sim_mips_single_machine="-M mipsIV"
sim_mips_m16_machine="-M mips16,mipsIII"
-sim_mips_igen_filter="32,64,f"
+sim_mips_single_filter="32,64,f"
sim_mips_m16_filter="16"
AS_CASE([${target}],
[mips*tx39*], [dnl
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_filter="32,f"
- sim_mips_igen_machine="-M r3900"],
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_filter="32,f"
+ sim_mips_single_machine="-M r3900"],
[mips64vr41*], [dnl
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M vr4100"
+ sim_mips_single_machine="-M vr4100"
sim_mips_m16_machine="-M vr4100"],
[mips64*], [dnl
SIM_MIPS_GEN=MULTI
@@ -98,36 +98,36 @@ AS_CASE([${target}],
mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
sim_mips_multi_default=mipsisa32r2],
[mipsisa32r6*], [dnl
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_machine="-M mips32r6"
- sim_mips_igen_filter="32,f"],
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_machine="-M mips32r6"
+ sim_mips_single_filter="32,f"],
[mipsisa32*], [dnl
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mips32,mips16,mips16e,smartmips"
+ sim_mips_single_machine="-M mips32,mips16,mips16e,smartmips"
sim_mips_m16_machine="-M mips16,mips16e,mips32"
- sim_mips_igen_filter="32,f"],
+ sim_mips_single_filter="32,f"],
[mipsisa64r2*], [dnl
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
+ sim_mips_single_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
sim_mips_m16_machine="-M mips16,mips16e,mips64r2"],
[mipsisa64r6*], [dnl
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_machine="-M mips64r6"],
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_machine="-M mips64r6"],
[mipsisa64sb1*], [dnl
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_machine="-M mips64,mips3d,sb1"],
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_machine="-M mips64,mips3d,sb1"],
[mipsisa64*], [dnl
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
+ sim_mips_single_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
sim_mips_m16_machine="-M mips16,mips16e,mips64"],
[mips*lsi*], [dnl
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mipsIII,mips16"
+ sim_mips_single_machine="-M mipsIII,mips16"
sim_mips_m16_machine="-M mips16,mipsIII"
- sim_mips_igen_filter="32,f"],
+ sim_mips_single_filter="32,f"],
[mips*], [dnl
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_filter="32,f"])
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_filter="32,f"])
dnl The MULTI generator can combine several simulation engines into one.
dnl executable. A configuration which uses the MULTI should set two
@@ -321,12 +321,12 @@ __EOF__
], [dnl
dnl For clean-extra target.
SIM_MIPS_MULTI_SRC=doesnt-exist.c
- SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_IGEN_FLAGS)'
+ SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_SINGLE_FLAGS)'
AS_VAR_IF([SIM_MIPS_GEN], ["M16"], [AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [' $(SIM_MIPS_M16_FLAGS)'])])
])
-SIM_MIPS_IGEN_FLAGS="-F ${sim_mips_igen_filter} ${sim_mips_igen_machine}"
+SIM_MIPS_SINGLE_FLAGS="-F ${sim_mips_single_filter} ${sim_mips_single_machine}"
SIM_MIPS_M16_FLAGS="-F ${sim_mips_m16_filter} ${sim_mips_m16_machine}"
-AC_SUBST(SIM_MIPS_IGEN_FLAGS)
+AC_SUBST(SIM_MIPS_SINGLE_FLAGS)
AC_SUBST(SIM_MIPS_M16_FLAGS)
AC_SUBST(SIM_MIPS_GEN)
AC_SUBST(SIM_MIPS_IGEN_ITABLE_FLAGS)
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 5/8] sim: mips: hoist "single" igen rules up to common builds
2022-12-25 19:28 ` [PATCH 1/8] sim: mips: rename multi_flags to igen_itable_flags Mike Frysinger
` (2 preceding siblings ...)
2022-12-25 19:28 ` [PATCH 4/8] sim: mips: rename "igen" generation mode to "single" Mike Frysinger
@ 2022-12-25 19:28 ` Mike Frysinger
2022-12-25 19:28 ` [PATCH 6/8] sim: mips: hoist "m16" " Mike Frysinger
` (2 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2022-12-25 19:28 UTC (permalink / raw)
To: gdb-patches
---
sim/Makefile.in | 108 ++++++++++++++++++++++++++++++------------
sim/configure | 18 ++++++-
sim/mips/Makefile.in | 49 +------------------
sim/mips/acinclude.m4 | 1 +
sim/mips/local.mk | 50 +++++++++++++++++++
5 files changed, 147 insertions(+), 79 deletions(-)
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index d9b489858c54..247208fea5cc 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -86,56 +86,10 @@ IGEN_INCLUDE=\
$(srcdir)/mips3264r2.igen \
$(srcdir)/mips3264r6.igen \
-SIM_SINGLE_ALL = tmp-single
+SIM_SINGLE_ALL =
SIM_M16_ALL = tmp-m16
SIM_MULTI_ALL = tmp-multi
-BUILT_SRC_FROM_SINGLE = \
- icache.h \
- icache.c \
- idecode.h \
- idecode.c \
- semantics.h \
- semantics.c \
- model.h \
- model.c \
- support.h \
- support.c \
- engine.h \
- engine.c \
- irun.c \
-
-$(BUILT_SRC_FROM_SINGLE): tmp-single
-
-tmp-single: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
- $(ECHO_IGEN) $(IGEN_RUN) \
- $(IGEN_TRACE) \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- $(SIM_MIPS_SINGLE_FLAGS) \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -B 32 \
- -H 31 \
- -i $(IGEN_INSN) \
- -o $(IGEN_DC) \
- -x \
- -n icache.h -hc icache.h \
- -n icache.c -c icache.c \
- -n semantics.h -hs semantics.h \
- -n semantics.c -s semantics.c \
- -n idecode.h -hd idecode.h \
- -n idecode.c -d idecode.c \
- -n model.h -hm model.h \
- -n model.c -m model.c \
- -n support.h -hf support.h \
- -n support.c -f support.c \
- -n engine.h -he engine.h \
- -n engine.c -e engine.c \
- -n irun.c -r irun.c
- $(SILENCE) touch $@
-
BUILT_SRC_FROM_M16 = \
m16_icache.h \
m16_icache.c \
@@ -303,7 +257,6 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
$(SILENCE) touch $@
clean-extra:
- rm -f $(BUILT_SRC_FROM_SINGLE)
rm -f $(BUILT_SRC_FROM_M16)
rm -f $(BUILT_SRC_FROM_MULTI)
rm -f tmp-*
diff --git a/sim/mips/acinclude.m4 b/sim/mips/acinclude.m4
index 111dd87618e3..313e40b150bc 100644
--- a/sim/mips/acinclude.m4
+++ b/sim/mips/acinclude.m4
@@ -333,3 +333,4 @@ AC_SUBST(SIM_MIPS_IGEN_ITABLE_FLAGS)
AC_SUBST(SIM_MIPS_MULTI_IGEN_CONFIGS)
AC_SUBST(SIM_MIPS_MULTI_SRC)
AC_SUBST(SIM_MIPS_MULTI_OBJ)
+AM_CONDITIONAL([SIM_MIPS_GEN_MODE_SINGLE], [test "$SIM_MIPS_GEN" = "SINGLE"])
diff --git a/sim/mips/local.mk b/sim/mips/local.mk
index beed8f28a169..0a6f1da1a462 100644
--- a/sim/mips/local.mk
+++ b/sim/mips/local.mk
@@ -30,14 +30,34 @@ AM_MAKEFLAGS += %C%_SIM_EXTRA_HW_DEVICES="$(%C%_SIM_EXTRA_HW_DEVICES)"
%C%_BUILT_SRC_FROM_IGEN_ITABLE = \
%D%/itable.h \
%D%/itable.c
+%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
+ %D%/icache.h \
+ %D%/icache.c \
+ %D%/idecode.h \
+ %D%/idecode.c \
+ %D%/semantics.h \
+ %D%/semantics.c \
+ %D%/model.h \
+ %D%/model.c \
+ %D%/support.h \
+ %D%/support.c \
+ %D%/engine.h \
+ %D%/engine.c \
+ %D%/irun.c
%C%_BUILD_OUTPUTS = \
$(%C%_BUILT_SRC_FROM_IGEN_ITABLE) \
%D%/stamp-igen-itable
+if SIM_MIPS_GEN_MODE_SINGLE
+%C%_BUILD_OUTPUTS += \
+ $(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
+ %D%/stamp-gen-mode-single
+endif
## This makes sure build tools are available before building the arch-subdirs.
SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
$(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
+$(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single
%C%_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
%C%_IGEN_INSN = $(srcdir)/%D%/mips.igen
@@ -55,6 +75,7 @@ $(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
%D%/sb1.igen \
%D%/tx.igen \
%D%/vr.igen
+%C%_IGEN_DC = $(srcdir)/%D%/mips.dc
## NB: Since these can be built by a number of generators, care
## must be taken to ensure that they are only dependant on
@@ -75,6 +96,35 @@ $(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
-n itable.c -t %D%/itable.c
$(AM_V_at)touch $@
+%D%/stamp-gen-mode-single: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_IGEN_DC) $(IGEN)
+ $(AM_V_GEN)$(IGEN_RUN) \
+ $(%C%_IGEN_TRACE) \
+ -I $(srcdir)/%D% \
+ -Werror \
+ -Wnodiscard \
+ $(SIM_MIPS_SINGLE_FLAGS) \
+ -G gen-direct-access \
+ -G gen-zero-r0 \
+ -B 32 \
+ -H 31 \
+ -i $(%C%_IGEN_INSN) \
+ -o $(%C%_IGEN_DC) \
+ -x \
+ -n icache.h -hc %D%/icache.h \
+ -n icache.c -c %D%/icache.c \
+ -n semantics.h -hs %D%/semantics.h \
+ -n semantics.c -s %D%/semantics.c \
+ -n idecode.h -hd %D%/idecode.h \
+ -n idecode.c -d %D%/idecode.c \
+ -n model.h -hm %D%/model.h \
+ -n model.c -m %D%/model.c \
+ -n support.h -hf %D%/support.h \
+ -n support.c -f %D%/support.c \
+ -n engine.h -he %D%/engine.h \
+ -n engine.c -e %D%/engine.c \
+ -n irun.c -r %D%/irun.c
+ $(AM_V_at)touch $@
+
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
## These are created by mips/acinclude.m4 during configure time.
DISTCLEANFILES += %D%/multi-include.h %D%/multi-run.c
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 6/8] sim: mips: hoist "m16" igen rules up to common builds
2022-12-25 19:28 ` [PATCH 1/8] sim: mips: rename multi_flags to igen_itable_flags Mike Frysinger
` (3 preceding siblings ...)
2022-12-25 19:28 ` [PATCH 5/8] sim: mips: hoist "single" igen rules up to common builds Mike Frysinger
@ 2022-12-25 19:28 ` Mike Frysinger
2022-12-25 19:28 ` [PATCH 7/8] sim: mips: hoist "multi" " Mike Frysinger
2022-12-25 19:28 ` [PATCH 8/8] sim: build: clean up unused codegen logic Mike Frysinger
6 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2022-12-25 19:28 UTC (permalink / raw)
To: gdb-patches
---
sim/Makefile.in | 140 ++++++++++++++++++++++++++++++++++--------
sim/configure | 18 +++++-
sim/mips/Makefile.in | 83 +------------------------
sim/mips/acinclude.m4 | 1 +
sim/mips/local.mk | 86 ++++++++++++++++++++++++++
5 files changed, 217 insertions(+), 111 deletions(-)
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 247208fea5cc..15016f94375d 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -3,8 +3,6 @@
## COMMON_PRE_CONFIG_FRAG
-SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
-SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
SIM_MIPS_GEN = @SIM_MIPS_GEN@
SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
@@ -87,87 +85,9 @@ IGEN_INCLUDE=\
$(srcdir)/mips3264r6.igen \
SIM_SINGLE_ALL =
-SIM_M16_ALL = tmp-m16
+SIM_M16_ALL =
SIM_MULTI_ALL = tmp-multi
-BUILT_SRC_FROM_M16 = \
- m16_icache.h \
- m16_icache.c \
- m16_idecode.h \
- m16_idecode.c \
- m16_semantics.h \
- m16_semantics.c \
- m16_model.h \
- m16_model.c \
- m16_support.h \
- m16_support.c \
- \
- m32_icache.h \
- m32_icache.c \
- m32_idecode.h \
- m32_idecode.c \
- m32_semantics.h \
- m32_semantics.c \
- m32_model.h \
- m32_model.c \
- m32_support.h \
- m32_support.c \
-
-$(BUILT_SRC_FROM_M16): tmp-m16
-
-tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
- $(ECHO_IGEN) $(IGEN_RUN) \
- $(IGEN_TRACE) \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- $(SIM_MIPS_M16_FLAGS) \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -B 16 \
- -H 15 \
- -i $(IGEN_INSN) \
- -o $(M16_DC) \
- -P m16_ \
- -x \
- -n m16_icache.h -hc m16_icache.h \
- -n m16_icache.c -c m16_icache.c \
- -n m16_semantics.h -hs m16_semantics.h \
- -n m16_semantics.c -s m16_semantics.c \
- -n m16_idecode.h -hd m16_idecode.h \
- -n m16_idecode.c -d m16_idecode.c \
- -n m16_model.h -hm m16_model.h \
- -n m16_model.c -m m16_model.c \
- -n m16_support.h -hf m16_support.h \
- -n m16_support.c -f m16_support.c \
- #
- $(ECHO_IGEN) $(IGEN_RUN) \
- $(IGEN_TRACE) \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- $(SIM_MIPS_SINGLE_FLAGS) \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -B 32 \
- -H 31 \
- -i $(IGEN_INSN) \
- -o $(IGEN_DC) \
- -P m32_ \
- -x \
- -n m32_icache.h -hc m32_icache.h \
- -n m32_icache.c -c m32_icache.c \
- -n m32_semantics.h -hs m32_semantics.h \
- -n m32_semantics.c -s m32_semantics.c \
- -n m32_idecode.h -hd m32_idecode.h \
- -n m32_idecode.c -d m32_idecode.c \
- -n m32_model.h -hm m32_model.h \
- -n m32_model.c -m m32_model.c \
- -n m32_support.h -hf m32_support.h \
- -n m32_support.c -f m32_support.c \
- #
- $(SILENCE) touch $@
-
BUILT_SRC_FROM_MULTI = $(SIM_MIPS_MULTI_SRC)
$(BUILT_SRC_FROM_MULTI): tmp-multi
@@ -257,7 +177,6 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
$(SILENCE) touch $@
clean-extra:
- rm -f $(BUILT_SRC_FROM_M16)
rm -f $(BUILT_SRC_FROM_MULTI)
rm -f tmp-*
rm -f micromips16*.o micromips32*.o m16*.o m32*.o
diff --git a/sim/mips/acinclude.m4 b/sim/mips/acinclude.m4
index 313e40b150bc..efabd27e66b3 100644
--- a/sim/mips/acinclude.m4
+++ b/sim/mips/acinclude.m4
@@ -334,3 +334,4 @@ AC_SUBST(SIM_MIPS_MULTI_IGEN_CONFIGS)
AC_SUBST(SIM_MIPS_MULTI_SRC)
AC_SUBST(SIM_MIPS_MULTI_OBJ)
AM_CONDITIONAL([SIM_MIPS_GEN_MODE_SINGLE], [test "$SIM_MIPS_GEN" = "SINGLE"])
+AM_CONDITIONAL([SIM_MIPS_GEN_MODE_M16], [test "$SIM_MIPS_GEN" = "M16"])
diff --git a/sim/mips/local.mk b/sim/mips/local.mk
index 0a6f1da1a462..b6e482e0fdac 100644
--- a/sim/mips/local.mk
+++ b/sim/mips/local.mk
@@ -44,6 +44,28 @@ AM_MAKEFLAGS += %C%_SIM_EXTRA_HW_DEVICES="$(%C%_SIM_EXTRA_HW_DEVICES)"
%D%/engine.h \
%D%/engine.c \
%D%/irun.c
+%C%_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
+ %D%/m16_icache.h \
+ %D%/m16_icache.c \
+ %D%/m16_idecode.h \
+ %D%/m16_idecode.c \
+ %D%/m16_semantics.h \
+ %D%/m16_semantics.c \
+ %D%/m16_model.h \
+ %D%/m16_model.c \
+ %D%/m16_support.h \
+ %D%/m16_support.c \
+%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
+ %D%/m32_icache.h \
+ %D%/m32_icache.c \
+ %D%/m32_idecode.h \
+ %D%/m32_idecode.c \
+ %D%/m32_semantics.h \
+ %D%/m32_semantics.c \
+ %D%/m32_model.h \
+ %D%/m32_model.c \
+ %D%/m32_support.h \
+ %D%/m32_support.c
%C%_BUILD_OUTPUTS = \
$(%C%_BUILT_SRC_FROM_IGEN_ITABLE) \
%D%/stamp-igen-itable
@@ -52,12 +74,21 @@ if SIM_MIPS_GEN_MODE_SINGLE
$(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
%D%/stamp-gen-mode-single
endif
+if SIM_MIPS_GEN_MODE_M16
+%C%_BUILD_OUTPUTS += \
+ $(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
+ $(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
+ %D%/stamp-gen-mode-m16-m16 \
+ %D%/stamp-gen-mode-m16-m32
+endif
## This makes sure build tools are available before building the arch-subdirs.
SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
$(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
$(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single
+$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M16): %D%/stamp-gen-mode-m16-m16
+$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32): %D%/stamp-gen-mode-m16-m32
%C%_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
%C%_IGEN_INSN = $(srcdir)/%D%/mips.igen
@@ -76,6 +107,7 @@ $(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single
%D%/tx.igen \
%D%/vr.igen
%C%_IGEN_DC = $(srcdir)/%D%/mips.dc
+%C%_M16_DC = $(srcdir)/%D%/m16.dc
## NB: Since these can be built by a number of generators, care
## must be taken to ensure that they are only dependant on
@@ -125,6 +157,60 @@ $(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single
-n irun.c -r %D%/irun.c
$(AM_V_at)touch $@
+%D%/stamp-gen-mode-m16-m16: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_M16_DC) $(IGEN)
+ $(AM_V_GEN)$(IGEN_RUN) \
+ $(%C%_IGEN_TRACE) \
+ -I $(srcdir)/%D% \
+ -Werror \
+ -Wnodiscard \
+ $(SIM_MIPS_M16_FLAGS) \
+ -G gen-direct-access \
+ -G gen-zero-r0 \
+ -B 16 \
+ -H 15 \
+ -i $(%C%_IGEN_INSN) \
+ -o $(%C%_M16_DC) \
+ -P m16_ \
+ -x \
+ -n m16_icache.h -hc %D%/m16_icache.h \
+ -n m16_icache.c -c %D%/m16_icache.c \
+ -n m16_semantics.h -hs %D%/m16_semantics.h \
+ -n m16_semantics.c -s %D%/m16_semantics.c \
+ -n m16_idecode.h -hd %D%/m16_idecode.h \
+ -n m16_idecode.c -d %D%/m16_idecode.c \
+ -n m16_model.h -hm %D%/m16_model.h \
+ -n m16_model.c -m %D%/m16_model.c \
+ -n m16_support.h -hf %D%/m16_support.h \
+ -n m16_support.c -f %D%/m16_support.c
+ $(AM_V_at)touch $@
+
+%D%/stamp-gen-mode-m16-m32: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_IGEN_DC) $(IGEN)
+ $(AM_V_GEN)$(IGEN_RUN) \
+ $(%C%_IGEN_TRACE) \
+ -I $(srcdir)/%D% \
+ -Werror \
+ -Wnodiscard \
+ $(SIM_MIPS_SINGLE_FLAGS) \
+ -G gen-direct-access \
+ -G gen-zero-r0 \
+ -B 32 \
+ -H 31 \
+ -i $(%C%_IGEN_INSN) \
+ -o $(%C%_IGEN_DC) \
+ -P m32_ \
+ -x \
+ -n m32_icache.h -hc %D%/m32_icache.h \
+ -n m32_icache.c -c %D%/m32_icache.c \
+ -n m32_semantics.h -hs %D%/m32_semantics.h \
+ -n m32_semantics.c -s %D%/m32_semantics.c \
+ -n m32_idecode.h -hd %D%/m32_idecode.h \
+ -n m32_idecode.c -d %D%/m32_idecode.c \
+ -n m32_model.h -hm %D%/m32_model.h \
+ -n m32_model.c -m %D%/m32_model.c \
+ -n m32_support.h -hf %D%/m32_support.h \
+ -n m32_support.c -f %D%/m32_support.c
+ $(AM_V_at)touch $@
+
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
## These are created by mips/acinclude.m4 during configure time.
DISTCLEANFILES += %D%/multi-include.h %D%/multi-run.c
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 7/8] sim: mips: hoist "multi" igen rules up to common builds
2022-12-25 19:28 ` [PATCH 1/8] sim: mips: rename multi_flags to igen_itable_flags Mike Frysinger
` (4 preceding siblings ...)
2022-12-25 19:28 ` [PATCH 6/8] sim: mips: hoist "m16" " Mike Frysinger
@ 2022-12-25 19:28 ` Mike Frysinger
2022-12-25 19:28 ` [PATCH 8/8] sim: build: clean up unused codegen logic Mike Frysinger
6 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2022-12-25 19:28 UTC (permalink / raw)
To: gdb-patches
Since these are the last mips igen rules, we can clean up a number of
bits in the local Makefile.in.
---
sim/Makefile.in | 156 ++++++++++++++++++++++++++++++++++--------
sim/configure | 18 ++++-
sim/mips/Makefile.in | 124 ---------------------------------
sim/mips/acinclude.m4 | 1 +
sim/mips/local.mk | 102 +++++++++++++++++++++++++++
5 files changed, 248 insertions(+), 153 deletions(-)
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 15016f94375d..eb20977c5cc6 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -4,8 +4,6 @@
## COMMON_PRE_CONFIG_FRAG
SIM_MIPS_GEN = @SIM_MIPS_GEN@
-SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
-SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
arch = mips
@@ -57,126 +55,4 @@ SIM_EXTRA_CFLAGS = @SIM_MIPS_SUBTARGET@
SIM_BITSIZE = -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1
SIM_FLOAT = -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
-SIM_EXTRA_CLEAN = clean-extra
-
-all: $(SIM_$(SIM_MIPS_GEN)_ALL)
-
## COMMON_POST_CONFIG_FRAG
-
-IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
-IGEN_INSN=$(srcdir)/mips.igen
-IGEN_DC=$(srcdir)/mips.dc
-M16_DC=$(srcdir)/m16.dc
-MICROMIPS32_DC=$(srcdir)/micromips.dc
-MICROMIPS16_DC=$(srcdir)/micromips16.dc
-IGEN_INCLUDE=\
- $(srcdir)/micromipsdsp.igen \
- $(srcdir)/micromips.igen \
- $(srcdir)/m16.igen \
- $(srcdir)/m16e.igen \
- $(srcdir)/mdmx.igen \
- $(srcdir)/mips3d.igen \
- $(srcdir)/sb1.igen \
- $(srcdir)/tx.igen \
- $(srcdir)/vr.igen \
- $(srcdir)/dsp.igen \
- $(srcdir)/dsp2.igen \
- $(srcdir)/mips3264r2.igen \
- $(srcdir)/mips3264r6.igen \
-
-SIM_SINGLE_ALL =
-SIM_M16_ALL =
-SIM_MULTI_ALL = tmp-multi
-
-BUILT_SRC_FROM_MULTI = $(SIM_MIPS_MULTI_SRC)
-
-$(BUILT_SRC_FROM_MULTI): tmp-multi
-tmp-multi: tmp-mach-multi tmp-run-multi
-tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
- for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
- p=`echo $${t} | sed -e 's/:.*//'` ; \
- m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
- f=`echo $${t} | sed -e 's/.*://'` ; \
- case $${p} in \
- micromips16*) e="-B 16 -H 15 -o $(MICROMIPS16_DC) -F 16" ;; \
- micromips32* | micromips64*) \
- e="-B 32 -H 31 -o $(MICROMIPS32_DC) -F $${f}" ;; \
- micromips_m32*) \
- e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
- m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
- micromips_m64*) \
- e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
- m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
- m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
- *) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
- esac; \
- $(IGEN_RUN) \
- $(IGEN_TRACE) \
- $${e} \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- -M $${m} \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -i $(IGEN_INSN) \
- -P $${p}_ \
- -x \
- -n $${p}_icache.h -hc $${p}_icache.h \
- -n $${p}_icache.c -c $${p}_icache.c \
- -n $${p}_semantics.h -hs $${p}_semantics.h \
- -n $${p}_semantics.c -s $${p}_semantics.c \
- -n $${p}_idecode.h -hd $${p}_idecode.h \
- -n $${p}_idecode.c -d $${p}_idecode.c \
- -n $${p}_model.h -hm $${p}_model.h \
- -n $${p}_model.c -m $${p}_model.c \
- -n $${p}_support.h -hf $${p}_support.h \
- -n $${p}_support.c -f $${p}_support.c \
- -n $${p}_engine.h -he $${p}_engine.h \
- -n $${p}_engine.c -e $${p}_engine.c \
- || exit; \
- done
- $(SILENCE) touch $@
-tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
- for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
- case $${t} in \
- m16*) \
- m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
- sed < $(srcdir)/m16run.c > tmp-run \
- -e "s/^sim_/m16$${m}_/" \
- -e "/include/s/sim-engine/m16$${m}_engine/" \
- -e "s/m16_/m16$${m}_/" \
- -e "s/m32_/m32$${m}_/" ; \
- $(SHELL) $(srcdir)/../../move-if-change tmp-run \
- m16$${m}_run.c ; \
- ;;\
- micromips32*) \
- m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
- sed < $(srcdir)/micromipsrun.c > tmp-run \
- -e "s/^sim_/micromips32$${m}_/" \
- -e "/include/s/sim-engine/micromips32$${m}_engine/" \
- -e "s/micromips16_/micromips16$${m}_/" \
- -e "s/micromips32_/micromips32$${m}_/" \
- -e "s/m32_/m32$${m}_/" ; \
- $(SHELL) $(srcdir)/../../move-if-change tmp-run \
- micromips$${m}_run.c ; \
- ;;\
- micromips64*) \
- m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
- sed < $(srcdir)/micromipsrun.c > tmp-run \
- -e "s/^sim_/micromips64$${m}_/" \
- -e "/include/s/sim-engine/micromips64$${m}_engine/" \
- -e "s/micromips16_/micromips16$${m}_/" \
- -e "s/micromips32_/micromips64$${m}_/" \
- -e "s/m32_/m64$${m}_/" ; \
- $(SHELL) $(srcdir)/../../move-if-change tmp-run \
- micromips$${m}_run.c ; \
- ;;\
- esac \
- done
- $(SILENCE) touch $@
-
-clean-extra:
- rm -f $(BUILT_SRC_FROM_MULTI)
- rm -f tmp-*
- rm -f micromips16*.o micromips32*.o m16*.o m32*.o
diff --git a/sim/mips/acinclude.m4 b/sim/mips/acinclude.m4
index efabd27e66b3..cb53334ff78d 100644
--- a/sim/mips/acinclude.m4
+++ b/sim/mips/acinclude.m4
@@ -335,3 +335,4 @@ AC_SUBST(SIM_MIPS_MULTI_SRC)
AC_SUBST(SIM_MIPS_MULTI_OBJ)
AM_CONDITIONAL([SIM_MIPS_GEN_MODE_SINGLE], [test "$SIM_MIPS_GEN" = "SINGLE"])
AM_CONDITIONAL([SIM_MIPS_GEN_MODE_M16], [test "$SIM_MIPS_GEN" = "M16"])
+AM_CONDITIONAL([SIM_MIPS_GEN_MODE_MULTI], [test "$SIM_MIPS_GEN" = "MULTI"])
diff --git a/sim/mips/local.mk b/sim/mips/local.mk
index b6e482e0fdac..9a0a5b598450 100644
--- a/sim/mips/local.mk
+++ b/sim/mips/local.mk
@@ -81,6 +81,12 @@ if SIM_MIPS_GEN_MODE_M16
%D%/stamp-gen-mode-m16-m16 \
%D%/stamp-gen-mode-m16-m32
endif
+if SIM_MIPS_GEN_MODE_MULTI
+%C%_BUILD_OUTPUTS += \
+ $(SIM_MIPS_MULTI_SRC) \
+ %D%/stamp-gen-mode-multi-igen \
+ %D%/stamp-gen-mode-multi-run
+endif
## This makes sure build tools are available before building the arch-subdirs.
SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
@@ -89,6 +95,7 @@ $(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
$(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single
$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M16): %D%/stamp-gen-mode-m16-m16
$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32): %D%/stamp-gen-mode-m16-m32
+$(SIM_MIPS_MULTI_SRC): %D%/stamp-gen-mode-multi-igen %D%/stamp-gen-mode-multi-run
%C%_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
%C%_IGEN_INSN = $(srcdir)/%D%/mips.igen
@@ -108,6 +115,8 @@ $(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32): %D%/stamp-gen-mode-m16-m32
%D%/vr.igen
%C%_IGEN_DC = $(srcdir)/%D%/mips.dc
%C%_M16_DC = $(srcdir)/%D%/m16.dc
+%C%_MICROMIPS32_DC = $(srcdir)/%D%/micromips.dc
+%C%_MICROMIPS16_DC = $(srcdir)/%D%/micromips16.dc
## NB: Since these can be built by a number of generators, care
## must be taken to ensure that they are only dependant on
@@ -211,6 +220,99 @@ $(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32): %D%/stamp-gen-mode-m16-m32
-n m32_support.c -f %D%/m32_support.c
$(AM_V_at)touch $@
+%D%/stamp-gen-mode-multi-igen: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_IGEN_DC) $(%C%_M16_DC) $(%C%_MICROMIPS32_DC) $(%C%_MICROMIPS16_DC) $(IGEN)
+ $(AM_V_GEN)\
+ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
+ p=`echo $${t} | sed -e 's/:.*//'` ; \
+ m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
+ f=`echo $${t} | sed -e 's/.*://'` ; \
+ case $${p} in \
+ micromips16*) \
+ e="-B 16 -H 15 -o $(%C%_MICROMIPS16_DC) -F 16" ;; \
+ micromips32* | micromips64*) \
+ e="-B 32 -H 31 -o $(%C%_MICROMIPS32_DC) -F $${f}" ;; \
+ micromips_m32*) \
+ e="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}"; \
+ m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
+ micromips_m64*) \
+ e="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}"; \
+ m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
+ m16*) \
+ e="-B 16 -H 15 -o $(%C%_M16_DC) -F 16" ;; \
+ *) \
+ e="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}" ;; \
+ esac; \
+ $(IGEN_RUN) \
+ $(%C%_IGEN_TRACE) \
+ $${e} \
+ -I $(srcdir)/%D% \
+ -Werror \
+ -Wnodiscard \
+ -M $${m} \
+ -G gen-direct-access \
+ -G gen-zero-r0 \
+ -i $(%C%_IGEN_INSN) \
+ -P $${p}_ \
+ -x \
+ -n $${p}_icache.h -hc %D%/$${p}_icache.h \
+ -n $${p}_icache.c -c %D%/$${p}_icache.c \
+ -n $${p}_semantics.h -hs %D%/$${p}_semantics.h \
+ -n $${p}_semantics.c -s %D%/$${p}_semantics.c \
+ -n $${p}_idecode.h -hd %D%/$${p}_idecode.h \
+ -n $${p}_idecode.c -d %D%/$${p}_idecode.c \
+ -n $${p}_model.h -hm %D%/$${p}_model.h \
+ -n $${p}_model.c -m %D%/$${p}_model.c \
+ -n $${p}_support.h -hf %D%/$${p}_support.h \
+ -n $${p}_support.c -f %D%/$${p}_support.c \
+ -n $${p}_engine.h -he %D%/$${p}_engine.h \
+ -n $${p}_engine.c -e %D%/$${p}_engine.c \
+ || exit; \
+ done
+ $(AM_V_at)touch $@
+
+%D%/stamp-gen-mode-multi-run: %D%/m16run.c %D%/micromipsrun.c
+ $(AM_V_GEN)\
+ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
+ case $${t} in \
+ m16*) \
+ m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
+ o=%D%/m16$${m}_run.c; \
+ sed < $(srcdir)/%D%/m16run.c > $$o.tmp \
+ -e "s/^sim_/m16$${m}_/" \
+ -e "/include/s/sim-engine/m16$${m}_engine/" \
+ -e "s/m16_/m16$${m}_/" \
+ -e "s/m32_/m32$${m}_/" \
+ || exit 1; \
+ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
+ ;;\
+ micromips32*) \
+ m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
+ o=%D%/micromips$${m}_run.c; \
+ sed < $(srcdir)/%D%/micromipsrun.c > $$o.tmp \
+ -e "s/^sim_/micromips32$${m}_/" \
+ -e "/include/s/sim-engine/micromips32$${m}_engine/" \
+ -e "s/micromips16_/micromips16$${m}_/" \
+ -e "s/micromips32_/micromips32$${m}_/" \
+ -e "s/m32_/m32$${m}_/" \
+ || exit 1; \
+ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
+ ;;\
+ micromips64*) \
+ m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
+ o=%D%/micromips$${m}_run.c; \
+ sed < $(srcdir)/%D%/micromipsrun.c > $$o.tmp \
+ -e "s/^sim_/micromips64$${m}_/" \
+ -e "/include/s/sim-engine/micromips64$${m}_engine/" \
+ -e "s/micromips16_/micromips16$${m}_/" \
+ -e "s/micromips32_/micromips64$${m}_/" \
+ -e "s/m32_/m64$${m}_/" \
+ || exit 1; \
+ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
+ ;;\
+ esac \
+ done
+ $(AM_V_at)touch $@
+
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
## These are created by mips/acinclude.m4 during configure time.
DISTCLEANFILES += %D%/multi-include.h %D%/multi-run.c
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 8/8] sim: build: clean up unused codegen logic
2022-12-25 19:28 ` [PATCH 1/8] sim: mips: rename multi_flags to igen_itable_flags Mike Frysinger
` (5 preceding siblings ...)
2022-12-25 19:28 ` [PATCH 7/8] sim: mips: hoist "multi" " Mike Frysinger
@ 2022-12-25 19:28 ` Mike Frysinger
6 siblings, 0 replies; 9+ messages in thread
From: Mike Frysinger @ 2022-12-25 19:28 UTC (permalink / raw)
To: gdb-patches
Now that all igen ports are in the top-level makefile, we don't need
this logic in any subdirs anymore, so clean it up.
---
sim/arch-subdir.mk.in | 3 ---
sim/common/Make-common.in | 9 +--------
2 files changed, 1 insertion(+), 11 deletions(-)
diff --git a/sim/arch-subdir.mk.in b/sim/arch-subdir.mk.in
index e6c779a20d57..cfde3f3fb785 100644
--- a/sim/arch-subdir.mk.in
+++ b/sim/arch-subdir.mk.in
@@ -73,6 +73,3 @@ SIM_INLINE = @SIM_INLINE@
SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
SIM_HW_OBJS = $(SIM_HW_DEVICES:%=dv-%.o)
@SIM_ENABLE_HW_FALSE@SIM_HW_OBJS =
-
-# TODO: Delete this once mips/Makefile.in igen moves to mips/local.mk.
-IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in
index 1e1ea0e7a202..f36cad4befd8 100644
--- a/sim/common/Make-common.in
+++ b/sim/common/Make-common.in
@@ -50,7 +50,6 @@ include $(srcroot)/gdb/silent-rules.mk
ifeq ($(V),0)
ECHO_STAMP = @echo " GEN "
-ECHO_IGEN = @echo " IGEN $(<F)";
else
ECHO_STAMP = @:
endif
@@ -79,11 +78,6 @@ COMPILE.post = -c -o $@
COMPILE = $(ECHO_CC) $(COMPILE.pre) $(ALL_CFLAGS) $(COMPILE.post)
POSTCOMPILE = @true
-# igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
-# leak detection while running it.
-IGEN = ../igen/igen$(EXEEXT)
-IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
-
# Each simulator's Makefile.in defines one or more of these variables
# to override our settings as necessary. There is no need to define these
# in the simulator's Makefile.in if one is using the default value. In fact
@@ -271,8 +265,7 @@ TAGS: force
mostlyclean clean: $(SIM_EXTRA_CLEAN)
rm -f *.[oa] *~ core \
run$(EXEEXT) libsim.a \
- modules.c stamp-modules \
- tmp-mloop.hin tmp-mloop.h tmp-mloop.cin tmp-mloop.c
+ modules.c stamp-modules
distclean maintainer-clean realclean: clean
rm -f TAGS Makefile
--
2.39.0
^ permalink raw reply [flat|nested] 9+ messages in thread