From: Branislav Brzak <Branislav.Brzak@Syrmia.com>
To: "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Cc: Dragoslav Sicarov <Dragoslav.Sicarov@Syrmia.com>,
Djordje Todorovic <Djordje.Todorovic@syrmia.com>
Subject: [PATCH 0/1] riscv: Ensure LE instruction fetching
Date: Tue, 20 Jun 2023 11:46:13 +0000 [thread overview]
Message-ID: <AM6PR03MB4984910BF7AD4B6EFE024FC9985CA@AM6PR03MB4984.eurprd03.prod.outlook.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 411 bytes --]
Currently riscv gdb code looks at arch byte order
when fetching instructions. This works when the
target is LE, but on BE arch it will byte swap the
instruction, while the riscv spec defines all
instructions are LE encoded regardless of
system memory endianess.
Branislav Brzak (1):
gdb/riscv: Ensure LE instruction fetching
gdb/riscv-tdep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
next reply other threads:[~2023-06-20 11:46 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-20 11:46 Branislav Brzak [this message]
2023-06-20 11:47 ` Branislav Brzak
2023-06-20 14:08 ` Tom Tromey
2023-06-20 14:21 ` Branislav Brzak
2023-06-20 16:42 ` Tom Tromey
2023-06-21 9:11 ` Branislav Brzak
2023-07-06 16:13 ` Tom Tromey
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