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From: Luis Machado <luis.machado@arm.com>
To: Simon Marchi <simark@simark.ca>,
	Andrew Burgess <aburgess@redhat.com>,
	gdb-patches@sourceware.org, pedro@palves.net
Cc: marcan@marcan.st
Subject: Re: [PATCH] aarch64: Check for valid inferior thread/regcache before reading pauth registers
Date: Fri, 17 Mar 2023 17:25:57 +0000	[thread overview]
Message-ID: <ec4d0558-ea88-f765-1bab-edc774178a17@arm.com> (raw)
In-Reply-To: <6aa8edc2-81f7-b08a-805f-9a20185995d2@simark.ca>

On 3/17/23 17:15, Simon Marchi wrote:
>> ... despite the call to switch_to_no_thread in switch_to_inferior_no_thread from do_target_wait_1
>> in the backtrace above, the call to ps_xfer_memory sets inferior_ptid momentarily before reading
>> memory:
>>
>>
>> static ps_err_e
>> ps_xfer_memory (const struct ps_prochandle *ph, psaddr_t addr,
>>                  gdb_byte *buf, size_t len, int write)
>> {
>>    scoped_restore_current_inferior restore_inferior;
>>    set_current_inferior (ph->thread->inf);
>>
>>    scoped_restore_current_program_space restore_current_progspace;
>>    set_current_program_space (ph->thread->inf->pspace);
>>
>>    scoped_restore save_inferior_ptid = make_scoped_restore (&inferior_ptid);
>>    inferior_ptid = ph->thread->ptid;
>>
>>    CORE_ADDR core_addr = ps_addr_to_core_addr (addr);
>>
>>    int ret;
>>    if (write)
>>      ret = target_write_memory (core_addr, buf, len);
>>    else
>>      ret = target_read_memory (core_addr, buf, len);
>>    return (ret == 0 ? PS_OK : PS_ERR);
>> }
>>
>>
>> Maybe this shouldn't happen, or maybe it is just an unfortunate state to be in. But this
>> prevents the use of target_has_registers to guard against the lack of registers, since,
>> although current_thread_ is still nullptr, inferior_ptid is valid and is not null_ptid.
> It's needed to set inferior_ptid here because it's how we communicate to
> the targets which inferior / thread we want to read or write memory
> from.  And we can't set current_thread_ to the the correponding
> thread_info *, because it does not exist at this point (we are in the
> process of creating it).  And the problem is that
> aarch64_remove_non_address_bits assumes there is a current_thread_.  Can
> we change aarch64_remove_non_address_bits to get the regcache using the
> ptid?
> 
>    get_thread_regcache (current_inferior ()->process_target (), inferior_ptid);

What would be the outcome of this call when there is no active register cache because the inferior
has been killed? I think it would assert in find_inferior_pid with a null_ptid.

aarch64_remove_non_address_bits gets called for any memory access, so we may be in a state where we have
a valid stopped thread, a valid running thread, core file, no inferiors (just reading symbols/bfd) and so
on.

Or were you considering doing a check for inferior_ptid == null_ptid before calling get_thread_regcache?

> 
> Simon
> 


  reply	other threads:[~2023-03-17 17:26 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-16 10:39 Luis Machado
2023-03-16 15:49 ` Andrew Burgess
2023-03-16 23:15   ` Luis Machado
2023-03-17 17:15     ` Simon Marchi
2023-03-17 17:25       ` Luis Machado [this message]
2023-03-17 17:29         ` Simon Marchi
2023-03-17 17:38           ` Luis Machado
2023-03-20 20:06     ` Andrew Burgess
2023-03-22 10:26       ` Luis Machado
2023-03-23 10:56 ` [PATCH, v2] " Luis Machado
2023-03-23 18:25   ` Kevin Buettner
2023-03-23 18:27     ` Luis Machado
2023-03-23 18:32       ` Luis Machado
2023-03-23 18:39         ` Kevin Buettner
2023-03-24  6:28           ` Luis Machado
2023-03-24  8:19   ` Luis Machado
2023-03-24 13:42     ` Luis Machado

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