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From: "bruno at clisp dot org" <sourceware-bugzilla@sourceware.org> To: glibc-bugs@sourceware.org Subject: [Bug math/30988] New: fesetexcept raises floating-point exception traps on ppc, ppc64, ppc64le Date: Sun, 22 Oct 2023 22:31:46 +0000 [thread overview] Message-ID: <bug-30988-131@http.sourceware.org/bugzilla/> (raw) https://sourceware.org/bugzilla/show_bug.cgi?id=30988 Bug ID: 30988 Summary: fesetexcept raises floating-point exception traps on ppc, ppc64, ppc64le Product: glibc Version: 2.37 Status: UNCONFIRMED Severity: normal Priority: P2 Component: math Assignee: unassigned at sourceware dot org Reporter: bruno at clisp dot org Target Milestone: --- Created attachment 15187 --> https://sourceware.org/bugzilla/attachment.cgi?id=15187&action=edit test case foo.c According to ISO C 23 § 7.6.4.4, fesetexcept is supposed to set floating-point exception flags without raising a trap. (Unlike feraiseexcept, which is supposed to raise a trap if feenableexcept() was called with the appropriate argument.) "This function changes the state of the floating-point exception flags, but does not cause any other side effects that might be associated with raising floating-point exceptions. 267) Footnote 267) Implementation extensions like traps for floating-point exceptions and IEC 60559 exception handling do not occur." That's not how glibc's implementation does it on powerpc, powerpc64, and ppc64le. How to reproduce: 1. Compile the attached program foo.c. $ gcc -Wall foo.c -lm or for the 32-bit powerpc architecture: $ gcc -m32 -Wall foo.c -lm 2. Run it. $ ./a.out Floating point exception 3. Run it under gdb. $ gdb a.out (gdb) run Starting program: /home/haible/a.out [Thread debugging using libthread_db enabled] Using host libthread_db library "/lib/powerpc64le-linux-gnu/libthread_db.so.1". Program received signal SIGFPE, Arithmetic exception. fesetexcept (excepts=536870912) at ../sysdeps/powerpc/fpu/fesetexcept.c:34 34 ../sysdeps/powerpc/fpu/fesetexcept.c: No such file or directory. (gdb) x/i $pc => 0x7ffff7e21070 <fesetexcept+160>: mtfsf 255,f0,1 I think it is a hardware limitation that on PowerPC CPUs, setting a floating-point exception flag triggers a trap, when traps are enabled for the particular exception and globally for the thread (via prctl (PR_SET_FPEXC, PR_FP_EXC_PRECISE)). See "PowerPC User Instruction Set Architecture" Book I Version 2.01 <https://math-atlas.sourceforge.net/devel/assembly/ppc_isa.pdf>, p. 90: "In this architecture, if software is to be notified that a given kind of exception has occurred, the corre- sponding FPSCR exception enable bit must be set to 1 and a mode other than Ignore Exceptions Mode must be used. In this case the system floating-point enabled exception error handler is invoked if an enabled floating-point exception occurs. The system floating-point enabled exception error handler is also invoked if a Move To FPSCR instruction causes an exception bit and the corresponding enable bit both to be 1; the Move To FPSCR instruction is considered to cause the enabled exception." In this situation, I would expect the fesetexcept() function to return a non-zero value (as error indicator) and not modify the FPSCR register. -- You are receiving this mail because: You are on the CC list for the bug.
next reply other threads:[~2023-10-22 22:31 UTC|newest] Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-10-22 22:31 bruno at clisp dot org [this message] 2023-10-22 22:35 ` [Bug math/30988] " bruno at clisp dot org 2023-10-23 14:11 ` adhemerval.zanella at linaro dot org 2023-10-23 14:28 ` bruno at clisp dot org 2023-10-23 14:51 ` adhemerval.zanella at linaro dot org 2023-10-23 15:05 ` bruno at clisp dot org 2023-12-19 18:36 ` adhemerval.zanella at linaro dot org
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