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From: Vincent Chen <vincent.chen@sifive.com>
To: libc-alpha@sourceware.org, palmer@dabbelt.com
Cc: darius@bluespec.com, dj@redhat.com, andrew@sifive.com,
	Vincent Chen <vincent.chen@sifive.com>
Subject: [RFC patch 4/5] RISC-V: Extend MINSIGSTKSZ and SIGSTKSZ to backup RVV registers
Date: Mon, 13 Sep 2021 09:41:17 +0800	[thread overview]
Message-ID: <1631497278-29829-5-git-send-email-vincent.chen@sifive.com> (raw)
In-Reply-To: <1631497278-29829-1-git-send-email-vincent.chen@sifive.com>

As using RVV extension, the original MINSIGSTKSZ is not enough to
back up all RVV registers for the normal case. Therefore, the MINSIGSTKSZ
is expanded to about 5K and the SIGSTKSZ is expanded to about 16K. This
space is enough for the case that the VLENB of a vector register is 128
bytes. For the case that VLENB > 128 bytes, users can use
sysconf (_SC_MINSIGSTKSZ) and sysconf (_SC_SIGSTKSZ) to get the
appropriate signal stack size.
---
 sysdeps/unix/sysv/linux/riscv/bits/sigstack.h | 32 +++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/sigstack.h

diff --git a/sysdeps/unix/sysv/linux/riscv/bits/sigstack.h b/sysdeps/unix/sysv/linux/riscv/bits/sigstack.h
new file mode 100644
index 0000000..c18512f
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/riscv/bits/sigstack.h
@@ -0,0 +1,32 @@
+/* sigstack, sigaltstack definitions.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#ifndef _BITS_SIGSTACK_H
+#define _BITS_SIGSTACK_H 1
+
+#if !defined _SIGNAL_H && !defined _SYS_UCONTEXT_H
+# error "Never include this file directly.  Use <signal.h> instead"
+#endif
+
+/* Minimum stack size (5k+256 bytes) for a signal handler.  */
+#define MINSIGSTKSZ	5376
+
+/* System default stack size.  */
+#define SIGSTKSZ	16384
+
+#endif /* bits/sigstack.h */
-- 
2.7.4


  parent reply	other threads:[~2021-09-13  1:41 UTC|newest]

Thread overview: 79+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-13  1:41 [RFC patch 0/5] RISC-V: Add vector ISA support Vincent Chen
2021-09-13  1:41 ` [RFC patch 1/5] RISC-V: Remove riscv-specific sigcontext.h Vincent Chen
2021-09-13  1:41 ` [RFC patch 2/5] RISC-V: Reserve about 5K space in mcontext_t to support future ISA expansion Vincent Chen
2021-09-13 13:44   ` Florian Weimer
2021-09-13 13:52     ` Rich Felker
2021-09-16  8:02       ` Vincent Chen
2021-09-16  8:14         ` Florian Weimer
2021-09-18  3:04           ` Vincent Chen
2022-12-09  3:39             ` RISCV kernel struct sigcontext expansion for V regs and potential glibc ABI break (was Re: [RFC patch 2/5] RISC-V: Reserve about 5K space in mcontext_t to support future ISA expansion.) Vineet Gupta
2022-12-09  4:03               ` Vineet Gupta
2022-12-20 20:05               ` Adding V-ext regs to signal context w/o expanding kernel struct sigcontext to avoid glibc ABI break Vineet Gupta
2022-12-21 15:53                 ` Vincent Chen
2022-12-21 19:45                   ` Vineet Gupta
2022-12-21 19:52                     ` Vineet Gupta
2022-12-22  3:37                       ` Vincent Chen
2022-12-22 19:25                         ` Vineet Gupta
2022-12-23  2:27                           ` Vincent Chen
2022-12-23 19:42                             ` Vineet Gupta
2022-12-22  5:32                       ` Richard Henderson
2022-12-22 18:33                         ` Andy Chiu
2022-12-22 20:27                           ` Vineet Gupta
2022-12-28 10:53                             ` Andy Chiu
2023-01-03 19:17                               ` Vineet Gupta
2023-01-04 16:34                                 ` Andy Chiu
2023-01-04 20:46                                   ` Vineet Gupta
2023-01-04 21:29                                     ` Philipp Tomsich
2023-01-04 21:37                                       ` Andrew Waterman
2023-01-04 22:43                                       ` Vineet Gupta
2023-01-09 13:33                                         ` Kito Cheng
2023-01-09 19:16                                           ` Vineet Gupta
2023-01-10 13:21                                             ` Kito Cheng
2023-01-10 18:07                                               ` Auto-enabling V unit and/or use of elf attributes (was Re: Adding V-ext regs to signal context w/o expanding kernel struct sigcontext to avoid glibc ABI break) Vineet Gupta
2023-01-11  1:22                                                 ` Richard Henderson
2023-01-11  4:28                                                   ` Jeff Law
2023-01-11  4:57                                                     ` Richard Henderson
2023-01-11  5:07                                                       ` Jeff Law
2023-01-11  6:00                                                         ` Andy Chiu
2023-01-11  6:20                                                           ` Jeff Law
2023-01-11  9:28                                                             ` Andy Chiu
2023-01-11 12:13                                                               ` Andy Chiu
2023-01-23 12:17                                                                 ` Conor Dooley
2023-01-23 13:29                                                                   ` Andy Chiu
2023-01-11  5:05                                                   ` Anup Patel
2023-01-11  5:23                                                   ` Richard Henderson
2022-12-22 22:33                           ` Adding V-ext regs to signal context w/o expanding kernel struct sigcontext to avoid glibc ABI break Richard Henderson
2022-12-22 23:47                           ` Conor Dooley
2022-12-22 23:58                             ` Vineet Gupta
2022-12-22 20:30                         ` Vineet Gupta
2022-12-22 21:38                           ` Andrew Waterman
2022-12-22  1:50                     ` Vincent Chen
2022-12-22  5:34                     ` Richard Henderson
2021-09-16 23:56         ` [RFC patch 2/5] RISC-V: Reserve about 5K space in mcontext_t to support future ISA expansion Ben Woodard
2021-09-18  3:15           ` Vincent Chen
2021-09-20 16:41             ` DJ Delorie
2021-09-20 17:10               ` Florian Weimer
2021-10-01  1:43                 ` Vincent Chen
2021-10-01 12:08                   ` Adhemerval Zanella
2021-09-17 17:03         ` Rich Felker
2021-09-18  3:19           ` Vincent Chen
2021-09-13  1:41 ` [RFC patch 3/5] RISC-V: Save and restore VCSR when doing user context switch Vincent Chen
2021-09-14 23:48   ` Joseph Myers
2021-09-15  0:13     ` Andrew Waterman
2021-09-16  9:20       ` Vincent Chen
2021-10-01 13:04   ` Adhemerval Zanella
2021-09-13  1:41 ` Vincent Chen [this message]
2021-09-13 13:51   ` [RFC patch 4/5] RISC-V: Extend MINSIGSTKSZ and SIGSTKSZ to backup RVV registers Rich Felker
2021-09-16  9:25     ` Vincent Chen
2021-09-13  1:41 ` [RFC 5/5] RISC-V: Expand PTHREAD_STACK_MIN to support RVV environment Vincent Chen
2021-09-14 23:43   ` Joseph Myers
2021-09-15 10:42     ` Florian Weimer
2021-09-15 14:31       ` H.J. Lu
2021-09-16 10:21         ` Vincent Chen
2021-09-13 19:11 ` [RFC patch 0/5] RISC-V: Add vector ISA support Vineet Gupta
2021-09-15 19:37   ` Jim Wilson
2021-11-09 19:21 ` Darius Rad
2021-11-09 19:30   ` Andrew Waterman
2021-11-09 22:03     ` Darius Rad
2021-11-09 22:18       ` Andrew Waterman
2021-11-10 11:39         ` Darius Rad

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