From: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>
To: caiyinyu <caiyinyu@loongson.cn>,
libc-alpha@sourceware.org, joseph_myers@mentor.com,
carlos@redhat.com, i.swmail@xen0n.name
Subject: Re: [PATCH v7 06/13] LoongArch: Atomic and Locking Routines
Date: Wed, 20 Jul 2022 11:32:54 -0300 [thread overview]
Message-ID: <5c9e8112-23d4-4f13-17ce-25a16c601779@linaro.org> (raw)
In-Reply-To: <20220719012056.1461897-7-caiyinyu@loongson.cn>
LGTM. We really need to remove this old atomic wrappers / implementations...
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
On 18/07/22 22:20, caiyinyu wrote:
> ---
> .../sysv/linux/loongarch/atomic-machine.h | 147 ++++++++++++++++++
> 1 file changed, 147 insertions(+)
> create mode 100644 sysdeps/unix/sysv/linux/loongarch/atomic-machine.h
>
> diff --git a/sysdeps/unix/sysv/linux/loongarch/atomic-machine.h b/sysdeps/unix/sysv/linux/loongarch/atomic-machine.h
> new file mode 100644
> index 0000000000..d1b8f1c11b
> --- /dev/null
> +++ b/sysdeps/unix/sysv/linux/loongarch/atomic-machine.h
> @@ -0,0 +1,147 @@
> +/* Atomic operations.
> + Copyright (C) 2022 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library. If not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#ifndef _LINUX_LOONGARCH_BITS_ATOMIC_H
> +#define _LINUX_LOONGARCH_BITS_ATOMIC_H 1
> +
> +#define atomic_full_barrier() __sync_synchronize ()
> +
> +#define __HAVE_64B_ATOMICS (__loongarch_grlen >= 64)
> +#define USE_ATOMIC_COMPILER_BUILTINS 1
> +#define ATOMIC_EXCHANGE_USES_CAS 0
> +
> +/* Compare and exchange.
> + For all "bool" routines, we return FALSE if exchange succesful. */
> +
> +#define __arch_compare_and_exchange_bool_8_int(mem, newval, oldval, model) \
> + ({ \
> + typeof (*mem) __oldval = (oldval); \
> + !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \
> + __ATOMIC_RELAXED); \
> + })
> +
> +#define __arch_compare_and_exchange_bool_16_int(mem, newval, oldval, model) \
> + ({ \
> + typeof (*mem) __oldval = (oldval); \
> + !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \
> + __ATOMIC_RELAXED); \
> + })
> +
> +#define __arch_compare_and_exchange_bool_32_int(mem, newval, oldval, model) \
> + ({ \
> + typeof (*mem) __oldval = (oldval); \
> + !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \
> + __ATOMIC_RELAXED); \
> + })
> +
> +#define __arch_compare_and_exchange_bool_64_int(mem, newval, oldval, model) \
> + ({ \
> + typeof (*mem) __oldval = (oldval); \
> + !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \
> + __ATOMIC_RELAXED); \
> + })
> +
> +#define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \
> + ({ \
> + typeof (*mem) __oldval = (oldval); \
> + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \
> + __ATOMIC_RELAXED); \
> + __oldval; \
> + })
> +
> +#define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \
> + ({ \
> + typeof (*mem) __oldval = (oldval); \
> + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \
> + __ATOMIC_RELAXED); \
> + __oldval; \
> + })
> +
> +#define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \
> + ({ \
> + typeof (*mem) __oldval = (oldval); \
> + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \
> + __ATOMIC_RELAXED); \
> + __oldval; \
> + })
> +
> +#define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \
> + ({ \
> + typeof (*mem) __oldval = (oldval); \
> + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \
> + __ATOMIC_RELAXED); \
> + __oldval; \
> + })
> +
> +/* Atomic compare and exchange. */
> +
> +#define atomic_compare_and_exchange_bool_acq(mem, new, old) \
> + __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, mem, new, old, \
> + __ATOMIC_ACQUIRE)
> +
> +#define atomic_compare_and_exchange_val_acq(mem, new, old) \
> + __atomic_val_bysize (__arch_compare_and_exchange_val, int, mem, new, old, \
> + __ATOMIC_ACQUIRE)
> +
> +#define atomic_compare_and_exchange_val_rel(mem, new, old) \
> + __atomic_val_bysize (__arch_compare_and_exchange_val, int, mem, new, old, \
> + __ATOMIC_RELEASE)
> +
> +/* Atomic exchange (without compare). */
> +
> +#define __arch_exchange_8_int(mem, newval, model) \
> + __atomic_exchange_n (mem, newval, model)
> +
> +#define __arch_exchange_16_int(mem, newval, model) \
> + __atomic_exchange_n (mem, newval, model)
> +
> +#define __arch_exchange_32_int(mem, newval, model) \
> + __atomic_exchange_n (mem, newval, model)
> +
> +#define __arch_exchange_64_int(mem, newval, model) \
> + __atomic_exchange_n (mem, newval, model)
> +
> +#define atomic_exchange_acq(mem, value) \
> + __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_ACQUIRE)
> +
> +#define atomic_exchange_rel(mem, value) \
> + __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_RELEASE)
> +
> +/* Atomically add value and return the previous (unincremented) value. */
> +
> +#define __arch_exchange_and_add_8_int(mem, value, model) \
> + __atomic_fetch_add (mem, value, model)
> +
> +#define __arch_exchange_and_add_16_int(mem, value, model) \
> + __atomic_fetch_add (mem, value, model)
> +
> +#define __arch_exchange_and_add_32_int(mem, value, model) \
> + __atomic_fetch_add (mem, value, model)
> +
> +#define __arch_exchange_and_add_64_int(mem, value, model) \
> + __atomic_fetch_add (mem, value, model)
> +
> +#define atomic_exchange_and_add_acq(mem, value) \
> + __atomic_val_bysize (__arch_exchange_and_add, int, mem, value, \
> + __ATOMIC_ACQUIRE)
> +
> +#define atomic_exchange_and_add_rel(mem, value) \
> + __atomic_val_bysize (__arch_exchange_and_add, int, mem, value, \
> + __ATOMIC_RELEASE)
> +
> +#endif /* bits/atomic.h */
next prev parent reply other threads:[~2022-07-20 14:32 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-19 1:20 [PATCH v7 00/13] GLIBC LoongArch PATCHES caiyinyu
2022-07-19 1:20 ` [PATCH v7 01/13] LoongArch: Add LoongArch entries to config.h.in caiyinyu
2022-07-21 21:02 ` Adhemerval Zanella Netto
2022-07-19 1:20 ` [PATCH v7 02/13] LoongArch: Add relocations and ELF flags to elf.h and scripts/glibcelf.py caiyinyu
2022-07-21 21:02 ` Adhemerval Zanella Netto
2022-07-19 1:20 ` [PATCH v7 03/13] LoongArch: ABI Implementation caiyinyu
2022-07-20 12:29 ` Adhemerval Zanella Netto
2022-07-19 1:20 ` [PATCH v7 04/13] LoongArch: Thread-Local Storage Support caiyinyu
2022-07-20 14:34 ` Adhemerval Zanella Netto
2022-07-19 1:20 ` [PATCH v7 05/13] LoongArch: Generic <math.h> and soft-fp Routines caiyinyu
2022-07-20 13:04 ` Adhemerval Zanella Netto
2022-07-19 1:20 ` [PATCH v7 06/13] LoongArch: Atomic and Locking Routines caiyinyu
2022-07-20 14:32 ` Adhemerval Zanella Netto [this message]
2022-07-19 1:20 ` [PATCH v7 07/13] LoongArch: Linux Syscall Interface caiyinyu
2022-07-20 14:35 ` Adhemerval Zanella Netto
2022-07-27 5:27 ` WANG Xuerui
2022-07-27 5:32 ` WANG Xuerui
2022-07-27 11:16 ` Adhemerval Zanella Netto
2022-07-27 13:01 ` WANG Xuerui
2022-07-27 19:22 ` Adhemerval Zanella Netto
2022-07-19 1:20 ` [PATCH v7 08/13] LoongArch: Linux ABI caiyinyu
2022-07-20 16:37 ` Adhemerval Zanella Netto
2022-07-20 17:19 ` [PATCH v7 00/13] GLIBC LoongArch PATCHES Adhemerval Zanella Netto
2022-07-21 2:44 ` caiyinyu
2022-07-24 9:49 ` WANG Xuerui
2022-07-24 11:51 ` Xi Ruoyao
2022-07-24 12:02 ` WANG Xuerui
2022-07-25 8:21 ` caiyinyu
2022-07-25 8:28 ` Xi Ruoyao
2022-07-25 1:58 ` 刘振松
2022-07-25 8:01 ` Xi Ruoyao
2022-07-25 13:27 ` Adhemerval Zanella Netto
2022-07-25 14:14 ` caiyinyu
2022-07-26 12:35 ` caiyinyu
2022-07-26 12:42 ` Adhemerval Zanella Netto
2022-07-26 14:00 ` Mark Wielaard
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5c9e8112-23d4-4f13-17ce-25a16c601779@linaro.org \
--to=adhemerval.zanella@linaro.org \
--cc=caiyinyu@loongson.cn \
--cc=carlos@redhat.com \
--cc=i.swmail@xen0n.name \
--cc=joseph_myers@mentor.com \
--cc=libc-alpha@sourceware.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).