From: "Junxian Zhu" <zhujunxian@oss.cipunited.com>
To: "YunQiang Su" <wzssyqa@gmail.com>
Cc: <libc-alpha@sourceware.org>
Subject: Re: [PATCH 2/2] MIPS: Hard-float rounding instructions support
Date: Tue, 26 Dec 2023 10:48:38 +0800 [thread overview]
Message-ID: <c8c2f5c0-d6f3-4011-afbd-db54122b57b3@oss.cipunited.com> (raw)
In-Reply-To: <CAKcpw6Wt8xcx0Lvz1k3EkDaJVjKnm_AwFNnCpMA139GO+nYnJw@mail.gmail.com>
在 2023/12/25 20:36, YunQiang Su 写道:
>
>
> Junxian Zhu <zhujunxian@oss.cipunited.com> 于 2023年12月25日周一
> 18:38写道：
>
> From: Junxian Zhu <zhujunxian@oss.cipunited.com>
>
> Use hardware floating-point rounding instructions to implement
> roundeven, trunc, ceil and floor.
>
> * sysdeps/mips/mips32/Implies: Add source path.
> * sysdeps/mips/mips64/Implies: Likewise.
> * sysdeps/mips/fpu/Makefile: Newfile.
> * sysdeps/mips/fpu/s_ceil.c: Likewise.
> * sysdeps/mips/fpu/s_ceil_fpu.S: Likewise.
> * sysdeps/mips/fpu/s_ceilf.c: Likewise.
> * sysdeps/mips/fpu/s_ceilf_fpu.S: Likewise.
> * sysdeps/mips/fpu/s_floor.c: Likewise.
> * sysdeps/mips/fpu/s_floor_fpu.S: Likewise.
> * sysdeps/mips/fpu/s_floorf.c: Likewise.
> * sysdeps/mips/fpu/s_floorf_fpu.S: Likewise.
> * sysdeps/mips/fpu/s_roundeven.c: Likewise.
> * sysdeps/mips/fpu/s_roundeven_fpu.S: Likewise.
> * sysdeps/mips/fpu/s_roundevenf.c: Likewise.
> * sysdeps/mips/fpu/s_roundevenf_fpu.S: Likewise.
> * sysdeps/mips/fpu/s_trunc.c: Likewise.
> * sysdeps/mips/fpu/s_trunc_fpu.S: Likewise.
> * sysdeps/mips/fpu/s_truncf.c: Likewise.
> * sysdeps/mips/fpu/s_truncf_fpu.S: Likewise.
>
> Signed-off-by: Rong Zhang <rongrong@oss.cipunited.com>
> Signed-off-by: Junxian Zhu <zhujunxian@oss.cipunited.com>
> ---
> sysdeps/mips/fpu/Makefile | 12 ++++
> sysdeps/mips/fpu/s_ceil.c | 30 ++++++++++
> sysdeps/mips/fpu/s_ceil_fpu.S | 90
> +++++++++++++++++++++++++++++
> sysdeps/mips/fpu/s_ceilf.c | 30 ++++++++++
> sysdeps/mips/fpu/s_ceilf_fpu.S | 82 ++++++++++++++++++++++++++
> sysdeps/mips/fpu/s_floor.c | 24 ++++++++
> sysdeps/mips/fpu/s_floor_fpu.S | 88 ++++++++++++++++++++++++++++
> sysdeps/mips/fpu/s_floorf.c | 24 ++++++++
> sysdeps/mips/fpu/s_floorf_fpu.S | 80 +++++++++++++++++++++++++
> sysdeps/mips/fpu/s_roundeven.c | 24 ++++++++
> sysdeps/mips/fpu/s_roundeven_fpu.S | 87 ++++++++++++++++++++++++++++
> sysdeps/mips/fpu/s_roundevenf.c | 24 ++++++++
> sysdeps/mips/fpu/s_roundevenf_fpu.S | 79 +++++++++++++++++++++++++
> sysdeps/mips/fpu/s_trunc.c | 24 ++++++++
> sysdeps/mips/fpu/s_trunc_fpu.S | 84 +++++++++++++++++++++++++++
> sysdeps/mips/fpu/s_truncf.c | 24 ++++++++
> sysdeps/mips/fpu/s_truncf_fpu.S | 76 ++++++++++++++++++++++++
> sysdeps/mips/mips32/Implies | 1 +
> sysdeps/mips/mips64/Implies | 1 +
> 19 files changed, 884 insertions(+)
> create mode 100644 sysdeps/mips/fpu/Makefile
> create mode 100644 sysdeps/mips/fpu/s_ceil.c
> create mode 100644 sysdeps/mips/fpu/s_ceil_fpu.S
> create mode 100644 sysdeps/mips/fpu/s_ceilf.c
> create mode 100644 sysdeps/mips/fpu/s_ceilf_fpu.S
> create mode 100644 sysdeps/mips/fpu/s_floor.c
> create mode 100644 sysdeps/mips/fpu/s_floor_fpu.S
> create mode 100644 sysdeps/mips/fpu/s_floorf.c
> create mode 100644 sysdeps/mips/fpu/s_floorf_fpu.S
> create mode 100644 sysdeps/mips/fpu/s_roundeven.c
> create mode 100644 sysdeps/mips/fpu/s_roundeven_fpu.S
> create mode 100644 sysdeps/mips/fpu/s_roundevenf.c
> create mode 100644 sysdeps/mips/fpu/s_roundevenf_fpu.S
> create mode 100644 sysdeps/mips/fpu/s_trunc.c
> create mode 100644 sysdeps/mips/fpu/s_trunc_fpu.S
> create mode 100644 sysdeps/mips/fpu/s_truncf.c
> create mode 100644 sysdeps/mips/fpu/s_truncf_fpu.S
>
> diff --git a/sysdeps/mips/fpu/Makefile b/sysdeps/mips/fpu/Makefile
> new file mode 100644
> index 0000000000..ad537d6bf1
> --- /dev/null
> +++ b/sysdeps/mips/fpu/Makefile
> @@ -0,0 +1,12 @@
> +ifeq ($(subdir),math)
> +sysdep_routines += s_floor_fpu s_floorf_fpu \
> + s_ceil_fpu s_ceilf_fpu \
> + s_trunc_fpu s_truncf_fpu \
> + s_roundeven_fpu s_roundevenf_fpu
> +
> +libm-sysdep_routines += s_floor_fpu s_floorf_fpu \
> + s_ceil_fpu s_ceilf_fpu \
> + s_trunc_fpu s_truncf_fpu \
> + s_roundeven_fpu s_roundevenf_fpu
> +
> +endif
> diff --git a/sysdeps/mips/fpu/s_ceil.c b/sysdeps/mips/fpu/s_ceil.c
> new file mode 100644
> index 0000000000..91a90a70c5
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_ceil.c
> @@ -0,0 +1,30 @@
> +/* Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library. If not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +/*
> + * ceil(x)
> + * Return x rounded toward -inf to integral value
> + * Method:
> + * Bit twiddling.
> + */
> +
> +#if !((__mips_fpr == 64) && (__mips_hard_float == 1)
> \
> + && ((__mips == 32 && __mips_isa_rev > 1) || __mips == 64))
> +
>
>
> __mips_fpr == 64
> this condition should not be here.
> it means fp64.
> In fact your code should also support fp32 and fpxx.
>
> +# include <sysdeps/ieee754/dbl-64/s_ceil.c>
> +
> +#endif
> diff --git a/sysdeps/mips/fpu/s_ceil_fpu.S
> b/sysdeps/mips/fpu/s_ceil_fpu.S
> new file mode 100644
> index 0000000000..13d4f85ad3
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_ceil_fpu.S
> @@ -0,0 +1,90 @@
> +/* Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library. If not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +/*
> + * ceil(x)
> + * Return x rounded toward -inf to integral value
> + * Method:
> + * Bit twiddling.
> + */
> +
> +#if ((__mips_fpr == 64) && (__mips_hard_float == 1) && ((__mips
> == 32 && __mips_isa_rev > 1) || __mips == 64))
> +#include <sys/regdef.h>
> +#include <sysdep.h>
> +#include <libm-alias-double.h>
> +
> +ENTRY(__ceil)
> + .set push
> + .set noreorder
> + .set noat
> +# $f0=ret, $f12=double, a0=int64/int32_h, a1=int32_l, a2=sign, a3=exp
> +#if __mips == 64
> + dmfc1 a0, $f12 # assign int64
> +#else
> + mfhc1 a0, $f12 # assign int64
> +#endif
> + cfc1 t0, $f26
> + ceil.l.d $f0, $f12
> +#if __mips == 64
> +#if __mips_isa_rev > 1
> + dext a3, a0, 52, 11 # assign exp
> +#else
> + dsrl a3, a0, 52
> + andi a3, a3, 0x7ff
> +#endif
> +#else
> + ext a3, a0, 20, 11 # assign exp
> +#endif
> + sltiu AT, a3, 1023
> + bnez AT, SMALL # exp < 1023
> + ctc1 t0, $f26
> + sltiu AT, a3, 1023+54
> + beqz AT, BIG # exp >= 1023+54
> + li AT, 0x7ff
> +
> + jr ra
> + cvt.d.l $f0, $f0
> +BIG:
> + bne AT, a3, RETURN_AS_IS # exp != 0x7ff, no frac
> + nop
> +NAN_INF:
> + jr ra
> + add.d $f0, $f12, $f12 # return double + double
> +SMALL:
> +#if __mips == 64
> + dsrl a2, a0, 63
> +#else
> + srl a2, a0, 31
> +#endif
> + beqz a2, SMALL_POSITIVE # sign == 0
> + nop
> +SMALL_NEGATIVE: # return -0.0
> + jr ra
> + neg.d $f0, $f0
> +SMALL_POSITIVE:
> + jr ra
> + cvt.d.l $f0, $f0
> +RETURN_AS_IS:
> + jr ra
> + mov.d $f0, $f12
> + .set pop
> +
> +END (__ceil)
> +libm_alias_double (__ceil, ceil)
> +
> +#endif
> +
> diff --git a/sysdeps/mips/fpu/s_ceilf.c b/sysdeps/mips/fpu/s_ceilf.c
> new file mode 100644
> index 0000000000..a7f81c7539
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_ceilf.c
> @@ -0,0 +1,30 @@
> +/* Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library. If not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +/*
> + * ceil(x)
> + * Return x rounded toward -inf to integral value
> + * Method:
> + * Bit twiddling.
> + */
> +
> +#if !((__mips_fpr == 64) && (__mips_hard_float == 1)
> \
> + && ((__mips == 32 && __mips_isa_rev > 1) || __mips == 64))
> +
> +# include <sysdeps/ieee754/flt-32/s_ceilf.c>
> +
> +#endif
> diff --git a/sysdeps/mips/fpu/s_ceilf_fpu.S
> b/sysdeps/mips/fpu/s_ceilf_fpu.S
> new file mode 100644
> index 0000000000..7952894f73
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_ceilf_fpu.S
> @@ -0,0 +1,82 @@
> +/* Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library. If not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +/*
> + * ceil(x)
> + * Return x rounded toward -inf to integral value
> + * Method:
> + * Bit twiddling.
> + */
> +
> +#if ((__mips_fpr == 64) && (__mips_hard_float == 1) && ((__mips
> == 32 && __mips_isa_rev > 1) || __mips == 64))
> +#include <sys/regdef.h>
> +#include <sysdep.h>
> +#include <libm-alias-float.h>
> +
> +ENTRY(__ceilf)
> + .set push
> + .set noreorder
> + .set noat
> +# f0=ret, f12=float, a0=int32, a2=sign, a3=exp
> + mfc1 a0, $f12 # assign int32
> + cfc1 t0, $f26
> + ceil.l.s $f0, $f12
> +#if __mips == 64
> +#if __mips_isa_rev > 1
> + dext a3, a0, 23, 8 # assign exp
> +#else
> + dsrl a3, a0, 23
> + andi a3, a3, 0x1ff
> +#endif
> +#else
> + ext a3, a0, 23, 8 # assign exp
> +#endif
> + sltiu AT, a3, 127
> + bnez AT, SMALL # exp < 127
> + ctc1 t0, $f26
> + sltiu AT, a3, 127+25
> + beqz AT, BIG # exp >= 127+25
> + li AT, 0xff
> +
> + jr ra
> + cvt.s.l $f0, $f0
> +BIG:
> + bne AT, a3, RETURN_AS_IS # exp != 0xff, no frac
> + nop
> +NAN_INF:
> + jr ra
> + add.s $f0, $f12, $f12 # return double + double
> +SMALL:
> + srl a2, a0, 31
> + beqz a2, SMALL_POSITIVE # sign == 0
> + nop
> +SMALL_NEGATIVE: # return -0.0
> + jr ra
> + neg.s $f0, $f0
> +SMALL_POSITIVE:
> + jr ra
> + cvt.s.l $f0, $f0
> +RETURN_AS_IS:
> + jr ra
> + mov.s $f0, $f12
> + .set pop
> +
> +END (__ceilf)
> +libm_alias_float (__ceil, ceil)
> +
> +#endif
> +
> diff --git a/sysdeps/mips/fpu/s_floor.c b/sysdeps/mips/fpu/s_floor.c
> new file mode 100644
> index 0000000000..4b43dc9ad9
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_floor.c
> @@ -0,0 +1,24 @@
> +/* Round double to integer away from zero.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if !((__mips_fpr == 64) && (__mips_hard_float == 1)
> \
> + && ((__mips == 32 && __mips_isa_rev > 1) || __mips == 64))
> +
> +# include <sysdeps/ieee754/dbl-64/s_floor.c>
> +
> +#endif
> diff --git a/sysdeps/mips/fpu/s_floor_fpu.S
> b/sysdeps/mips/fpu/s_floor_fpu.S
> new file mode 100644
> index 0000000000..fda661fd3a
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_floor_fpu.S
> @@ -0,0 +1,88 @@
> +/* Round double to integer away from zero.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if ((__mips_fpr == 64) && (__mips_hard_float == 1) && ((__mips
> == 32 && __mips_isa_rev > 1) || __mips == 64))
> +#include <sys/regdef.h>
> +#include <sysdep.h>
> +#include <libm-alias-double.h>
> +
> +ENTRY(__floor)
> + .set push
> + .set noreorder
> + .set noat
> +# f0=ret, f12=double, a0=int64/int32_h, a1=int32_l, a2=sign, a3=exp
> +#if __mips == 64
> + dmfc1 a0, $f12 # assign int64
> +#else
> + mfhc1 a0, $f12 # assign int64
> +#endif
> + cfc1 t0, $f26
> + floor.l.d $f0, $f12
> +#if __mips == 64
> +#if __mips_isa_rev > 1
> + dext a3, a0, 52, 11 # assign exp
> +#else
> + dsrl a3, a0, 52
> + andi a3, a3, 0x7ff
> +#endif
> +#else
> + ext a3, a0, 20, 11 # assign exp
> +#endif
> + sltiu AT, a3, 1023
> + bnez AT, SMALL # exp < 1023
> + ctc1 t0, $f26
> + sltiu AT, a3, 1023+54
> + beqz AT, BIG # exp >= 1023+54
> + li AT, 0x7ff
> +
> + jr ra
> + cvt.d.l $f0, $f0
> +BIG:
> + bne AT, a3, RETURN_AS_IS # exp != 0x7ff, no frac
> + nop
> +NAN_INF:
> + jr ra
> + add.d $f0, $f12, $f12 # return double + double
> +SMALL:
> +#if __mips == 64
> + dsrl a2, a0, 63
> +#else
> + srl a2, a0, 31
> +#endif
> + beqz a2, SMALL_POSITIVE # sign == 0
> + li AT, 0xbff # used by SMALL_NEGATIVE
> +SMALL_NEGATIVE:
> + mfhc1 t1, $f0
> + bnez t1, SMALL_POSITIVE # sign == 0
> + nop
> +
> + jr ra
> + neg.d $f0, $f0
> +SMALL_POSITIVE:
> + jr ra
> + cvt.d.l $f0, $f0
> +RETURN_AS_IS:
> + jr ra
> + mov.d $f0, $f12
> + .set pop
> +
> +END (__floor)
> +libm_alias_double (__floor, floor)
> +
> +#endif
> +
> diff --git a/sysdeps/mips/fpu/s_floorf.c b/sysdeps/mips/fpu/s_floorf.c
> new file mode 100644
> index 0000000000..30cfda7820
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_floorf.c
> @@ -0,0 +1,24 @@
> +/* Round double to integer away from zero.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if !((__mips_fpr == 64) && (__mips_hard_float == 1)
> \
> + && ((__mips == 32 && __mips_isa_rev > 1) || __mips == 64))
> +
> +# include <sysdeps/ieee754/flt-32/s_floorf.c>
> +
> +#endif
> diff --git a/sysdeps/mips/fpu/s_floorf_fpu.S
> b/sysdeps/mips/fpu/s_floorf_fpu.S
> new file mode 100644
> index 0000000000..8edd234dbc
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_floorf_fpu.S
> @@ -0,0 +1,80 @@
> +/* Round double to integer away from zero.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if ((__mips_fpr == 64) && (__mips_hard_float == 1) && ((__mips
> == 32 && __mips_isa_rev > 1) || __mips == 64))
> +#include <sys/regdef.h>
> +#include <sysdep.h>
> +#include <libm-alias-float.h>
> +
> +ENTRY(__floorf)
> + .set push
> + .set noreorder
> + .set noat
> +# f0=ret, f12=float, a0=int32, a2=sign, a3=exp
> + mfc1 a0, $f12 # assign int32
> + cfc1 t0, $f26
> + floor.l.s $f0, $f12
> +#if __mips == 64
> +#if __mips_isa_rev > 1
> + dext a3, a0, 23, 8 # assign exp
> +#else
> + dsrl a3, a0, 23
> + andi a3, a3, 0x1ff
> +#endif
> +#else
> + ext a3, a0, 23, 8 # assign exp
> +#endif
> + sltiu AT, a3, 127
> + bnez AT, SMALL # exp < 127
> + ctc1 t0, $f26
> + sltiu AT, a3, 127+25
> + beqz AT, BIG # exp >= 127+25
> + li AT, 0xff
> +
> + jr ra
> + cvt.s.l $f0, $f0
> +BIG:
> + bne AT, a3, RETURN_AS_IS # exp != 0xff, no frac
> + nop
> +NAN_INF:
> + jr ra
> + add.s $f0, $f12, $f12 # return double + double
> +SMALL:
> + srl a2, a0, 31
> + beqz a2, SMALL_POSITIVE # sign == 0
> + li AT, 0xbff # used by SMALL_NEGATIVE
> +SMALL_NEGATIVE:
> + mfhc1 t1, $f0
> + bnez t1, SMALL_POSITIVE # sign == 0
> + nop
> +
> + jr ra
> + neg.s $f0, $f0
> +SMALL_POSITIVE:
> + jr ra
> + cvt.s.l $f0, $f0
> +RETURN_AS_IS:
> + jr ra
> + mov.s $f0, $f12
> + .set pop
> +
> +END (__floorf)
> +libm_alias_float (__floor, floor)
> +
> +#endif
> +
> diff --git a/sysdeps/mips/fpu/s_roundeven.c
> b/sysdeps/mips/fpu/s_roundeven.c
> new file mode 100644
> index 0000000000..dace85a70b
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_roundeven.c
> @@ -0,0 +1,24 @@
> +/* Round to nearest integer value, rounding halfway cases to even.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if !((__mips_fpr == 64) && (__mips_hard_float == 1)
> \
> + && ((__mips == 32 && __mips_isa_rev > 1) || __mips == 64))
> +
> +# include <sysdeps/ieee754/dbl-64/s_roundeven.c>
> +
> +#endif
> diff --git a/sysdeps/mips/fpu/s_roundeven_fpu.S
> b/sysdeps/mips/fpu/s_roundeven_fpu.S
> new file mode 100644
> index 0000000000..aef6434886
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_roundeven_fpu.S
> @@ -0,0 +1,87 @@
> +/* Round to nearest integer value, rounding halfway cases to even.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if ((__mips_fpr == 64) && (__mips_hard_float == 1) && ((__mips
> == 32 && __mips_isa_rev > 1) || __mips == 64))
> +#include <sys/regdef.h>
> +#include <sysdep.h>
> +#include <libm-alias-double.h>
> +
> +ENTRY(__roundeven)
> + .set push
> + .set noreorder
> + .set noat
> +# f0=ret, f12=double, a0=int64/int32_h, a1=int32_l, a2=sign, a3=exp
> +#if __mips == 64
> + dmfc1 a0, $f12 # assign int64
> +#else
> + mfhc1 a0, $f12 # assign int64
> +#endif
> + cfc1 t0, $f26
> + round.l.d $f0, $f12
> +#if __mips == 64
> +#if __mips_isa_rev > 1
> + dext a3, a0, 52, 11 # assign exp
> +#else
> + dsrl a3, a0, 52
> + andi a3, a3, 0x7ff
> +#endif
> +#else
> + ext a3, a0, 20, 11 # assign exp
> +#endif
> + sltiu AT, a3, 1023
> + bnez AT, SMALL # exp < 1023
> + ctc1 t0, $f26
> + sltiu AT, a3, 1023+54
> + beqz AT, BIG # exp >= 1023+54
> + li AT, 0x7ff
> +
> + jr ra
> + cvt.d.l $f0, $f0
> +BIG:
> + bne AT, a3, RETURN_AS_IS # exp != 0x7ff, no frac
> + nop
> +NAN_INF:
> + jr ra
> + add.d $f0, $f12, $f12 # return double + double
> +SMALL:
> +#if __mips == 64
> + dsrl a2, a0, 63
> +#else
> + srl a2, a0, 31
> +#endif
> + beqz a2, SMALL_POSITIVE # sign == 0
> + nop
> +SMALL_NEGATIVE:
> + mfhc1 t1, $f0
> + bnez t1, SMALL_POSITIVE # sign == 0
> + nop
> +
> + jr ra
> + neg.d $f0, $f0
> +SMALL_POSITIVE:
> + jr ra
> + cvt.d.l $f0, $f0
> +RETURN_AS_IS:
> + jr ra
> + mov.d $f0, $f12
> + .set pop
> +
> +END (__roundeven)
> +libm_alias_double (__roundeven, roundeven)
> +
> +#endif
> diff --git a/sysdeps/mips/fpu/s_roundevenf.c
> b/sysdeps/mips/fpu/s_roundevenf.c
> new file mode 100644
> index 0000000000..5bb35901db
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_roundevenf.c
> @@ -0,0 +1,24 @@
> +/* Round to nearest integer value, rounding halfway cases to even.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if !((__mips_fpr == 64) && (__mips_hard_float == 1)
> \
> + && ((__mips == 32 && __mips_isa_rev > 1) || __mips == 64))
> +
> +# include <sysdeps/ieee754/flt-32/s_roundevenf.c>
> +
> +#endif
> diff --git a/sysdeps/mips/fpu/s_roundevenf_fpu.S
> b/sysdeps/mips/fpu/s_roundevenf_fpu.S
> new file mode 100644
> index 0000000000..e946e50d8f
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_roundevenf_fpu.S
> @@ -0,0 +1,79 @@
> +/* Round to nearest integer value, rounding halfway cases to even.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if ((__mips_fpr == 64) && (__mips_hard_float == 1) && ((__mips
> == 32 && __mips_isa_rev > 1) || __mips == 64))
> +#include <sys/regdef.h>
> +#include <sysdep.h>
> +#include <libm-alias-float.h>
> +
> +ENTRY(__roundevenf)
> + .set push
> + .set noreorder
> + .set noat
> +# f0=ret, f12=float, a0=int32, a2=sign, a3=exp
> + mfc1 a0, $f12 # assign int32
> + cfc1 t0, $f26
> + round.l.s $f0, $f12
> +#if __mips == 64
> +#if __mips_isa_rev > 1
> + dext a3, a0, 23, 8 # assign exp
> +#else
> + dsrl a3, a0, 23
> + andi a3, a3, 0x1ff
> +#endif
> +#else
> + ext a3, a0, 23, 8 # assign exp
> +#endif
> + sltiu AT, a3, 127
> + bnez AT, SMALL # exp < 127
> + ctc1 t0, $f26
> + sltiu AT, a3, 127+25
> + beqz AT, BIG # exp >= 127+25
> + li AT, 0xff
> +
> + jr ra
> + cvt.s.l $f0, $f0
> +BIG:
> + bne AT, a3, RETURN_AS_IS # exp != 0xff, no frac
> + nop
> +NAN_INF:
> + jr ra
> + add.s $f0, $f12, $f12 # return double + double
> +SMALL:
> + srl a2, a0, 31
> + beqz a2, SMALL_POSITIVE # sign == 0
> + nop
> +SMALL_NEGATIVE:
> + mfhc1 t1, $f0
> + bnez t1, SMALL_POSITIVE # sign == 0
> + nop
> +
> + jr ra
> + neg.s $f0, $f0
> +SMALL_POSITIVE:
> + jr ra
> + cvt.s.l $f0, $f0
> +RETURN_AS_IS:
> + jr ra
> + mov.s $f0, $f12
> + .set pop
> +
> +END (__roundevenf)
> +libm_alias_float (__roundeven, roundeven)
> +
> +#endif
> diff --git a/sysdeps/mips/fpu/s_trunc.c b/sysdeps/mips/fpu/s_trunc.c
> new file mode 100644
> index 0000000000..3865026c70
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_trunc.c
> @@ -0,0 +1,24 @@
> +/* Truncate argument to nearest integral value not larger than
> the argument.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if !((__mips_fpr == 64) && (__mips_hard_float == 1)
> \
> + && ((__mips == 32 && __mips_isa_rev > 1) || __mips == 64))
> +
> +# include <sysdeps/ieee754/dbl-64/s_trunc.c>
> +
> +#endif
> diff --git a/sysdeps/mips/fpu/s_trunc_fpu.S
> b/sysdeps/mips/fpu/s_trunc_fpu.S
> new file mode 100644
> index 0000000000..3a7947507f
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_trunc_fpu.S
> @@ -0,0 +1,84 @@
> +/* Truncate argument to nearest integral value not larger than
> the argument.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if ((__mips_fpr == 64) && (__mips_hard_float == 1) && ((__mips
> == 32 && __mips_isa_rev > 1) || __mips == 64))
> +#include <sys/regdef.h>
> +#include <sysdep.h>
> +#include <libm-alias-double.h>
> +
> +ENTRY(__trunc)
> + .set push
> + .set noreorder
> + .set noat
> +# f0=ret, f12=double, a0=int64/int32_h, a1=int32_l, a2=sign, a3=exp
> +#if __mips == 64
> + dmfc1 a0, $f12 # assign int64
> +#else
> + mfhc1 a0, $f12 # assign int64
> +#endif
> + cfc1 t0, $f26
> + trunc.l.d $f0, $f12
> +#if __mips == 64
> +#if __mips_isa_rev > 1
> + dext a3, a0, 52, 11 # assign exp
> +#else
> + dsrl a3, a0, 52
> + andi a3, a3, 0x7ff
> +#endif
> +#else
> + ext a3, a0, 20, 11 # assign exp
> +#endif
> + sltiu AT, a3, 1023
> + bnez AT, SMALL # exp < 1023
> + ctc1 t0, $f26
> + sltiu AT, a3, 1023+54
> + beqz AT, BIG # exp >= 1023+54
> + li AT, 0x7ff
> +
> + jr ra
> + cvt.d.l $f0, $f0
> +BIG:
> + bne AT, a3, RETURN_AS_IS # exp != 0x7ff, no frac
> + nop
> +NAN_INF:
> + jr ra
> + add.d $f0, $f12, $f12 # return double + double
> +SMALL:
> +#if __mips == 64
> + dsrl a2, a0, 63
> +#else
> + srl a2, a0, 31
> +#endif
> + beqz a2, SMALL_POSITIVE # sign == 0
> + nop
> +SMALL_NEGATIVE: # return -0.0
> + jr ra
> + neg.d $f0, $f0
> +SMALL_POSITIVE:
> + jr ra
> + cvt.d.l $f0, $f0
> +RETURN_AS_IS:
> + jr ra
> + mov.d $f0, $f12
> + .set pop
> +
> +END (__trunc)
> +libm_alias_double (__trunc, trunc)
> +
> +#endif
> +
> diff --git a/sysdeps/mips/fpu/s_truncf.c b/sysdeps/mips/fpu/s_truncf.c
> new file mode 100644
> index 0000000000..59ef17bf74
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_truncf.c
> @@ -0,0 +1,24 @@
> +/* Truncate argument to nearest integral value not larger than
> the argument.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if !((__mips_fpr == 64) && (__mips_hard_float == 1)
> \
> + && ((__mips == 32 && __mips_isa_rev > 1) || __mips == 64))
> +
> +# include <sysdeps/ieee754/flt-32/s_truncf.c>
> +
> +#endif
> diff --git a/sysdeps/mips/fpu/s_truncf_fpu.S
> b/sysdeps/mips/fpu/s_truncf_fpu.S
> new file mode 100644
> index 0000000000..1878d88e3c
> --- /dev/null
> +++ b/sysdeps/mips/fpu/s_truncf_fpu.S
> @@ -0,0 +1,76 @@
> +/* Truncate argument to nearest integral value not larger than
> the argument.
> + Copyright (C) 2023 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be
> useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library; if not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#if ((__mips_fpr == 64) && (__mips_hard_float == 1) && ((__mips
> == 32 && __mips_isa_rev > 1) || __mips == 64))
> +#include <sys/regdef.h>
> +#include <sysdep.h>
> +#include <libm-alias-float.h>
> +
> +ENTRY(__truncf)
> + .set push
> + .set noreorder
> + .set noat
> +# f0=ret, f12=float, a0=int32, a2=sign, a3=exp
> + mfc1 a0, $f12 # assign int32
> + cfc1 t0, $f26
> + trunc.l.s $f0, $f12
> +#if __mips == 64
> +#if __mips_isa_rev > 1
> + dext a3, a0, 23, 8 # assign exp
> +#else
> + dsrl a3, a0, 23
> + andi a3, a3, 0x1ff
> +#endif
> +#else
> + ext a3, a0, 23, 8 # assign exp
> +#endif
> + sltiu AT, a3, 127
> + bnez AT, SMALL # exp < 127
> + ctc1 t0, $f26
> + sltiu AT, a3, 127+25
> + beqz AT, BIG # exp >= 127+25
> + li AT, 0xff
> +
> + jr ra
> + cvt.s.l $f0, $f0
> +BIG:
> + bne AT, a3, RETURN_AS_IS # exp != 0xff, no frac
> + nop
> +NAN_INF:
> + jr ra
> + add.s $f0, $f12, $f12 # return double + double
> +SMALL:
> + srl a2, a0, 31
> + beqz a2, SMALL_POSITIVE # sign == 0
> + nop
> +SMALL_NEGATIVE: # return -0.0
> + jr ra
> + neg.s $f0, $f0
> +SMALL_POSITIVE:
> + jr ra
> + cvt.s.l $f0, $f0
> +RETURN_AS_IS:
> + jr ra
> + mov.s $f0, $f12
> + .set pop
> +
> +END (__truncf)
> +libm_alias_float (__trunc, trunc)
> +
> +#endif
> +
> diff --git a/sysdeps/mips/mips32/Implies b/sysdeps/mips/mips32/Implies
> index 6473f2517c..71b3678c6c 100644
> --- a/sysdeps/mips/mips32/Implies
> +++ b/sysdeps/mips/mips32/Implies
> @@ -1,3 +1,4 @@
> +mips/fpu
> mips/ieee754
> mips
> wordsize-32
> diff --git a/sysdeps/mips/mips64/Implies b/sysdeps/mips/mips64/Implies
> index 826ff1541f..8885ebd564 100644
> --- a/sysdeps/mips/mips64/Implies
> +++ b/sysdeps/mips/mips64/Implies
> @@ -1,4 +1,5 @@
> # MIPS uses IEEE 754 floating point.
> +mips/fpu
> mips/ieee754
> ieee754/flt-32
> ieee754/dbl-64
> --
> 2.43.0.windows.1
>
According to restrictions about rounding instructions in MIPS
instructions manual, "The result of this instruction is UNPREDICTABLE if
the processor is executing in the FR=0 32-bit FPU register model; it is
predictable if executing on a 64-bit FPU in the FR=1 mode, but not with
FR=0, and not on a 32-bit FPU.".
It means that such MIPS rounding instruction could only work correct in
the FR=1 mode, and fp64 is the only ABI can make sure MIPS FPU running
at FR=1 mode. If we support fp32 or fpxx, the result will be UNPREDICTABLE.
next prev parent reply other threads:[~2023-12-26 2:48 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-25 10:35 [PATCH 0/2] Add hard-float rounding instructions support for MIPS architecture Junxian Zhu
2023-12-25 10:35 ` [PATCH 1/2] limb-alias-double.h: Fix missing semicolon Junxian Zhu
2023-12-25 10:35 ` [PATCH 2/2] MIPS: Hard-float rounding instructions support Junxian Zhu
2023-12-25 10:51 ` Xi Ruoyao
2023-12-26 2:37 ` Junxian Zhu
2023-12-26 8:29 ` Xi Ruoyao
2023-12-26 20:12 ` Adhemerval Zanella Netto
2023-12-26 21:50 ` Xi Ruoyao
2023-12-26 22:50 ` Xi Ruoyao
2023-12-27 13:25 ` Adhemerval Zanella Netto
2024-01-02 10:08 ` Junxian Zhu
2024-01-02 9:43 ` Junxian Zhu
2024-01-02 9:57 ` Xi Ruoyao
[not found] ` <5f0f4c83-f6d8-4af3-8cce-e12cd5314da1@oss.cipunited.com>
2024-01-31 9:08 ` Xi Ruoyao
2024-01-25 13:58 ` Junxian Zhu
2024-01-25 14:37 ` Xi Ruoyao
2023-12-25 12:36 ` YunQiang Su
2023-12-26 2:48 ` Junxian Zhu [this message]
2024-01-02 9:51 ` Junxian Zhu
2023-12-29 1:00 ` Joseph Myers
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