From: "Junxian Zhu" <zhujunxian@oss.cipunited.com>
To: "Xi Ruoyao" <xry111@xry111.site>
Cc: <libc-alpha@sourceware.org>
Subject: Re: [PATCH 2/2] MIPS: Hard-float rounding instructions support
Date: Tue, 2 Jan 2024 17:43:04 +0800 [thread overview]
Message-ID: <ae79a262-8b36-424f-bcdf-304571193035@oss.cipunited.com> (raw)
In-Reply-To: <a8ceea9a3fa18d404c3ec356970ef2b275daedf9.camel@xry111.site>
在 2023/12/26 16:29, Xi Ruoyao 写道:
> On Tue, 2023-12-26 at 10:37 +0800, Junxian Zhu wrote:
>> 在 2023/12/25 18:51, Xi Ruoyao 写道:
>>> On Mon, 2023-12-25 at 18:35 +0800, Junxian Zhu wrote:
>>>
>>> /* snip */
>>>
>>>> +/*
>>>> + * ceil(x)
>>>> + * Return x rounded toward -inf to integral value
>>>> + * Method:
>>>> + * Bit twiddling.
>>>> + */
>>>> +
>>>> +#if ((__mips_fpr == 64) && (__mips_hard_float == 1) && ((__mips == 32 && __mips_isa_rev > 1) || __mips == 64))
>>>> +#include <sys/regdef.h>
>>>> +#include <sysdep.h>
>>>> +#include <libm-alias-double.h>
>>>> +
>>>> +ENTRY(__ceil)
>>>> + .set push
>>>> + .set noreorder
>>>> + .set noat
>>>> +# $f0=ret, $f12=double, a0=int64/int32_h, a1=int32_l, a2=sign, a3=exp
>>>> +#if __mips == 64
>>>> + dmfc1 a0, $f12 # assign int64
>>>> +#else
>>>> + mfhc1 a0, $f12 # assign int64
>>>> +#endif
>>>> + cfc1 t0, $f26
>>>> + ceil.l.d $f0, $f12
>>> No, C23 does not allow this function to raise an INEXACT exception, but
>>> ceil.l.d will do so.
>>>
>>> Such optimizations should be performed in GCC which can be controlled by
>>> the programmer with -std=c23 and/or -f[no-]fp-int-builtin-inexact, not
>>> in Glibc where we cannot know if the programmer wants to deviate from
>>> C23.
>> The cfc1 instruction will backup float point exception status before
>> running ceil.l.d, and the following ctc1 will restore float point
>> exception status to avoid INEXACT exception raised by ceil.l.d. It's the
>> same way like what have been done in s_ceil.S for i386.
> Still incorrect because when the Enable field of FCSR contains INEXACT a
> SIGFPE will be immediately delivered and there is no way to recover. A
> demonstration:
>
> #define _GNU_SOURCE
> #include <stdio.h>
> #include <fenv.h>
>
> int main()
> {
> printf("%d\n", feenableexcept(FE_INEXACT));
>
> double data = 114.514;
> long control;
> asm("cfc1\t%1,$f26\n\t"
> "ceil.l.d\t%0,%0\n\t"
> "cvt.d.l\t%0,%0\n\t"
> "ctc1\t%1,$f26": "+f"(data), "=r"(control));
> printf("%.15f\n", data);
> return 0;
> }
>
> On i386 the fnstenv instruction also masks out all the FP exceptions so
> this is not a problem. See commit 26b0bf96000a.
I can use "ctc1 $0, $28" to disable all float point exception to ensure
no FP exceptions occur at here. But it will introduce additional
consumption.
next prev parent reply other threads:[~2024-01-02 9:43 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-25 10:35 [PATCH 0/2] Add hard-float rounding instructions support for MIPS architecture Junxian Zhu
2023-12-25 10:35 ` [PATCH 1/2] limb-alias-double.h: Fix missing semicolon Junxian Zhu
2023-12-25 10:35 ` [PATCH 2/2] MIPS: Hard-float rounding instructions support Junxian Zhu
2023-12-25 10:51 ` Xi Ruoyao
2023-12-26 2:37 ` Junxian Zhu
2023-12-26 8:29 ` Xi Ruoyao
2023-12-26 20:12 ` Adhemerval Zanella Netto
2023-12-26 21:50 ` Xi Ruoyao
2023-12-26 22:50 ` Xi Ruoyao
2023-12-27 13:25 ` Adhemerval Zanella Netto
2024-01-02 10:08 ` Junxian Zhu
2024-01-02 9:43 ` Junxian Zhu [this message]
2024-01-02 9:57 ` Xi Ruoyao
[not found] ` <5f0f4c83-f6d8-4af3-8cce-e12cd5314da1@oss.cipunited.com>
2024-01-31 9:08 ` Xi Ruoyao
2024-01-25 13:58 ` Junxian Zhu
2024-01-25 14:37 ` Xi Ruoyao
2023-12-25 12:36 ` YunQiang Su
2023-12-26 2:48 ` Junxian Zhu
2024-01-02 9:51 ` Junxian Zhu
2023-12-29 1:00 ` Joseph Myers
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