[PATCH v5 0/5] LoongArch tls le model linker relaxation support.

[PATCH v5 0/5] LoongArch tls le model linker relaxation support.

[changjiachen]

This is the v5 version of patches to support loongarch linker tls le model relax.

Changes from v4:

* Modified the format of the code.

* Some comments are added to the relevant test cases.

* Changed the serial number of the new relocation.

R_LARCH_TLS_LE_HI20_R (RELOC_NUMBER: 110 ==> 121)
R_LARCH_TLS_LE_ADD_R  (RELOC_NUMBER: 111 ==> 122)
R_LARCH_TLS_LE_LO12_R (RELOC_NUMBER: 112 ==> 123)

Changes from v3:

* For the fourth operand in the add.d $a0,$a0,$a0,%le_add_r(a) insn, 
some exception information is added.

* Added add.d $a0,$a0,$a0,%le_add_r(a) instruction format to check 
test cases in gas/testsuite/gas/loongarch.

example:
a.s
add.d $a0,$a0,$a0,8
$ gas/as-new a.s
a.s: Assembler messages:
a.s:1: error: no match insn: add.d  $a0,$a0,$a0,8


Changes from v2:

* Some problems in the v2 patch are answered as follows.

Question: 

use ".reloc.,R_LARCH_TLS_LE_ADD_R,sym" to generate relocation 
or %le_add_r(sym) to generate relocation.

Reply: 

First, after a test, the R_LARCH_TLS_LE_ADD_R can be generated using ".reloc.,R_LARCH_TLS_LE_ADD_R,sym", 
or "%le_add_r(sym)". However,".reloc" generates R_LARCH_TLS_LE_ADD_R relocation directly, and it is not 
easy to add "R_LARCH_RELAX" relocation. "%le_add_r(sym)" Adds the R_LARCH_TLS_LE_ADD_R and R_LARCH_RELAX 
relocation commands, which is easier to implement.

Of course, there is another way to generate ".reloc.,R_LARCH_TLS_LE_ADD_R,sym" and 
".reloc.,R_LARCH_RELAX,sym" directly in gcc. However, this implementation causes the 
-mrelax/-mno-relax option to be set in both gcc and gas, which can be confusing.

One problem with this is that add.d $r12,$r12,$r2 and add.d $r12,$r12,$r2, 
%le_add_r(sym) are too similar, so I have to add comments in loongarch_fix_opcodes[]. 
The goal is to make it as clear as possible to developers.

* modified code format in loongarch_relax_tls_le(),use loongarch_relax_delete_bytes() 
instead of R_LARCH_DELETE to implement the delete instruction operation.

* modified R_LARCH_TLS_LE_ADD_R type_name:"tls_le_add_r"-->"le_add_r".

* modify comment information.

* some comments added to "add.d" in loongarch_opcode loongarch_fix_opcodes[].

* remove some unnecessary content from the ld/testsuite/ld-loongarch test case.




Changes from v1:

* Modified v1-0000-cover-letter.patch part of the explanatory content.

Before Modify:

example: __thread int a = 1;

old insn sequence:

lu12i.w $r12,%le_hi20_r(a)
ori     $r12,$r12,%le_lo12_r(a)
add.d   $r12,$r12,$r2,%le_add_r(a)
li.w  	$r13,$r0,1
stptr.w $r13,$r12,0

new insn sequence:

lu12i.w $r12,%le_hi20_r(a)
add.d   $r12,$r12,$r2,%le_add_r(a)
li.w  	$r13,$r0,1
st.w    $r13,$r12,%le_lo12_r(a)

After Modify:

example: __thread int a = 1;

old insn sequence(at the O0 optimization level):

lu12i.w $r12,%le_hi20(a)
ori     $r12,$r12,%le_lo12(a)
add.d   $r12,$r12,$r2
addi.w  $r13,$r0,1
stptr.w $r13,$r12,0

new insn sequence(at the O0 optimization level):

lu12i.w $r12,%le_hi20_r(a)
add.d   $r12,$r12,$r2,%le_add_r(a)
addi.w  $r13,$r0,1
st.w    $r13,$r12,%le_lo12_r(a)

changjiachen (5):
  LoongArch: bfd: Add support for tls le relax.
  LoongArch: include: Add support for tls le relax.
  LoongArch: opcodes: Add support for tls le relax.
  LoongArch: gas: Add support for tls le relax.
  LoongArch: ld: Add support for tls le relax.

 bfd/bfd-in2.h                                 |   4 +
 bfd/elfnn-loongarch.c                         |  75 +++++++++
 bfd/elfxx-loongarch.c                         |  55 ++++++-
 bfd/libbfd.h                                  |   3 +
 bfd/reloc.c                                   |   7 +
 gas/config/tc-loongarch.c                     |  31 ++++
 gas/testsuite/gas/loongarch/loongarch.exp     |   9 ++
 gas/testsuite/gas/loongarch/reloc.d           |  18 +++
 gas/testsuite/gas/loongarch/reloc.s           |  11 ++
 .../gas/loongarch/tls_le_insn_format_check.s  |  15 ++
 include/elf/loongarch.h                       |  12 ++
 ld/testsuite/ld-loongarch-elf/old-tls-le.s    |  23 +++
 .../relax-bound-check-tls-le.s                |  53 ++++++
 ld/testsuite/ld-loongarch-elf/relax-tls-le.s  |  26 +++
 ld/testsuite/ld-loongarch-elf/relax.exp       | 151 +++++++++++++++++-
 .../tls-relax-compatible-check-new.s          |  35 ++++
 .../tls-relax-compatible-check-old.s          |  33 ++++
 opcodes/loongarch-opc.c                       |   1 +
 18 files changed, 556 insertions(+), 6 deletions(-)
 create mode 100644 gas/testsuite/gas/loongarch/tls_le_insn_format_check.s
 create mode 100644 ld/testsuite/ld-loongarch-elf/old-tls-le.s
 create mode 100644 ld/testsuite/ld-loongarch-elf/relax-bound-check-tls-le.s
 create mode 100644 ld/testsuite/ld-loongarch-elf/relax-tls-le.s
 create mode 100644 ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-new.s
 create mode 100644 ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-old.s

-- 
2.40.0

[PATCH v5 1/5] LoongArch: bfd: Add support for tls le relax.

[changjiachen]

Add tls le relax support and related relocs in bfd.

New relocation related explanation can refer to the following url:
https://github.com/loongson/la-abi-specs/blob/release/laelf.adoc

This support does two main things:

1. Implement support for three new relocation items in bfd.

The three new relocation items are shown below:

R_LARCH_TLS_LE_ADD_R
R_LARCH_TLS_LE_HI20_R
R_LARCH_TLS_LE_LO12_R

2. ADD a new macro RELOCATE_TLS_TP32_HI20

Handle problems caused by symbol extensions in TLS LE, The processing
is similar to the macro RELOCATE_CALC_PC32_HI20 method.

3. Implement the tls le relax function.

bfd/ChangeLog:

	* bfd-in2.h: Add relocs related to tls le relax.
	* elfnn-loongarch.c:
	(loongarch_relax_tls_le): New function.
	(RELOCATE_TLS_TP32_HI20): New macro.
	(loongarch_elf_check_relocs): Add new reloc support.
	(perform_relocation): Likewise.
	(loongarch_elf_relocate_section): Handle new relocs related to relax.
	(loongarch_elf_relax_section): Likewise.
	* elfxx-loongarch.c:
	(LOONGARCH_HOWTO (R_LARCH_TLS_LE_ADD_R)): New reloc how to type.
	(LOONGARCH_HOWTO (R_LARCH_TLS_LE_HI20_R)): Likewise.
	(LOONGARCH_HOWTO (R_LARCH_TLS_LE_LO12_R)): Likewise.
	* libbfd.h: Add relocs related to tls le relax.
	* reloc.c: Likewise.
---
 bfd/bfd-in2.h         |  4 +++
 bfd/elfnn-loongarch.c | 75 +++++++++++++++++++++++++++++++++++++++++++
 bfd/elfxx-loongarch.c | 55 ++++++++++++++++++++++++++++---
 bfd/libbfd.h          |  3 ++
 bfd/reloc.c           |  7 ++++
 5 files changed, 139 insertions(+), 5 deletions(-)

diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 782845926ea..c522fef5641 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -7473,11 +7473,15 @@ enum bfd_reloc_code_real
   BFD_RELOC_LARCH_TLS_DESC64_HI12,
   BFD_RELOC_LARCH_TLS_DESC_LD,
   BFD_RELOC_LARCH_TLS_DESC_CALL,
+  BFD_RELOC_LARCH_TLS_LE_HI20_R,
+  BFD_RELOC_LARCH_TLS_LE_ADD_R,
+  BFD_RELOC_LARCH_TLS_LE_LO12_R,
   BFD_RELOC_LARCH_TLS_LD_PCREL20_S2,
   BFD_RELOC_LARCH_TLS_GD_PCREL20_S2,
   BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2,
   BFD_RELOC_UNUSED
 };
+
 typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
 
 reloc_howto_type *bfd_reloc_type_lookup
diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c
index bd448cda453..9a0bcb011ac 100644
--- a/bfd/elfnn-loongarch.c
+++ b/bfd/elfnn-loongarch.c
@@ -858,6 +858,7 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
 	  break;
 
 	case R_LARCH_TLS_LE_HI20:
+	case R_LARCH_TLS_LE_HI20_R:
 	case R_LARCH_SOP_PUSH_TLS_TPREL:
 	  if (!bfd_link_executable (info))
 	    return false;
@@ -2261,6 +2262,8 @@ perform_relocation (const Elf_Internal_Rela *rel, asection *input_section,
     case R_LARCH_GOT64_HI12:
     case R_LARCH_TLS_LE_HI20:
     case R_LARCH_TLS_LE_LO12:
+    case R_LARCH_TLS_LE_HI20_R:
+    case R_LARCH_TLS_LE_LO12_R:
     case R_LARCH_TLS_LE64_LO20:
     case R_LARCH_TLS_LE64_HI12:
     case R_LARCH_TLS_IE_PC_HI20:
@@ -2303,6 +2306,7 @@ perform_relocation (const Elf_Internal_Rela *rel, asection *input_section,
       break;
 
     case R_LARCH_RELAX:
+    case R_LARCH_TLS_LE_ADD_R:
       break;
 
     default:
@@ -2483,6 +2487,16 @@ loongarch_reloc_is_fatal (struct bfd_link_info *info,
 	relocation += 0x1000;				\
   })
 
+/* Handle problems caused by symbol extensions in TLS LE, The processing
+   is similar to the macro RELOCATE_CALC_PC32_HI20 method.  */
+#define RELOCATE_TLS_TP32_HI20(relocation)		\
+  ({							\
+    bfd_vma __lo = (relocation) & ((bfd_vma)0xfff);	\
+    if (__lo > 0x7ff)					\
+	relocation += 0x800;				\
+    relocation = relocation & ~(bfd_vma)0xfff;		\
+  })
+
 /* For example: pc is 0x11000010000100, symbol is 0x1812348ffff812
    offset = (0x1812348ffff812 & ~0xfff) - (0x11000010000100 & ~0xfff)
 	  = 0x712347ffff000
@@ -3481,6 +3495,13 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
 
 	  break;
 
+	case R_LARCH_TLS_LE_HI20_R:
+	  relocation -= elf_hash_table (info)->tls_sec->vma;
+
+	  RELOCATE_TLS_TP32_HI20 (relocation);
+
+	  break;
+
 	case R_LARCH_PCALA_LO12:
 	  /* Not support if sym_addr in 2k page edge.
 	     pcalau12i pc_hi20 (sym_addr)
@@ -3651,6 +3672,7 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
 
 	case R_LARCH_TLS_LE_HI20:
 	case R_LARCH_TLS_LE_LO12:
+	case R_LARCH_TLS_LE_LO12_R:
 	case R_LARCH_TLS_LE64_LO20:
 	case R_LARCH_TLS_LE64_HI12:
 	  BFD_ASSERT (resolved_local && elf_hash_table (info)->tls_sec);
@@ -4089,6 +4111,52 @@ loongarch_relax_delete_bytes (bfd *abfd,
 
   return true;
 }
+/* Relax tls le, mainly relax the process of getting TLS le symbolic addresses.
+
+before relax:				   after relax:
+
+lu12i.w      $r12,%le_hi20_r (sym)	   ==>  (instruction deleted).
+add.d	     $r12,$r12,$r2,%le_add_r (sym) ==>  (instruction deleted).
+st/addi/ld.w $r13,$r12,%le_lo12_r (sym)    ==>  st/addi/ld.w  $r13,$r2,%le_lo12_r (sym).  */
+static bool
+loongarch_relax_tls_le (bfd *abfd, asection *sec,
+			Elf_Internal_Rela *rel,
+			struct bfd_link_info *link_info,
+			bfd_vma symval)
+{
+  bfd_byte *contents = elf_section_data (sec)->this_hdr.contents;
+  uint32_t insn = bfd_get (32, abfd, contents + rel->r_offset);
+  static uint32_t insn_rj,insn_rd;
+  symval = symval - elf_hash_table (link_info)->tls_sec->vma;
+  /* Whether the symbol offset is in the interval (offset < 0x800).  */
+  if (ELFNN_R_TYPE ((rel + 1)->r_info == R_LARCH_RELAX) && (symval < 0x800))
+    {
+      switch (ELFNN_R_TYPE (rel->r_info))
+	{
+	case R_LARCH_TLS_LE_HI20_R:
+	case R_LARCH_TLS_LE_ADD_R:
+	  /* delete insn.  */
+	  rel->r_info = ELFNN_R_INFO (0, R_LARCH_NONE);
+	  loongarch_relax_delete_bytes (abfd, sec, rel->r_offset, 4, link_info);
+	  break;
+	case R_LARCH_TLS_LE_LO12_R:
+	  /* Change rj to $tp.  */
+	  insn_rj = 0x2 << 5;
+	  /* Get rd register.  */
+	  insn_rd = insn & 0x1f;
+	  /* Write symbol offset.  */
+	  symval <<= 10;
+	  /* Writes the modified instruction.  */
+	  insn = insn & 0xffc00000;
+	  insn = insn | symval | insn_rj | insn_rd;
+	  bfd_put (32, abfd, insn, contents + rel->r_offset);
+	  break;
+	default:
+	  break;
+	}
+    }
+  return true;
+}
 
 /* Relax pcalau12i,addi.d => pcaddi.  */
 static bool
@@ -4518,6 +4586,13 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec,
 	      rel->r_info = ELFNN_R_INFO (0, R_LARCH_NONE);
 	    }
 	  break;
+	case R_LARCH_TLS_LE_HI20_R:
+	case R_LARCH_TLS_LE_LO12_R:
+	case R_LARCH_TLS_LE_ADD_R:
+	  if (0 == info->relax_pass && (i + 2) <= sec->reloc_count)
+	    loongarch_relax_tls_le (abfd, sec, rel, info, symval);
+	  break;
+
 	case R_LARCH_PCALA_HI20:
 	  if (0 == info->relax_pass && (i + 4) <= sec->reloc_count)
 	    loongarch_relax_pcala_addi (abfd, sec, sym_sec, rel, symval,
diff --git a/bfd/elfxx-loongarch.c b/bfd/elfxx-loongarch.c
index 4fe8cbff14c..2c40fb02872 100644
--- a/bfd/elfxx-loongarch.c
+++ b/bfd/elfxx-loongarch.c
@@ -1776,9 +1776,56 @@ static loongarch_reloc_howto_type loongarch_howto_table[] =
 	 NULL,					/* adjust_reloc_bits.  */
 	 "desc_call"),				/* larch_reloc_type_name.  */
 
-  LOONGARCH_EMPTY_HOWTO (121),
-  LOONGARCH_EMPTY_HOWTO (122),
-  LOONGARCH_EMPTY_HOWTO (123),
+  LOONGARCH_HOWTO (R_LARCH_TLS_LE_HI20_R,	/* type (121).  */
+	 12,					/* rightshift.  */
+	 4,					/* size.  */
+	 20,					/* bitsize.  */
+	 false,					/* pc_relative.  */
+	 5,					/* bitpos.  */
+	 complain_overflow_signed,		/* complain_on_overflow.  */
+	 bfd_elf_generic_reloc,			/* special_function.  */
+	 "R_LARCH_TLS_LE_HI20_R",		/* name.  */
+	 false,					/* partial_inplace.  */
+	 0,					/* src_mask.  */
+	 0x1ffffe0,				/* dst_mask.  */
+	 false,					/* pcrel_offset.  */
+	 BFD_RELOC_LARCH_TLS_LE_HI20_R,		/* bfd_reloc_code_real_type.  */
+	 reloc_bits,				/* adjust_reloc_bits.  */
+	 "le_hi20_r"),				/* larch_reloc_type_name.  */
+
+  LOONGARCH_HOWTO (R_LARCH_TLS_LE_ADD_R,	/* type (122).  */
+	 0,					/* rightshift.  */
+	 0,					/* size.  */
+	 0,					/* bitsize.  */
+	 false,					/* pc_relative.  */
+	 0,					/* bitpos.  */
+	 complain_overflow_dont,		/* complain_on_overflow.  */
+	 bfd_elf_generic_reloc,			/* special_function.  */
+	 "R_LARCH_TLS_LE_ADD_R",		/* name.  */
+	 false,					/* partial_inplace.  */
+	 0,					/* src_mask.  */
+	 0,					/* dst_mask.  */
+	 false,					/* pcrel_offset.  */
+	 BFD_RELOC_LARCH_TLS_LE_ADD_R,		/* bfd_reloc_code_real_type.  */
+	 NULL,					/* adjust_reloc_bits.  */
+	 "le_add_r"),				/* larch_reloc_type_name.  */
+
+  LOONGARCH_HOWTO (R_LARCH_TLS_LE_LO12_R,	/* type (123).  */
+	 0,					/* rightshift.  */
+	 4,					/* size.  */
+	 12,					/* bitsize.  */
+	 false,					/* pc_relative.  */
+	 10,					/* bitpos.  */
+	 complain_overflow_signed,		/* complain_on_overflow.  */
+	 bfd_elf_generic_reloc,			/* special_function.  */
+	 "R_LARCH_TLS_LE_LO12_R",		/* name.  */
+	 false,					/* partial_inplace.  */
+	 0,					/* src_mask.  */
+	 0x3ffc00,				/* dst_mask.  */
+	 false,					/* pcrel_offset.  */
+	 BFD_RELOC_LARCH_TLS_LE_LO12_R,		/* bfd_reloc_code_real_type.  */
+	 reloc_bits,				/* adjust_reloc_bits.  */
+	 "le_lo12_r"),				/* larch_reloc_type_name.  */
 
   /* For pcaddi, ld_pc_hi20 + ld_pc_lo12 can relax to ld_pcrel20_s2.  */
   LOONGARCH_HOWTO (R_LARCH_TLS_LD_PCREL20_S2,	/* type (124).  */
@@ -1870,9 +1917,7 @@ reloc_howto_type *
 loongarch_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
 			     bfd_reloc_code_real_type code)
 {
-  /*
   BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) == R_LARCH_count);
-  */
 
   /* Fast search for new reloc types.  */
   if (BFD_RELOC_LARCH_B16 <= code && code < BFD_RELOC_LARCH_RELAX)
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 8dab44110a6..82ffd773513 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -3612,6 +3612,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_LARCH_TLS_DESC64_HI12",
   "BFD_RELOC_LARCH_TLS_DESC_LD",
   "BFD_RELOC_LARCH_TLS_DESC_CALL",
+  "BFD_RELOC_LARCH_TLS_LE_HI20_R",
+  "BFD_RELOC_LARCH_TLS_LE_ADD_R",
+  "BFD_RELOC_LARCH_TLS_LE_LO12_R",
   "BFD_RELOC_LARCH_TLS_LD_PCREL20_S2",
   "BFD_RELOC_LARCH_TLS_GD_PCREL20_S2",
   "BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 6fd0f1fb547..1030bc37647 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -8324,6 +8324,13 @@ ENUMX
 ENUMX
   BFD_RELOC_LARCH_TLS_DESC_CALL
 
+ENUMX
+  BFD_RELOC_LARCH_TLS_LE_HI20_R
+ENUMX
+  BFD_RELOC_LARCH_TLS_LE_ADD_R
+ENUMX
+  BFD_RELOC_LARCH_TLS_LE_LO12_R
+
 ENUMX
   BFD_RELOC_LARCH_TLS_LD_PCREL20_S2
 ENUMX
-- 
2.40.0

[PATCH v5 2/5] LoongArch: include: Add support for tls le relax.

[changjiachen]

Add new relocs number for tls le relax.

include/ChangeLog:

	* elf/loongarch.h:
	(RELOC_NUMBER (R_LARCH_TLS_LE_HI20_R, 121)): New relocs number.
	(RELOC_NUMBER (R_LARCH_TLS_LE_ADD_R, 122)): Likewise.
	(RELOC_NUMBER (R_LARCH_TLS_LE_LO12_R, 123)): Likewise.
---
 include/elf/loongarch.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/include/elf/loongarch.h b/include/elf/loongarch.h
index 6cfee164312..1deb6ba11cf 100644
--- a/include/elf/loongarch.h
+++ b/include/elf/loongarch.h
@@ -273,6 +273,18 @@ RELOC_NUMBER (R_LARCH_TLS_DESC64_HI12, 118)
 RELOC_NUMBER (R_LARCH_TLS_DESC_LD, 119)
 RELOC_NUMBER (R_LARCH_TLS_DESC_CALL, 120)
 
+/* TLS-LE-LUI
+   lu12i.w rd,%le_hi20_r (sym).  */
+RELOC_NUMBER (R_LARCH_TLS_LE_HI20_R, 121)
+
+/* TLS-LE-ADD
+   add.d   rd,rj,rk,%le_add_r (sym).  */
+RELOC_NUMBER (R_LARCH_TLS_LE_ADD_R, 122)
+
+/* TLS-LE-ST
+   st.w/addi.w/ld.w rd,rj,%le_lo12_r (sym).  */
+RELOC_NUMBER (R_LARCH_TLS_LE_LO12_R, 123)
+
 RELOC_NUMBER (R_LARCH_TLS_LD_PCREL20_S2, 124)
 RELOC_NUMBER (R_LARCH_TLS_GD_PCREL20_S2, 125)
 RELOC_NUMBER (R_LARCH_TLS_DESC_PCREL20_S2, 126)
-- 
2.40.0

[PATCH v5 3/5] LoongArch: opcodes: Add support for tls le relax.

[changjiachen]

Add new opcode for tls le relax.

	opcode/ChangeLog:

	* loongarch-opc.c: Add new loongarch opcode.
---
 opcodes/loongarch-opc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c
index a632373f5ed..44b5f612896 100644
--- a/opcodes/loongarch-opc.c
+++ b/opcodes/loongarch-opc.c
@@ -464,6 +464,7 @@ static struct loongarch_opcode loongarch_fix_opcodes[] =
   { 0x000c0000, 0xfffc0000,	"bytepick.d",	"r0:5,r5:5,r10:5,u15:3",	0,			0,	0,	0 },
   { 0x00100000, 0xffff8000,	"add.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
   { 0x00108000, 0xffff8000,	"add.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
+  { 0x00108000, 0xffff8000,	"add.d",	"r0:5,r5:5,r10:5,t",		0,			0,	0,	0 },
   { 0x00110000, 0xffff8000,	"sub.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
   { 0x00118000, 0xffff8000,	"sub.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
   { 0x00120000, 0xffff8000,	"slt",		"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-- 
2.40.0

[PATCH v5 4/5] LoongArch: gas: Add support for tls le relax.

[changjiachen]

Add tls le relax related relocs support and testsuites in gas.

The main test is three new relocation items,
R_LARCH_TLS_LE_ADD_R, R_LARCH_TLS_LE_HI20_R,
R_LARCH_TLS_LE_LO12_R can be generated properly
and tls le insn format check.

gas/ChangeLog:

	* config/tc-loongarch.c:
	(loongarch_args_parser_can_match_arg_helper): Add support for relax.
	* gas/testsuite/gas/loongarch/reloc.d: Likewise.
	* gas/testsuite/gas/loongarch/reloc.s: Likewise.
	* gas/testsuite/gas/loongarch/loongarch.exp: Likewise.
	* gas/testsuite/gas/loongarch/tls_le_insn_format_check.s: New test.
---
 gas/config/tc-loongarch.c                     | 31 +++++++++++++++++++
 gas/testsuite/gas/loongarch/loongarch.exp     |  9 ++++++
 gas/testsuite/gas/loongarch/reloc.d           | 18 +++++++++++
 gas/testsuite/gas/loongarch/reloc.s           | 11 +++++++
 .../gas/loongarch/tls_le_insn_format_check.s  | 15 +++++++++
 5 files changed, 84 insertions(+)
 create mode 100644 gas/testsuite/gas/loongarch/tls_le_insn_format_check.s

diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c
index def26daf634..ebd89461d2c 100644
--- a/gas/config/tc-loongarch.c
+++ b/gas/config/tc-loongarch.c
@@ -636,6 +636,29 @@ loongarch_args_parser_can_match_arg_helper (char esc_ch1, char esc_ch2,
 	  break;
 	}
       break;
+    /* This is used for TLS, where the fourth operand is %le_add_r,
+       to get a relocation applied to an add instruction, for relaxation to use.
+       Two conditions, ip->match_now and reloc_num, are used to check tls insn
+       to prevent cases like add.d $a0,$a0,$a0,8.  */
+    case 't':
+      ip->match_now =
+	loongarch_parse_expr (arg, ip->reloc_info + ip->reloc_num,
+			      reloc_num_we_have, &reloc_num, &imm) == 0;
+
+      if (!ip->match_now)
+	break;
+
+      if (reloc_num
+	  && (ip->reloc_info[ip->reloc_num].type == BFD_RELOC_LARCH_TLS_LE_ADD_R))
+	{
+	  ip->reloc_num += reloc_num;
+	  ip->reloc_info[ip->reloc_num].type = BFD_RELOC_LARCH_RELAX;
+	  ip->reloc_info[ip->reloc_num].value = const_0;
+	  ip->reloc_num++;
+	}
+      else
+	ip->match_now = 0;
+      break;
     case 's':
     case 'u':
       ip->match_now =
@@ -690,6 +713,14 @@ loongarch_args_parser_can_match_arg_helper (char esc_ch1, char esc_ch2,
 	      ip->reloc_num += reloc_num;
 	      reloc_type = ip->reloc_info[0].type;
 
+	      if (LARCH_opts.relax
+		    && (BFD_RELOC_LARCH_TLS_LE_HI20_R == reloc_type
+			|| BFD_RELOC_LARCH_TLS_LE_LO12_R == reloc_type))
+		{
+		  ip->reloc_info[ip->reloc_num].type = BFD_RELOC_LARCH_RELAX;
+		  ip->reloc_info[ip->reloc_num].value = const_0;
+		  ip->reloc_num++;
+		}
 	      if (LARCH_opts.relax && ip->macro_id
 		    && (BFD_RELOC_LARCH_PCALA_HI20 == reloc_type
 			|| BFD_RELOC_LARCH_PCALA_LO12 == reloc_type
diff --git a/gas/testsuite/gas/loongarch/loongarch.exp b/gas/testsuite/gas/loongarch/loongarch.exp
index 6d126fd4b0e..c0aa593d8a8 100644
--- a/gas/testsuite/gas/loongarch/loongarch.exp
+++ b/gas/testsuite/gas/loongarch/loongarch.exp
@@ -21,4 +21,13 @@
 if [istarget loongarch*-*-*] {
     run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
     gas_test_old bfd_reloc_8.s "" "bfd_reloc_8"
+    if [file exist "tls_le_insn_format_check.s "] {
+      set format [run_host_cmd "as" "tls_le_insn_format_check.s"]
+      if { [ regexp ".*no match insn.*" $format] } {
+	pass "loongarch tls le insn format pass"
+      } {
+	pass "loongarch tls le insn format fail"
+      }
+    }
+
 }
diff --git a/gas/testsuite/gas/loongarch/reloc.d b/gas/testsuite/gas/loongarch/reloc.d
index c3820c55f98..0458830f30b 100644
--- a/gas/testsuite/gas/loongarch/reloc.d
+++ b/gas/testsuite/gas/loongarch/reloc.d
@@ -165,3 +165,21 @@ Disassembly of section .text:
 [ 	]+134:[ 	]+R_LARCH_TLS_LE64_LO20[ 	]+TLSL1\+0x8
 [ 	]+138:[ 	]+03000085[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a0,[ 	]+0
 [ 	]+138:[ 	]+R_LARCH_TLS_LE64_HI12[ 	]+TLSL1\+0x8
+[ 	]+13c:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0,[ 	]+0
+[ 	]+13c:[ 	]+R_LARCH_TLS_LE_HI20_R[ 	]+TLSL1
+[ 	]+13c:[ 	]+R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+140:[ 	]+001090a5[ 	]+add.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+\$a0
+[ 	]+140:[ 	]+R_LARCH_TLS_LE_ADD_R[ 	]+TLSL1
+[ 	]+140:[ 	]+R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+144:[ 	]+29800085[ 	]+st.w[ 	]+\$a1,[ 	]+\$a0,[ 	]+0
+[ 	]+144:[ 	]+R_LARCH_TLS_LE_LO12_R[ 	]+TLSL1
+[ 	]+144:[ 	]+R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+148:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0,[ 	]+0
+[ 	]+148:[ 	]+R_LARCH_TLS_LE_HI20_R[ 	]+TLSL1\+0x8
+[ 	]+148:[ 	]+R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+14c:[ 	]+001090a5[ 	]+add.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+\$a0
+[ 	]+14c:[ 	]+R_LARCH_TLS_LE_ADD_R[ 	]+TLSL1\+0x8
+[ 	]+14c:[ 	]+R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+150:[ 	]+29800085[ 	]+st.w[ 	]+\$a1,[ 	]+\$a0,[ 	]+0
+[ 	]+150:[ 	]+R_LARCH_TLS_LE_LO12_R[ 	]+TLSL1\+0x8
+[ 	]+150:[ 	]+R_LARCH_RELAX[ 	]+\*ABS\*
diff --git a/gas/testsuite/gas/loongarch/reloc.s b/gas/testsuite/gas/loongarch/reloc.s
index a67fecd9429..0a343c11225 100644
--- a/gas/testsuite/gas/loongarch/reloc.s
+++ b/gas/testsuite/gas/loongarch/reloc.s
@@ -142,3 +142,14 @@ lu12i.w $r4,%le_hi20(TLSL1 + 0x8)
 ori $r5,$r4,%le_lo12(TLSL1 + 0x8)
 lu32i.d $r4,%le64_lo20(TLSL1 + 0x8)
 lu52i.d $r5,$r4,%le64_hi12(TLSL1 + 0x8)
+
+
+/* New TLS Insn.  */
+lu12i.w $r4,%le_hi20_r(TLSL1)
+add.d   $r5,$r5,$r4,%le_add_r(TLSL1)
+st.w $r5,$r4,%le_lo12_r(TLSL1)
+
+/* New TLS Insn with addend.  */
+lu12i.w $r4,%le_hi20_r(TLSL1 + 0x8)
+add.d   $r5,$r5,$r4,%le_add_r(TLSL1 + 0x8)
+st.w $r5,$r4,%le_lo12_r(TLSL1 + 0x8)
diff --git a/gas/testsuite/gas/loongarch/tls_le_insn_format_check.s b/gas/testsuite/gas/loongarch/tls_le_insn_format_check.s
new file mode 100644
index 00000000000..1b3c9d18b59
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/tls_le_insn_format_check.s
@@ -0,0 +1,15 @@
+/* Assemble the following assembly statements using as.
+
+   The test case is mainly to check the format of tls le type
+   symbolic address fetch instruction.Because in tls le symbolic
+   address acquisition, there will be a special add.d instruction,
+   which has four operands (add.d op1,op2,op3,op4),the first three
+   operands are registers, and the last operand is a relocation,
+   we need to format check the fourth operand.If it is not a correct
+   relocation type operand, we need to throw the relevant exception
+   message.
+
+   if a "no match insn" exception is thrown, the test passes;
+   otherwise, the test fails.  */
+
+add.d $a0,$a0,$a0,8
-- 
2.40.0

[PATCH v5 5/5] LoongArch: ld: Add support for tls le relax.

[changjiachen]

Add tls le relax related testsuites in ld.

The new test cases are mainly tested in three aspects:

1. tls le relax function correctness test.
2. tls le relax boundary check test.
3. tls le relax function compatibility test.

ld/testsuite/ChangeLog:

	* ld/testsuite/ld-loongarch-elf/relax.exp: Modify test.
	* ld/testsuite/ld-loongarch-elf/old-tls-le.s: New test.
	* ld/testsuite/ld-loongarch-elf/relax-bound-check-tls-le.s: Likewise.
	* ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-new.s: Likewise.
	* ld/testsuite/ld-loongarch-elf/relax-tls-le.s: Likewise.
	* ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-old.s: Likewise.
---
 ld/testsuite/ld-loongarch-elf/old-tls-le.s    |  23 +++
 .../relax-bound-check-tls-le.s                |  53 ++++++
 ld/testsuite/ld-loongarch-elf/relax-tls-le.s  |  26 +++
 ld/testsuite/ld-loongarch-elf/relax.exp       | 151 +++++++++++++++++-
 .../tls-relax-compatible-check-new.s          |  35 ++++
 .../tls-relax-compatible-check-old.s          |  33 ++++
 6 files changed, 320 insertions(+), 1 deletion(-)
 create mode 100644 ld/testsuite/ld-loongarch-elf/old-tls-le.s
 create mode 100644 ld/testsuite/ld-loongarch-elf/relax-bound-check-tls-le.s
 create mode 100644 ld/testsuite/ld-loongarch-elf/relax-tls-le.s
 create mode 100644 ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-new.s
 create mode 100644 ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-old.s

diff --git a/ld/testsuite/ld-loongarch-elf/old-tls-le.s b/ld/testsuite/ld-loongarch-elf/old-tls-le.s
new file mode 100644
index 00000000000..be3d2b9c5c6
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/old-tls-le.s
@@ -0,0 +1,23 @@
+/* This test case mainly tests whether the original
+   tls le assembly instruction can be linked normally
+   after tls le relax is added to the current ld.  */
+
+        .text
+        .globl  aa
+        .section        .tbss,"awT",@nobits
+        .align  2
+        .type   aa, @object
+        .size   aa, 4
+aa:
+        .space  4
+        .text
+        .align  2
+        .globl  main
+        .type   main, @function
+main:
+        lu12i.w $r12,%le_hi20(aa)
+        ori     $r12,$r12,%le_lo12(aa)
+        add.d   $r12,$r12,$r2
+        addi.w  $r13,$r0,2                      # 0x2
+        stptr.w $r13,$r12,0
+
diff --git a/ld/testsuite/ld-loongarch-elf/relax-bound-check-tls-le.s b/ld/testsuite/ld-loongarch-elf/relax-bound-check-tls-le.s
new file mode 100644
index 00000000000..b2a64b5d154
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/relax-bound-check-tls-le.s
@@ -0,0 +1,53 @@
+/* This test case mainly tests whether the address of the
+   tls le symbol can be resolved normally when the offset
+   of the symbol is greater than 0x800. (When the symbol
+   offset is greater than 0x800, relax is not performed).  */
+
+        .text
+        .globl  count1
+        .section        .tbss,"awT",@nobits
+        .align  2
+        .type   count1, @object
+        .size   count1, 4
+count1:
+        .space  0x400
+        .globl  count2
+        .align  2
+        .type   count2, @object
+        .size   count2, 4
+count2:
+        .space  0x400
+        .globl  count3
+        .align  2
+        .type   count3, @object
+        .size   count3, 4
+count3:
+	.space  0x400
+        .globl  count4
+        .align  2
+        .type   count4, @object
+        .size   count4, 4
+count4:
+        .space  4
+        .text
+        .align  2
+        .globl  main
+        .type   main, @function
+main:
+	lu12i.w	$r12,%le_hi20_r(count1)
+	add.d	$r12,$r12,$r2,%le_add_r(count1)
+	addi.w	$r13,$r0,1
+	st.w	$r13,$r12,%le_lo12_r(count1)
+	lu12i.w $r12,%le_hi20_r(count2)
+	add.d   $r12,$r12,$r2,%le_add_r(count2)
+	addi.w  $r13,$r0,2
+	st.w    $r13,$r12,%le_lo12_r(count2)
+	lu12i.w $r12,%le_hi20(count3)
+	add.d   $r12,$r12,$r2,%le_add_r(count3)
+	addi.w  $r13,$r0,3
+	st.w    $r13,$r12,%le_lo12_r(count3)
+	lu12i.w $r12,%le_hi20(count4)
+	add.d   $r12,$r12,$r2,%le_add_r(count4)
+	addi.w  $r13,$r0,4
+	st.w    $r13,$r12,%le_lo12_r(count4)
+
diff --git a/ld/testsuite/ld-loongarch-elf/relax-tls-le.s b/ld/testsuite/ld-loongarch-elf/relax-tls-le.s
new file mode 100644
index 00000000000..1ea53baf8f7
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/relax-tls-le.s
@@ -0,0 +1,26 @@
+/* This test case mainly tests whether the tls le variable
+   address acquisition can be relax normally.
+
+   before relax:                                  after relax:
+
+   lu12i.w $r12,%le_hi20_r(sym)           ====>    (instruction deleted).
+   add.d   $r12,$r12,$r2,%le_add_r(sym)   ====>    (instruction deleted).
+   st.w    $r13,$r12,%le_lo12_r(sym)      ====>    st.w    $r13,$r2,%le_lo12_r(sym).  */
+
+	.text
+	.globl	a
+	.section	.tbss,"awT",@nobits
+	.align	2
+	.type	a, @object
+	.size	a, 4
+a:
+	.space	4
+	.text
+	.align	2
+	.globl	main
+	.type	main, @function
+main:
+	lu12i.w	$r12,%le_hi20_r(a)
+	add.d	$r12,$r12,$r2,%le_add_r(a)
+	addi.w	$r13,$r0,1			# 0x1
+	st.w	$r13,$r12,%le_lo12_r(a)
diff --git a/ld/testsuite/ld-loongarch-elf/relax.exp b/ld/testsuite/ld-loongarch-elf/relax.exp
index 77323d8d7a3..b697d01563c 100644
--- a/ld/testsuite/ld-loongarch-elf/relax.exp
+++ b/ld/testsuite/ld-loongarch-elf/relax.exp
@@ -33,8 +33,90 @@ if [istarget loongarch64-*-*] {
 	"relax" \
       ] \
     ]
+    set tls_relax_builds [list \
+      [list \
+	"tls_relax_builds" \
+	"" \
+	"" \
+	{relax-tls-le.s} \
+	{}        \
+	"relax-tls-le" \
+      ] \
+    ]
+    set tls_no_relax_builds [list \
+      [list \
+	"tls_no_relax_builds" \
+	"-Wl,--no-relax" \
+	"" \
+	{relax-tls-le.s} \
+	{}        \
+	"no-relax-tls-le" \
+      ] \
+    ]
+
+    set relax_bound_check [list \
+      [list \
+	"relax_bound_check" \
+	"" \
+	"" \
+	{relax-bound-check-tls-le.s} \
+	{}        \
+	"relax-bound-check-tls-le" \
+      ] \
+    ]
+    set no_relax_bound_check [list \
+      [list \
+	"no_relax_bound_check" \
+	"-Wl,--no-relax" \
+	"" \
+	{relax-bound-check-tls-le.s} \
+	{}        \
+	"no-relax-bound-check-tls-le" \
+      ] \
+    ]
+
+    set old_tls_le [list \
+      [list \
+	"old_tls_le" \
+	"" \
+	"" \
+	{old-tls-le.s} \
+	{}        \
+	"old-tls-le" \
+      ] \
+    ]
+
+     set relax_compatible [list \
+      [list \
+	"relax_compatible" \
+	"" \
+	"" \
+	{tls-relax-compatible-check-new.s tls-relax-compatible-check-old.s} \
+	{}        \
+	"realx-compatible" \
+      ] \
+    ]
+
+    set no_relax_compatible [list \
+      [list \
+	"no_relax_compatible" \
+	"-Wl,--no-relax" \
+	"" \
+	{tls-relax-compatible-check-new.s tls-relax-compatible-check-old.s} \
+	{}        \
+	"no-realx-compatible" \
+      ] \
+    ]
+
 
     run_cc_link_tests $pre_builds
+    run_cc_link_tests $tls_relax_builds
+    run_cc_link_tests $tls_no_relax_builds
+    run_cc_link_tests $relax_bound_check
+    run_cc_link_tests $no_relax_bound_check
+    run_cc_link_tests $old_tls_le
+    run_cc_link_tests $relax_compatible
+    run_cc_link_tests $no_relax_compatible
 
     if [file exist "tmpdir/relax"] {
       set objdump_output [run_host_cmd "objdump" "-d tmpdir/relax"]
@@ -114,8 +196,75 @@ if [istarget loongarch64-*-*] {
 		"relax-segment-max" \
 	    ] \
 	]
-  }
 
+    if [file exist "tmpdir/relax-tls-le"] {
+      set objdump_output1 [run_host_cmd "objdump" "-d tmpdir/relax-tls-le"]
+      if { [ regexp ".addi.*st.*" $objdump_output1] } {
+	pass "loongarch relax success"
+      } {
+	fail "loongarch relax fail"
+      }
+    }
+    if [file exist "tmpdir/no-relax-tls-le"] {
+      set objdump_output2 [run_host_cmd "objdump" "-d tmpdir/no-relax-tls-le"]
+      if { [ regexp ".*lu12i.*add.*addi.*st.*" $objdump_output2] } {
+	pass "loongarch no-relax success"
+      } {
+	fail "loongarch no-relax fail"
+      }
+
+    }
+    if [file exist "tmpdir/old-tls-le"] {
+      set objdump_output3 [run_host_cmd "objdump" "-d tmpdir/old-tls-le"]
+      if { [ regexp ".*lu12i.*ori.*add.*addi.*stptr.*" $objdump_output3] } {
+	pass "loongarch old tls le success"
+      } {
+	fail "loongarch old tls le fail"
+      }
+
+    }
+
+    if [file exist "tmpdir/realx-compatible"] {
+      set objdump_output4 [run_host_cmd "objdump" "-d tmpdir/realx-compatible"]
+      if { [ regexp ".addi.*st.*" $objdump_output4] && \
+	   [ regexp ".*lu12i.*ori.*add.*addi.*stptr.*" $objdump_output4] } {
+	pass "loongarch tls le relax compatible check success"
+      } {
+	fail "loongarch tls le relax compatible check fail"
+      }
+    }
+
+    if [file exist "tmpdir/no-realx-compatible"] {
+      set objdump_output4 [run_host_cmd "objdump" "-d tmpdir/realx-compatible"]
+      if { [ regexp ".*lu12i.*add.*addi.*st.*" $objdump_output4] && \
+	   [ regexp ".*lu12i.*ori.*add.*addi.*stptr.*" $objdump_output4] } {
+	pass "loongarch tls le no-relax compatible check success"
+      } {
+	fail "loongarch tls le no-relax compatible check fail"
+      }
+    }
+
+
+    if [file exist "tmpdir/relax-bound-check-tls-le"] {
+      set objdump_output5 [run_host_cmd "objdump" "-d tmpdir/relax-bound-check-tls-le"]
+      if { [ regexp ".*lu12i.*add.*addi.*st.*" $objdump_output5] && \
+	   [ regexp ".addi.*st.*" $objdump_output5] } {
+	pass "loongarch no-relax success"
+      } {
+	fail "loongarch no-relax fail"
+      }
+
+    }
+    if [file exist "tmpdir/no-relax-bound-check-tls-le"] {
+      set objdump_output5 [run_host_cmd "objdump" "-d tmpdir/no-relax-bound-check-tls-le"]
+      if { [ regexp ".*addi.*st.*" $objdump_output5] } {
+	pass "loongarch no-relax success"
+      } {
+	fail "loongarch no-relax fail"
+      }
+    }
+
+  }
   run_ld_link_tests \
       [list \
 	  [list \
diff --git a/ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-new.s b/ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-new.s
new file mode 100644
index 00000000000..059ca0b97ae
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-new.s
@@ -0,0 +1,35 @@
+/* This test case mainly carries out ld compatibility test.
+   This test case is the new tls le instruction sequence,
+   which will be linked with tls-relax-compatible-check-old.s.
+   If the link is normal, it indicates that there is no
+   compatibility problem.  */
+
+	.text
+	.globl	new
+	.section	.tbss,"awT",@nobits
+	.align	2
+	.type	new, @object
+	.size	new, 4
+new:
+	.space	4
+	.text
+	.align	2
+	.globl	main
+	.type	main, @function
+main:
+.LFB0 = .
+	addi.d	$r3,$r3,-16
+	st.d	$r1,$r3,8
+	stptr.d	$r22,$r3,0
+	addi.d	$r22,$r3,16
+	bl	%plt(old)
+	lu12i.w	$r12,%le_hi20_r(new)
+	add.d	$r12,$r12,$r2,%le_add_r(new)
+	addi.w	$r13,$r0,2			# 0x2
+	st.w	$r13,$r12,%le_lo12_r(new)
+	or	$r12,$r0,$r0
+	or	$r4,$r12,$r0
+	ld.d	$r1,$r3,8
+	ldptr.d	$r22,$r3,0
+	addi.d	$r3,$r3,16
+	jr	$r1
diff --git a/ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-old.s b/ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-old.s
new file mode 100644
index 00000000000..083a26887e5
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-old.s
@@ -0,0 +1,33 @@
+/* This test case mainly carries out ld compatibility test.
+   This test case is the old tls le instruction sequence,
+   which will be linked with tls-relax-compatible-check-new.s.
+   If the link is normal, it indicates that there is no
+   compatibility problem. */
+
+	.text
+	.globl	older
+	.section	.tbss,"awT",@nobits
+	.align	2
+	.type	older, @object
+	.size	older, 4
+older:
+	.space	4
+	.text
+	.align	2
+	.globl	old
+	.type	old, @function
+old:
+.LFB0 = .
+	addi.d	$r3,$r3,-16
+	st.d	$r22,$r3,8
+	addi.d	$r22,$r3,16
+	lu12i.w	$r12,%le_hi20(older)
+	ori	$r12,$r12,%le_lo12(older)
+	add.d	$r12,$r12,$r2
+	addi.w	$r13,$r0,1			# 0x1
+	stptr.w	$r13,$r12,0
+	nop
+	or	$r4,$r12,$r0
+	ld.d	$r22,$r3,8
+	addi.d	$r3,$r3,16
+	jr	$r1
-- 
2.40.0

Re: [PATCH v5 1/5] LoongArch: bfd: Add support for tls le relax.

[Hannes Domani]

 Am Donnerstag, 28. Dezember 2023, 04:41:38 MEZ hat changjiachen <changjiachen@stu.xupt.edu.cn> Folgendes geschrieben:

> Add tls le relax support and related relocs in bfd.
>
> New relocation related explanation can refer to the following url:
> https://github.com/loongson/la-abi-specs/blob/release/laelf.adoc
>
> This support does two main things:
>
> 1. Implement support for three new relocation items in bfd.
>
> The three new relocation items are shown below:
>
> R_LARCH_TLS_LE_ADD_R
> R_LARCH_TLS_LE_HI20_R
> R_LARCH_TLS_LE_LO12_R
>
> 2. ADD a new macro RELOCATE_TLS_TP32_HI20
>
> Handle problems caused by symbol extensions in TLS LE, The processing
> is similar to the macro RELOCATE_CALC_PC32_HI20 method.
>
> 3. Implement the tls le relax function.
>
> bfd/ChangeLog:
>
>     * bfd-in2.h: Add relocs related to tls le relax.
>     * elfnn-loongarch.c:
>     (loongarch_relax_tls_le): New function.
>     (RELOCATE_TLS_TP32_HI20): New macro.
>     (loongarch_elf_check_relocs): Add new reloc support.
>     (perform_relocation): Likewise.
>     (loongarch_elf_relocate_section): Handle new relocs related to relax.
>     (loongarch_elf_relax_section): Likewise.
>     * elfxx-loongarch.c:
>     (LOONGARCH_HOWTO (R_LARCH_TLS_LE_ADD_R)): New reloc how to type.
>     (LOONGARCH_HOWTO (R_LARCH_TLS_LE_HI20_R)): Likewise.
>     (LOONGARCH_HOWTO (R_LARCH_TLS_LE_LO12_R)): Likewise.
>     * libbfd.h: Add relocs related to tls le relax.
>     * reloc.c: Likewise.
> ---
> bfd/bfd-in2.h        |  4 +++
> bfd/elfnn-loongarch.c | 75 +++++++++++++++++++++++++++++++++++++++++++
> bfd/elfxx-loongarch.c | 55 ++++++++++++++++++++++++++++---
> bfd/libbfd.h          |  3 ++
> bfd/reloc.c          |  7 ++++
> 5 files changed, 139 insertions(+), 5 deletions(-)


When this patch was committed, it also added a bfd/.elfnn-loongarch.c.swp
file, and I doubt this was intentional.


Regards
Hannes

Re:Re: [PATCH v5 1/5] LoongArch: bfd: Add support for tls le relax.

[常佳琛]

[-- Attachment #1: Type: text/plain, Size: 174 bytes --]






I am very sorry for my negligence. I will submit another patch to delete the bfd/.elfnn-loongarch.c.wp file. Thank you for your check.--
发自我的网易邮箱

Re: [PATCH v5 1/5] LoongArch: bfd: Add support for tls le relax.

[Xi Ruoyao]

On Fri, 2023-12-29 at 09:53 +0000, Hannes Domani wrote:
>  Am Donnerstag, 28. Dezember 2023, 04:41:38 MEZ hat changjiachen <changjiachen@stu.xupt.edu.cn> Folgendes geschrieben:
> 
> > Add tls le relax support and related relocs in bfd.
> > 
> > New relocation related explanation can refer to the following url:
> > https://github.com/loongson/la-abi-specs/blob/release/laelf.adoc
> > 
> > This support does two main things:
> > 
> > 1. Implement support for three new relocation items in bfd.
> > 
> > The three new relocation items are shown below:
> > 
> > R_LARCH_TLS_LE_ADD_R
> > R_LARCH_TLS_LE_HI20_R
> > R_LARCH_TLS_LE_LO12_R
> > 
> > 2. ADD a new macro RELOCATE_TLS_TP32_HI20
> > 
> > Handle problems caused by symbol extensions in TLS LE, The processing
> > is similar to the macro RELOCATE_CALC_PC32_HI20 method.
> > 
> > 3. Implement the tls le relax function.
> > 
> > bfd/ChangeLog:
> > 
> >      * bfd-in2.h: Add relocs related to tls le relax.
> >      * elfnn-loongarch.c:
> >      (loongarch_relax_tls_le): New function.
> >      (RELOCATE_TLS_TP32_HI20): New macro.
> >      (loongarch_elf_check_relocs): Add new reloc support.
> >      (perform_relocation): Likewise.
> >      (loongarch_elf_relocate_section): Handle new relocs related to relax.
> >      (loongarch_elf_relax_section): Likewise.
> >      * elfxx-loongarch.c:
> >      (LOONGARCH_HOWTO (R_LARCH_TLS_LE_ADD_R)): New reloc how to type.
> >      (LOONGARCH_HOWTO (R_LARCH_TLS_LE_HI20_R)): Likewise.
> >      (LOONGARCH_HOWTO (R_LARCH_TLS_LE_LO12_R)): Likewise.
> >      * libbfd.h: Add relocs related to tls le relax.
> >      * reloc.c: Likewise.
> > ---
> > bfd/bfd-in2.h        |  4 +++
> > bfd/elfnn-loongarch.c | 75 +++++++++++++++++++++++++++++++++++++++++++
> > bfd/elfxx-loongarch.c | 55 ++++++++++++++++++++++++++++---
> > bfd/libbfd.h          |  3 ++
> > bfd/reloc.c          |  7 ++++
> > 5 files changed, 139 insertions(+), 5 deletions(-)
> 
> 
> When this patch was committed, it also added a bfd/.elfnn-loongarch.c.swp
> file, and I doubt this was intentional.

Hmm interesting: why don't we have *.swp in .gitignore?

-- 
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University