* [PATCH] RISC-V: move various alias entries @ 2023-08-04 12:00 Jan Beulich 2023-08-05 1:40 ` Tsukasa OI 0 siblings, 1 reply; 5+ messages in thread From: Jan Beulich @ 2023-08-04 12:00 UTC (permalink / raw) To: Binutils Cc: Palmer Dabbelt, Andrew Waterman, Jim Wilson, Nelson Chu, Fangrui Song For disassembly to only use spec-mandated aliases, respective non-alias entries need to come ahead of their alias ones. Since identical mnemonics need to stay together, whole groups are moved up where necessary. This partly reverts 839189bc932e ("RISC-V: re-arrange opcode table for consistent alias handling"), but then also goes beyond a plain revert. --- I did not adjust JAL back, to continue to match JALR. The spec doesn't spell out how operands are to be specified, and hence it also doesn't mention how many explicit ones there are supposed to be. What about NEG, NEGW, and RET (and perhaps more)? The spec doesn't know of those afaics. --- a/gas/testsuite/gas/riscv/b-ext.d +++ b/gas/testsuite/gas/riscv/b-ext.d @@ -23,8 +23,8 @@ Disassembly of section .text: [ ]+30:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 [ ]+34:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 [ ]+38:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 -[ ]+3c:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 -[ ]+40:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 +[ ]+3c:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 +[ ]+40:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 [ ]+44:[ ]+69855513[ ]+rev8[ ]+a0,a0 [ ]+48:[ ]+28755513[ ]+orc.b[ ]+a0,a0 [ ]+4c:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2 @@ -33,19 +33,19 @@ Disassembly of section .text: [ ]+58:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2 [ ]+5c:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2 [ ]+60:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclr[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+28059513[ ]+bset[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+68059513[ ]+binv[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bext[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclri[ ]+a0,a1,0x0 +[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+28059513[ ]+bseti[ ]+a0,a1,0x0 +[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+68059513[ ]+binvi[ ]+a0,a1,0x0 +[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bexti[ ]+a0,a1,0x0 +[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f [ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f --- a/gas/testsuite/gas/riscv/b-ext-64.d +++ b/gas/testsuite/gas/riscv/b-ext-64.d @@ -23,8 +23,8 @@ Disassembly of section .text: [ ]+30:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 [ ]+34:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 [ ]+38:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 -[ ]+3c:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 -[ ]+40:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 +[ ]+3c:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 +[ ]+40:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 [ ]+44:[ ]+6b855513[ ]+rev8[ ]+a0,a0 [ ]+48:[ ]+28755513[ ]+orc.b[ ]+a0,a0 [ ]+4c:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2 @@ -38,35 +38,35 @@ Disassembly of section .text: [ ]+6c:[ ]+6025151b[ ]+cpopw[ ]+a0,a0 [ ]+70:[ ]+60c5953b[ ]+rolw[ ]+a0,a1,a2 [ ]+74:[ ]+60c5d53b[ ]+rorw[ ]+a0,a1,a2 -[ ]+78:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2 -[ ]+7c:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2 +[ ]+78:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 +[ ]+7c:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 [ ]+80:[ ]+20c5a53b[ ]+sh1add.uw[ ]+a0,a1,a2 [ ]+84:[ ]+20c5c53b[ ]+sh2add.uw[ ]+a0,a1,a2 [ ]+88:[ ]+20c5e53b[ ]+sh3add.uw[ ]+a0,a1,a2 [ ]+8c:[ ]+08c5853b[ ]+add.uw[ ]+a0,a1,a2 [ ]+90:[ ]+0805853b[ ]+zext.w[ ]+a0,a1 [ ]+94:[ ]+0825951b[ ]+slli.uw[ ]+a0,a1,0x2 -[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclr[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+28059513[ ]+bset[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+68059513[ ]+binv[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bext[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclr[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bset[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binv[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bext[ ]+a0,a1,0x3f +[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclri[ ]+a0,a1,0x0 +[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+28059513[ ]+bseti[ ]+a0,a1,0x0 +[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+68059513[ ]+binvi[ ]+a0,a1,0x0 +[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bexti[ ]+a0,a1,0x0 +[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclri[ ]+a0,a1,0x3f +[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bseti[ ]+a0,a1,0x3f +[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binvi[ ]+a0,a1,0x3f +[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bexti[ ]+a0,a1,0x3f [ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclr[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bset[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binv[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bext[ ]+a0,a1,0x3f +[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f +[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclri[ ]+a0,a1,0x3f +[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bseti[ ]+a0,a1,0x3f +[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binvi[ ]+a0,a1,0x3f +[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bexti[ ]+a0,a1,0x3f --- a/gas/testsuite/gas/riscv/b-ext-64-na.d +++ /dev/null @@ -1,72 +0,0 @@ -#as: -march=rv64i_zba_zbb_zbc_zbs -#source: b-ext-64.s -#objdump: -d -Mno-aliases - -.*:[ ]+file format .* - - -Disassembly of section .text: - -0+000 <target>: -[ ]+[0-9a-f]+:[ ]+60051513[ ]+clz[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+60151513[ ]+ctz[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+60251513[ ]+cpop[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac5d533[ ]+minu[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac5f533[ ]+maxu[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+60451513[ ]+sext\.b[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+60551513[ ]+sext\.h[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+0805453b[ ]+zext\.h[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 -[ ]+[0-9a-f]+:[ ]+6b855513[ ]+rev8[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+28755513[ ]+orc\.b[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+6005151b[ ]+clzw[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+6015151b[ ]+ctzw[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+6025151b[ ]+cpopw[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+60c5953b[ ]+rolw[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+60c5d53b[ ]+rorw[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 -[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 -[ ]+[0-9a-f]+:[ ]+20c5a53b[ ]+sh1add\.uw[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+20c5c53b[ ]+sh2add\.uw[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+20c5e53b[ ]+sh3add\.uw[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+08c5853b[ ]+add\.uw[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0805853b[ ]+add\.uw[ ]+a0,a1,zero -[ ]+[0-9a-f]+:[ ]+0825951b[ ]+slli\.uw[ ]+a0,a1,0x2 -[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclri[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+28059513[ ]+bseti[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+68059513[ ]+binvi[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bexti[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclri[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bseti[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binvi[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bexti[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclri[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bseti[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binvi[ ]+a0,a1,0x3f -[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bexti[ ]+a0,a1,0x3f --- a/gas/testsuite/gas/riscv/b-ext-na.d +++ /dev/null @@ -1,51 +0,0 @@ -#as: -march=rv32i_zba_zbb_zbc_zbs -#source: b-ext.s -#objdump: -d -Mno-aliases - -.*:[ ]+file format .* - - -Disassembly of section .text: - -0+000 <target>: -[ ]+[0-9a-f]+:[ ]+60051513[ ]+clz[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+60151513[ ]+ctz[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+60251513[ ]+cpop[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac5d533[ ]+minu[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac5f533[ ]+maxu[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+60451513[ ]+sext\.b[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+60551513[ ]+sext\.h[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+08054533[ ]+zext\.h[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 -[ ]+[0-9a-f]+:[ ]+69855513[ ]+rev8[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+28755513[ ]+orc\.b[ ]+a0,a0 -[ ]+[0-9a-f]+:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclri[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+28059513[ ]+bseti[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+68059513[ ]+binvi[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bexti[ ]+a0,a1,0x0 -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f --- a/gas/testsuite/gas/riscv/c-zero-imm.d +++ b/gas/testsuite/gas/riscv/c-zero-imm.d @@ -9,14 +9,14 @@ Disassembly of section .text: 0+000 <.text>: [ ]+0:[ ]+4501[ ]+li[ ]+a0,0 [ ]+2:[ ]+4581[ ]+li[ ]+a1,0 -[ ]+4:[ ]+8a01[ ]+and[ ]+a2,a2,0 -[ ]+6:[ ]+8a81[ ]+and[ ]+a3,a3,0 +[ ]+4:[ ]+8a01[ ]+andi[ ]+a2,a2,0 +[ ]+6:[ ]+8a81[ ]+andi[ ]+a3,a3,0 [ ]+8:[ ]+0001[ ]+nop [ ]+a:[ ]+873a[ ]+mv[ ]+a4,a4 -[ ]+c:[ ]+0781[ ]+add[ ]+a5,a5,0 -[ ]+e:[ ]+00051513[ ]+sll[ ]+a0,a0,0x0 -[ ]+12:[ ]+0005d593[ ]+srl[ ]+a1,a1,0x0 -[ ]+16:[ ]+40065613[ ]+sra[ ]+a2,a2,0x0 +[ ]+c:[ ]+0781[ ]+addi[ ]+a5,a5,0 +[ ]+e:[ ]+00051513[ ]+slli[ ]+a0,a0,0x0 +[ ]+12:[ ]+0005d593[ ]+srli[ ]+a1,a1,0x0 +[ ]+16:[ ]+40065613[ ]+srai[ ]+a2,a2,0x0 [ ]+1a:[ ]+0682[ ]+c.slli64[ ]+a3 [ ]+1c:[ ]+8301[ ]+c.srli64[ ]+a4 [ ]+1e:[ ]+8781[ ]+c.srai64[ ]+a5 --- a/gas/testsuite/gas/riscv/c-zero-imm-na.d +++ /dev/null @@ -1,24 +0,0 @@ -#as: -#source: c-zero-imm.s -#objdump: -dr -Mno-aliases - -.*:[ ]+file format .* - - -Disassembly of section .text: - -0+000 <.text>: -[ ]+[0-9a-f]+:[ ]+4501[ ]+c\.li[ ]+a0,0 -[ ]+[0-9a-f]+:[ ]+4581[ ]+c\.li[ ]+a1,0 -[ ]+[0-9a-f]+:[ ]+8a01[ ]+c\.andi[ ]+a2,0 -[ ]+[0-9a-f]+:[ ]+8a81[ ]+c\.andi[ ]+a3,0 -[ ]+[0-9a-f]+:[ ]+0001[ ]+c\.addi[ ]+zero,0 -[ ]+[0-9a-f]+:[ ]+873a[ ]+c\.mv[ ]+a4,a4 -[ ]+[0-9a-f]+:[ ]+0781[ ]+c\.addi[ ]+a5,0 -[ ]+[0-9a-f]+:[ ]+00051513[ ]+slli[ ]+a0,a0,0x0 -[ ]+[0-9a-f]+:[ ]+0005d593[ ]+srli[ ]+a1,a1,0x0 -[ ]+[0-9a-f]+:[ ]+40065613[ ]+srai[ ]+a2,a2,0x0 -[ ]+[0-9a-f]+:[ ]+0682[ ]+c\.slli64[ ]+a3 -[ ]+[0-9a-f]+:[ ]+8301[ ]+c\.srli64[ ]+a4 -[ ]+[0-9a-f]+:[ ]+8781[ ]+c\.srai64[ ]+a5 -#... --- a/gas/testsuite/gas/riscv/c-zero-reg.d +++ b/gas/testsuite/gas/riscv/c-zero-reg.d @@ -14,7 +14,7 @@ Disassembly of section .text: [ ]+8:[ ]+9006[ ]+c.add[ ]+zero,ra [ ]+a:[ ]+00500013[ ]+li[ ]+zero,5 [ ]+e:[ ]+00006037[ ]+lui[ ]+zero,0x6 -[ ]+12:[ ]+00701013[ ]+sll[ ]+zero,zero,0x7 +[ ]+12:[ ]+00701013[ ]+slli[ ]+zero,zero,0x7 [ ]+16:[ ]+00008013[ ]+mv[ ]+zero,ra [ ]+1a:[ ]+00100033[ ]+add[ ]+zero,zero,ra #... --- a/gas/testsuite/gas/riscv/csr-insns-pseudo.d +++ b/gas/testsuite/gas/riscv/csr-insns-pseudo.d @@ -12,9 +12,9 @@ Disassembly of section .text: [ ]+[0-9a-f]+:[ ]+00029073[ ]+csrw[ ]+ustatus,t0 [ ]+[0-9a-f]+:[ ]+0002a073[ ]+csrs[ ]+ustatus,t0 [ ]+[0-9a-f]+:[ ]+0002b073[ ]+csrc[ ]+ustatus,t0 -[ ]+[0-9a-f]+:[ ]+000fd073[ ]+csrw[ ]+ustatus,31 -[ ]+[0-9a-f]+:[ ]+000fe073[ ]+csrs[ ]+ustatus,31 -[ ]+[0-9a-f]+:[ ]+000ff073[ ]+csrc[ ]+ustatus,31 +[ ]+[0-9a-f]+:[ ]+000fd073[ ]+csrwi[ ]+ustatus,31 +[ ]+[0-9a-f]+:[ ]+000fe073[ ]+csrsi[ ]+ustatus,31 +[ ]+[0-9a-f]+:[ ]+000ff073[ ]+csrci[ ]+ustatus,31 [ ]+[0-9a-f]+:[ ]+c00022f3[ ]+rdcycle[ ]+t0 [ ]+[0-9a-f]+:[ ]+c01022f3[ ]+rdtime[ ]+t0 [ ]+[0-9a-f]+:[ ]+c02022f3[ ]+rdinstret[ ]+t0 --- a/gas/testsuite/gas/riscv/csr-insns-pseudo-zfinx.d +++ b/gas/testsuite/gas/riscv/csr-insns-pseudo-zfinx.d @@ -12,9 +12,9 @@ Disassembly of section .text: [ ]+[0-9a-f]+:[ ]+00029073[ ]+csrw[ ]+ustatus,t0 [ ]+[0-9a-f]+:[ ]+0002a073[ ]+csrs[ ]+ustatus,t0 [ ]+[0-9a-f]+:[ ]+0002b073[ ]+csrc[ ]+ustatus,t0 -[ ]+[0-9a-f]+:[ ]+000fd073[ ]+csrw[ ]+ustatus,31 -[ ]+[0-9a-f]+:[ ]+000fe073[ ]+csrs[ ]+ustatus,31 -[ ]+[0-9a-f]+:[ ]+000ff073[ ]+csrc[ ]+ustatus,31 +[ ]+[0-9a-f]+:[ ]+000fd073[ ]+csrwi[ ]+ustatus,31 +[ ]+[0-9a-f]+:[ ]+000fe073[ ]+csrsi[ ]+ustatus,31 +[ ]+[0-9a-f]+:[ ]+000ff073[ ]+csrci[ ]+ustatus,31 [ ]+[0-9a-f]+:[ ]+c00022f3[ ]+rdcycle[ ]+t0 [ ]+[0-9a-f]+:[ ]+c01022f3[ ]+rdtime[ ]+t0 [ ]+[0-9a-f]+:[ ]+c02022f3[ ]+rdinstret[ ]+t0 --- a/gas/testsuite/gas/riscv/dis-addr-addiw-a.d +++ b/gas/testsuite/gas/riscv/dis-addr-addiw-a.d @@ -9,10 +9,10 @@ Disassembly of section .text: 0+ffffffe0 <_start>: [ ]+ffffffe0:[ ]+00000297[ ]+auipc[ ]+t0,0x0 -[ ]+ffffffe4:[ ]+0182831b[ ]+addw[ ]+t1,t0,24 # fffffffffffffff8 <addr_rv64_addiw_0a> +[ ]+ffffffe4:[ ]+0182831b[ ]+addiw[ ]+t1,t0,24 # fffffffffffffff8 <addr_rv64_addiw_0a> [ ]+ffffffe8:[ ]+00000397[ ]+auipc[ ]+t2,0x0 -[ ]+ffffffec:[ ]+01c38e1b[ ]+addw[ ]+t3,t2,28 # 4 <addr_rv64_addiw_0b> +[ ]+ffffffec:[ ]+01c38e1b[ ]+addiw[ ]+t3,t2,28 # 4 <addr_rv64_addiw_0b> [ ]+fffffff0:[ ]+00000e97[ ]+auipc[ ]+t4,0x0 -[ ]+fffffff4:[ ]+2eb1[ ]+addw[ ]+t4,t4,12 # fffffffffffffffc <addr_rv64_c_addiw_0a> +[ ]+fffffff4:[ ]+2eb1[ ]+addiw[ ]+t4,t4,12 # fffffffffffffffc <addr_rv64_c_addiw_0a> [ ]+fffffff6:[ ]+00000f17[ ]+auipc[ ]+t5,0x0 -[ ]+fffffffa:[ ]+2f49[ ]+addw[ ]+t5,t5,18 # 8 <addr_rv64_c_addiw_0b> +[ ]+fffffffa:[ ]+2f49[ ]+addiw[ ]+t5,t5,18 # 8 <addr_rv64_c_addiw_0b> --- a/gas/testsuite/gas/riscv/dis-addr-addiw-b.d +++ b/gas/testsuite/gas/riscv/dis-addr-addiw-b.d @@ -9,10 +9,10 @@ Disassembly of section .text: 0+7fffffe0 <_start>: [ ]+7fffffe0:[ ]+00000297[ ]+auipc[ ]+t0,0x0 -[ ]+7fffffe4:[ ]+0182831b[ ]+addw[ ]+t1,t0,24 # 7ffffff8 <addr_rv64_addiw_1a> +[ ]+7fffffe4:[ ]+0182831b[ ]+addiw[ ]+t1,t0,24 # 7ffffff8 <addr_rv64_addiw_1a> [ ]+7fffffe8:[ ]+00000397[ ]+auipc[ ]+t2,0x0 -[ ]+7fffffec:[ ]+01c38e1b[ ]+addw[ ]+t3,t2,28 # ffffffff80000004 <addr_rv64_addiw_1b> +[ ]+7fffffec:[ ]+01c38e1b[ ]+addiw[ ]+t3,t2,28 # ffffffff80000004 <addr_rv64_addiw_1b> [ ]+7ffffff0:[ ]+00000e97[ ]+auipc[ ]+t4,0x0 -[ ]+7ffffff4:[ ]+2eb1[ ]+addw[ ]+t4,t4,12 # 7ffffffc <addr_rv64_c_addiw_1a> +[ ]+7ffffff4:[ ]+2eb1[ ]+addiw[ ]+t4,t4,12 # 7ffffffc <addr_rv64_c_addiw_1a> [ ]+7ffffff6:[ ]+00000f17[ ]+auipc[ ]+t5,0x0 -[ ]+7ffffffa:[ ]+2f49[ ]+addw[ ]+t5,t5,18 # ffffffff80000008 <addr_rv64_c_addiw_1b> +[ ]+7ffffffa:[ ]+2f49[ ]+addiw[ ]+t5,t5,18 # ffffffff80000008 <addr_rv64_c_addiw_1b> --- a/gas/testsuite/gas/riscv/dis-addr-overflow-32.d +++ b/gas/testsuite/gas/riscv/dis-addr-overflow-32.d @@ -19,9 +19,9 @@ Disassembly of section .text: [ ]+[0-9a-f]+:[ ]+ffffbeb7[ ]+lui[ ]+t4,0xffffb [ ]+[0-9a-f]+:[ ]+000e8a67[ ]+jalr[ ]+s4,t4 # ffffb000 <addr_jalr_3> [ ]+[0-9a-f]+:[ ]+ffffaf37[ ]+lui[ ]+t5,0xffffa -[ ]+[0-9a-f]+:[ ]+ff0f0a93[ ]+add[ ]+s5,t5,-16 # ffff9ff0 <addr_loadaddr> +[ ]+[0-9a-f]+:[ ]+ff0f0a93[ ]+addi[ ]+s5,t5,-16 # ffff9ff0 <addr_loadaddr> [ ]+[0-9a-f]+:[ ]+ffff9fb7[ ]+lui[ ]+t6,0xffff9 -[ ]+[0-9a-f]+:[ ]+1fb1[ ]+add[ ]+t6,t6,-20 # ffff8fec <addr_loadaddr_c> +[ ]+[0-9a-f]+:[ ]+1fb1[ ]+addi[ ]+t6,t6,-20 # ffff8fec <addr_loadaddr_c> [ ]+[0-9a-f]+:[ ]+4001a283[ ]+lw[ ]+t0,1024\(gp\) # 600 <addr_rel_gp_pos> [ ]+[0-9a-f]+:[ ]+c001a303[ ]+lw[ ]+t1,-1024\(gp\) # fffffe00 <addr_rel_gp_neg> [ ]+[0-9a-f]+:[ ]+10002383[ ]+lw[ ]+t2,256\(zero\) # 100 <addr_rel_zero_pos> --- a/gas/testsuite/gas/riscv/dis-addr-overflow-64.d +++ b/gas/testsuite/gas/riscv/dis-addr-overflow-64.d @@ -19,13 +19,13 @@ Disassembly of section .text: [ ]+[0-9a-f]+:[ ]+ffffbeb7[ ]+lui[ ]+t4,0xffffb [ ]+[0-9a-f]+:[ ]+000e8a67[ ]+jalr[ ]+s4,t4 # ffffffffffffb000 <addr_jalr_3> [ ]+[0-9a-f]+:[ ]+ffffaf37[ ]+lui[ ]+t5,0xffffa -[ ]+[0-9a-f]+:[ ]+ff0f0a93[ ]+add[ ]+s5,t5,-16 # ffffffffffff9ff0 <addr_loadaddr> +[ ]+[0-9a-f]+:[ ]+ff0f0a93[ ]+addi[ ]+s5,t5,-16 # ffffffffffff9ff0 <addr_loadaddr> [ ]+[0-9a-f]+:[ ]+ffff9fb7[ ]+lui[ ]+t6,0xffff9 -[ ]+[0-9a-f]+:[ ]+1fb1[ ]+add[ ]+t6,t6,-20 # ffffffffffff8fec <addr_loadaddr_c> +[ ]+[0-9a-f]+:[ ]+1fb1[ ]+addi[ ]+t6,t6,-20 # ffffffffffff8fec <addr_loadaddr_c> [ ]+[0-9a-f]+:[ ]+ffff8b37[ ]+lui[ ]+s6,0xffff8 -[ ]+[0-9a-f]+:[ ]+fe8b0b9b[ ]+addw[ ]+s7,s6,-24 # ffffffffffff7fe8 <addr_loadaddr_w> +[ ]+[0-9a-f]+:[ ]+fe8b0b9b[ ]+addiw[ ]+s7,s6,-24 # ffffffffffff7fe8 <addr_loadaddr_w> [ ]+[0-9a-f]+:[ ]+ffff7c37[ ]+lui[ ]+s8,0xffff7 -[ ]+[0-9a-f]+:[ ]+3c11[ ]+addw[ ]+s8,s8,-28 # ffffffffffff6fe4 <addr_loadaddr_w_c> +[ ]+[0-9a-f]+:[ ]+3c11[ ]+addiw[ ]+s8,s8,-28 # ffffffffffff6fe4 <addr_loadaddr_w_c> [ ]+[0-9a-f]+:[ ]+4001a283[ ]+lw[ ]+t0,1024\(gp\) # 600 <addr_rel_gp_pos> [ ]+[0-9a-f]+:[ ]+c001a303[ ]+lw[ ]+t1,-1024\(gp\) # fffffffffffffe00 <addr_rel_gp_neg> [ ]+[0-9a-f]+:[ ]+10002383[ ]+lw[ ]+t2,256\(zero\) # 100 <addr_rel_zero_pos> --- a/gas/testsuite/gas/riscv/ext-32.d +++ b/gas/testsuite/gas/riscv/ext-32.d @@ -9,31 +9,31 @@ Disassembly of section .text: 0+000 <target>: [ ]+0:[ ]+0ff57513[ ]+zext.b[ ]+a0,a0 -[ ]+4:[ ]+01051513[ ]+sll[ ]+a0,a0,0x10 -[ ]+8:[ ]+01055513[ ]+srl[ ]+a0,a0,0x10 -[ ]+c:[ ]+01851513[ ]+sll[ ]+a0,a0,0x18 -[ ]+10:[ ]+41855513[ ]+sra[ ]+a0,a0,0x18 -[ ]+14:[ ]+01051513[ ]+sll[ ]+a0,a0,0x10 -[ ]+18:[ ]+41055513[ ]+sra[ ]+a0,a0,0x10 +[ ]+4:[ ]+01051513[ ]+slli[ ]+a0,a0,0x10 +[ ]+8:[ ]+01055513[ ]+srli[ ]+a0,a0,0x10 +[ ]+c:[ ]+01851513[ ]+slli[ ]+a0,a0,0x18 +[ ]+10:[ ]+41855513[ ]+srai[ ]+a0,a0,0x18 +[ ]+14:[ ]+01051513[ ]+slli[ ]+a0,a0,0x10 +[ ]+18:[ ]+41055513[ ]+srai[ ]+a0,a0,0x10 [ ]+1c:[ ]+0ff67593[ ]+zext.b[ ]+a1,a2 -[ ]+20:[ ]+01061593[ ]+sll[ ]+a1,a2,0x10 -[ ]+24:[ ]+0105d593[ ]+srl[ ]+a1,a1,0x10 -[ ]+28:[ ]+01861593[ ]+sll[ ]+a1,a2,0x18 -[ ]+2c:[ ]+4185d593[ ]+sra[ ]+a1,a1,0x18 -[ ]+30:[ ]+01061593[ ]+sll[ ]+a1,a2,0x10 -[ ]+34:[ ]+4105d593[ ]+sra[ ]+a1,a1,0x10 +[ ]+20:[ ]+01061593[ ]+slli[ ]+a1,a2,0x10 +[ ]+24:[ ]+0105d593[ ]+srli[ ]+a1,a1,0x10 +[ ]+28:[ ]+01861593[ ]+slli[ ]+a1,a2,0x18 +[ ]+2c:[ ]+4185d593[ ]+srai[ ]+a1,a1,0x18 +[ ]+30:[ ]+01061593[ ]+slli[ ]+a1,a2,0x10 +[ ]+34:[ ]+4105d593[ ]+srai[ ]+a1,a1,0x10 [ ]+38:[ ]+0ff57513[ ]+zext.b[ ]+a0,a0 -[ ]+3c:[ ]+0542[ ]+sll[ ]+a0,a0,0x10 -[ ]+3e:[ ]+8141[ ]+srl[ ]+a0,a0,0x10 -[ ]+40:[ ]+0562[ ]+sll[ ]+a0,a0,0x18 -[ ]+42:[ ]+8561[ ]+sra[ ]+a0,a0,0x18 -[ ]+44:[ ]+0542[ ]+sll[ ]+a0,a0,0x10 -[ ]+46:[ ]+8541[ ]+sra[ ]+a0,a0,0x10 +[ ]+3c:[ ]+0542[ ]+slli[ ]+a0,a0,0x10 +[ ]+3e:[ ]+8141[ ]+srli[ ]+a0,a0,0x10 +[ ]+40:[ ]+0562[ ]+slli[ ]+a0,a0,0x18 +[ ]+42:[ ]+8561[ ]+srai[ ]+a0,a0,0x18 +[ ]+44:[ ]+0542[ ]+slli[ ]+a0,a0,0x10 +[ ]+46:[ ]+8541[ ]+srai[ ]+a0,a0,0x10 [ ]+48:[ ]+0ff67593[ ]+zext.b[ ]+a1,a2 -[ ]+4c:[ ]+01061593[ ]+sll[ ]+a1,a2,0x10 -[ ]+50:[ ]+81c1[ ]+srl[ ]+a1,a1,0x10 -[ ]+52:[ ]+01861593[ ]+sll[ ]+a1,a2,0x18 -[ ]+56:[ ]+85e1[ ]+sra[ ]+a1,a1,0x18 -[ ]+58:[ ]+01061593[ ]+sll[ ]+a1,a2,0x10 -[ ]+5c:[ ]+85c1[ ]+sra[ ]+a1,a1,0x10 +[ ]+4c:[ ]+01061593[ ]+slli[ ]+a1,a2,0x10 +[ ]+50:[ ]+81c1[ ]+srli[ ]+a1,a1,0x10 +[ ]+52:[ ]+01861593[ ]+slli[ ]+a1,a2,0x18 +[ ]+56:[ ]+85e1[ ]+srai[ ]+a1,a1,0x18 +[ ]+58:[ ]+01061593[ ]+slli[ ]+a1,a2,0x10 +[ ]+5c:[ ]+85c1[ ]+srai[ ]+a1,a1,0x10 #... --- a/gas/testsuite/gas/riscv/ext-64.d +++ b/gas/testsuite/gas/riscv/ext-64.d @@ -9,43 +9,43 @@ Disassembly of section .text: 0+000 <target>: [ ]+0:[ ]+0ff57513[ ]+zext.b[ ]+a0,a0 -[ ]+4:[ ]+03051513[ ]+sll[ ]+a0,a0,0x30 -[ ]+8:[ ]+03055513[ ]+srl[ ]+a0,a0,0x30 -[ ]+c:[ ]+03851513[ ]+sll[ ]+a0,a0,0x38 -[ ]+10:[ ]+43855513[ ]+sra[ ]+a0,a0,0x38 -[ ]+14:[ ]+03051513[ ]+sll[ ]+a0,a0,0x30 -[ ]+18:[ ]+43055513[ ]+sra[ ]+a0,a0,0x30 +[ ]+4:[ ]+03051513[ ]+slli[ ]+a0,a0,0x30 +[ ]+8:[ ]+03055513[ ]+srli[ ]+a0,a0,0x30 +[ ]+c:[ ]+03851513[ ]+slli[ ]+a0,a0,0x38 +[ ]+10:[ ]+43855513[ ]+srai[ ]+a0,a0,0x38 +[ ]+14:[ ]+03051513[ ]+slli[ ]+a0,a0,0x30 +[ ]+18:[ ]+43055513[ ]+srai[ ]+a0,a0,0x30 [ ]+1c:[ ]+0ff67593[ ]+zext.b[ ]+a1,a2 -[ ]+20:[ ]+03061593[ ]+sll[ ]+a1,a2,0x30 -[ ]+24:[ ]+0305d593[ ]+srl[ ]+a1,a1,0x30 -[ ]+28:[ ]+03861593[ ]+sll[ ]+a1,a2,0x38 -[ ]+2c:[ ]+4385d593[ ]+sra[ ]+a1,a1,0x38 -[ ]+30:[ ]+03061593[ ]+sll[ ]+a1,a2,0x30 -[ ]+34:[ ]+4305d593[ ]+sra[ ]+a1,a1,0x30 -[ ]+38:[ ]+02051513[ ]+sll[ ]+a0,a0,0x20 -[ ]+3c:[ ]+02055513[ ]+srl[ ]+a0,a0,0x20 +[ ]+20:[ ]+03061593[ ]+slli[ ]+a1,a2,0x30 +[ ]+24:[ ]+0305d593[ ]+srli[ ]+a1,a1,0x30 +[ ]+28:[ ]+03861593[ ]+slli[ ]+a1,a2,0x38 +[ ]+2c:[ ]+4385d593[ ]+srai[ ]+a1,a1,0x38 +[ ]+30:[ ]+03061593[ ]+slli[ ]+a1,a2,0x30 +[ ]+34:[ ]+4305d593[ ]+srai[ ]+a1,a1,0x30 +[ ]+38:[ ]+02051513[ ]+slli[ ]+a0,a0,0x20 +[ ]+3c:[ ]+02055513[ ]+srli[ ]+a0,a0,0x20 [ ]+40:[ ]+0005051b[ ]+sext.w[ ]+a0,a0 -[ ]+44:[ ]+02061593[ ]+sll[ ]+a1,a2,0x20 -[ ]+48:[ ]+0205d593[ ]+srl[ ]+a1,a1,0x20 +[ ]+44:[ ]+02061593[ ]+slli[ ]+a1,a2,0x20 +[ ]+48:[ ]+0205d593[ ]+srli[ ]+a1,a1,0x20 [ ]+4c:[ ]+0006059b[ ]+sext.w[ ]+a1,a2 [ ]+50:[ ]+0ff57513[ ]+zext.b[ ]+a0,a0 -[ ]+54:[ ]+1542[ ]+sll[ ]+a0,a0,0x30 -[ ]+56:[ ]+9141[ ]+srl[ ]+a0,a0,0x30 -[ ]+58:[ ]+1562[ ]+sll[ ]+a0,a0,0x38 -[ ]+5a:[ ]+9561[ ]+sra[ ]+a0,a0,0x38 -[ ]+5c:[ ]+1542[ ]+sll[ ]+a0,a0,0x30 -[ ]+5e:[ ]+9541[ ]+sra[ ]+a0,a0,0x30 +[ ]+54:[ ]+1542[ ]+slli[ ]+a0,a0,0x30 +[ ]+56:[ ]+9141[ ]+srli[ ]+a0,a0,0x30 +[ ]+58:[ ]+1562[ ]+slli[ ]+a0,a0,0x38 +[ ]+5a:[ ]+9561[ ]+srai[ ]+a0,a0,0x38 +[ ]+5c:[ ]+1542[ ]+slli[ ]+a0,a0,0x30 +[ ]+5e:[ ]+9541[ ]+srai[ ]+a0,a0,0x30 [ ]+60:[ ]+0ff67593[ ]+zext.b[ ]+a1,a2 -[ ]+64:[ ]+03061593[ ]+sll[ ]+a1,a2,0x30 -[ ]+68:[ ]+91c1[ ]+srl[ ]+a1,a1,0x30 -[ ]+6a:[ ]+03861593[ ]+sll[ ]+a1,a2,0x38 -[ ]+6e:[ ]+95e1[ ]+sra[ ]+a1,a1,0x38 -[ ]+70:[ ]+03061593[ ]+sll[ ]+a1,a2,0x30 -[ ]+74:[ ]+95c1[ ]+sra[ ]+a1,a1,0x30 -[ ]+76:[ ]+1502[ ]+sll[ ]+a0,a0,0x20 -[ ]+78:[ ]+9101[ ]+srl[ ]+a0,a0,0x20 +[ ]+64:[ ]+03061593[ ]+slli[ ]+a1,a2,0x30 +[ ]+68:[ ]+91c1[ ]+srli[ ]+a1,a1,0x30 +[ ]+6a:[ ]+03861593[ ]+slli[ ]+a1,a2,0x38 +[ ]+6e:[ ]+95e1[ ]+srai[ ]+a1,a1,0x38 +[ ]+70:[ ]+03061593[ ]+slli[ ]+a1,a2,0x30 +[ ]+74:[ ]+95c1[ ]+srai[ ]+a1,a1,0x30 +[ ]+76:[ ]+1502[ ]+slli[ ]+a0,a0,0x20 +[ ]+78:[ ]+9101[ ]+srli[ ]+a0,a0,0x20 [ ]+7a:[ ]+2501[ ]+sext.w[ ]+a0,a0 -[ ]+7c:[ ]+02061593[ ]+sll[ ]+a1,a2,0x20 -[ ]+80:[ ]+9181[ ]+srl[ ]+a1,a1,0x20 +[ ]+7c:[ ]+02061593[ ]+slli[ ]+a1,a2,0x20 +[ ]+80:[ ]+9181[ ]+srli[ ]+a1,a1,0x20 [ ]+82:[ ]+0006059b[ ]+sext.w[ ]+a1,a2 #... --- a/gas/testsuite/gas/riscv/insn.d +++ b/gas/testsuite/gas/riscv/insn.d @@ -8,7 +8,7 @@ Disassembly of section .text: 0+000 <target>: [^:]+:[ ]+00c58533[ ]+add[ ]+a0,a1,a2 -[^:]+:[ ]+00d58513[ ]+add[ ]+a0,a1,13 +[^:]+:[ ]+00d58513[ ]+addi[ ]+a0,a1,13 [^:]+:[ ]+00a58567[ ]+jalr[ ]+a0,10\(a1\) [^:]+:[ ]+00458503[ ]+lb[ ]+a0,4\(a1\) [^:]+:[ ]+feb508e3[ ]+beq[ ]+a0,a1,0 \<target\> @@ -22,8 +22,8 @@ Disassembly of section .text: [^:]+:[ ]+fddff56f[ ]+jal[ ]+a0,0 \<target\> [^:]+: R_RISCV_JAL[ ]+target [^:]+:[ ]+852e[ ]+mv[ ]+a0,a1 -[^:]+:[ ]+0511[ ]+add[ ]+a0,a0,4 # .* -[^:]+:[ ]+002c[ ]+add[ ]+a1,sp,8 +[^:]+:[ ]+0511[ ]+addi[ ]+a0,a0,4 # .* +[^:]+:[ ]+002c[ ]+addi[ ]+a1,sp,8 [^:]+:[ ]+c0aa[ ]+sw[ ]+a0,64\(sp\) [^:]+:[ ]+41a8[ ]+lw[ ]+a0,64\(a1\) [^:]+:[ ]+c1a8[ ]+sw[ ]+a0,64\(a1\) @@ -32,7 +32,7 @@ Disassembly of section .text: [^:]+:[ ]+b7e9[ ]+j[ ]+0 \<target\> [^:]+: R_RISCV_RVC_JUMP[ ]+target [^:]+:[ ]+00c58533[ ]+add[ ]+a0,a1,a2 -[^:]+:[ ]+00d58513[ ]+add[ ]+a0,a1,13 +[^:]+:[ ]+00d58513[ ]+addi[ ]+a0,a1,13 [^:]+:[ ]+00a58567[ ]+jalr[ ]+a0,10\(a1\) [^:]+:[ ]+00458503[ ]+lb[ ]+a0,4\(a1\) [^:]+:[ ]+fab50ce3[ ]+beq[ ]+a0,a1,0 \<target\> @@ -46,8 +46,8 @@ Disassembly of section .text: [^:]+:[ ]+fa5ff56f[ ]+jal[ ]+a0,0 \<target\> [^:]+: R_RISCV_JAL[ ]+target [^:]+:[ ]+852e[ ]+mv[ ]+a0,a1 -[^:]+:[ ]+0511[ ]+add[ ]+a0,a0,4 # .* -[^:]+:[ ]+002c[ ]+add[ ]+a1,sp,8 +[^:]+:[ ]+0511[ ]+addi[ ]+a0,a0,4 # .* +[^:]+:[ ]+002c[ ]+addi[ ]+a1,sp,8 [^:]+:[ ]+c0aa[ ]+sw[ ]+a0,64\(sp\) [^:]+:[ ]+41a8[ ]+lw[ ]+a0,64\(a1\) [^:]+:[ ]+c1a8[ ]+sw[ ]+a0,64\(a1\) --- a/gas/testsuite/gas/riscv/k-ext-64.d +++ b/gas/testsuite/gas/riscv/k-ext-64.d @@ -10,10 +10,10 @@ Disassembly of section .text: 0+000 <target>: [ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 +[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 [ ]+[0-9a-f]+:[ ]+60c5d53b[ ]+rorw[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+60c5953b[ ]+rolw[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2 +[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 [ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 --- a/gas/testsuite/gas/riscv/k-ext.d +++ b/gas/testsuite/gas/riscv/k-ext.d @@ -10,7 +10,7 @@ Disassembly of section .text: 0+000 <target>: [ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 +[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 [ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 --- a/gas/testsuite/gas/riscv/li32.d +++ b/gas/testsuite/gas/riscv/li32.d @@ -8,10 +8,10 @@ Disassembly of section .text: 0+000 <target>: [^:]+:[ ]+6521[ ]+lui[ ]+a0,0x8 -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 # .* +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 # .* [^:]+:[ ]+6509[ ]+lui[ ]+a0,0x2 -[^:]+:[ ]+f0150513[ ]+add[ ]+a0,a0,-255 # .* +[^:]+:[ ]+f0150513[ ]+addi[ ]+a0,a0,-255 # .* [^:]+:[ ]+12345537[ ]+lui[ ]+a0,0x12345 -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 # .* +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 # .* [^:]+:[ ]+f2345537[ ]+lui[ ]+a0,0xf2345 -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 # .* +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 # .* --- a/gas/testsuite/gas/riscv/li64.d +++ b/gas/testsuite/gas/riscv/li64.d @@ -8,37 +8,37 @@ Disassembly of section .text: 0000000000000000 <target>: [^:]+:[ ]+6521[ ]+lui[ ]+a0,0x8 -[^:]+:[ ]+2505[ ]+addw[ ]+a0,a0,1 # .* +[^:]+:[ ]+2505[ ]+addiw[ ]+a0,a0,1 # .* [^:]+:[ ]+6509[ ]+lui[ ]+a0,0x2 -[^:]+:[ ]+f015051b[ ]+addw[ ]+a0,a0,-255 # .* +[^:]+:[ ]+f015051b[ ]+addiw[ ]+a0,a0,-255 # .* [^:]+:[ ]+12345537[ ]+lui[ ]+a0,0x12345 -[^:]+:[ ]+2505[ ]+addw[ ]+a0,a0,1 # .* +[^:]+:[ ]+2505[ ]+addiw[ ]+a0,a0,1 # .* [^:]+:[ ]+000f2537[ ]+lui[ ]+a0,0xf2 -[^:]+:[ ]+3455051b[ ]+addw[ ]+a0,a0,837 # .* -[^:]+:[ ]+0532[ ]+sll[ ]+a0,a0,0xc -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 +[^:]+:[ ]+3455051b[ ]+addiw[ ]+a0,a0,837 # .* +[^:]+:[ ]+0532[ ]+slli[ ]+a0,a0,0xc +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 [^:]+:[ ]+00f12537[ ]+lui[ ]+a0,0xf12 -[^:]+:[ ]+3455051b[ ]+addw[ ]+a0,a0,837 # .* -[^:]+:[ ]+0532[ ]+sll[ ]+a0,a0,0xc -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 +[^:]+:[ ]+3455051b[ ]+addiw[ ]+a0,a0,837 # .* +[^:]+:[ ]+0532[ ]+slli[ ]+a0,a0,0xc +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 [^:]+:[ ]+ff010537[ ]+lui[ ]+a0,0xff010 -[^:]+:[ ]+f015051b[ ]+addw[ ]+a0,a0,-255 # .* -[^:]+:[ ]+054e[ ]+sll[ ]+a0,a0,0x13 -[^:]+:[ ]+80150513[ ]+add[ ]+a0,a0,-2047 -[^:]+:[ ]+0536[ ]+sll[ ]+a0,a0,0xd -[^:]+:[ ]+f0150513[ ]+add[ ]+a0,a0,-255 -[^:]+:[ ]+0010051b[ ]+addw[ ]+a0,zero,1 -[^:]+:[ ]+151a[ ]+sll[ ]+a0,a0,0x26 -[^:]+:[ ]+1565[ ]+add[ ]+a0,a0,-7 -[^:]+:[ ]+0536[ ]+sll[ ]+a0,a0,0xd -[^:]+:[ ]+34550513[ ]+add[ ]+a0,a0,837 -[^:]+:[ ]+0532[ ]+sll[ ]+a0,a0,0xc -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 +[^:]+:[ ]+f015051b[ ]+addiw[ ]+a0,a0,-255 # .* +[^:]+:[ ]+054e[ ]+slli[ ]+a0,a0,0x13 +[^:]+:[ ]+80150513[ ]+addi[ ]+a0,a0,-2047 +[^:]+:[ ]+0536[ ]+slli[ ]+a0,a0,0xd +[^:]+:[ ]+f0150513[ ]+addi[ ]+a0,a0,-255 +[^:]+:[ ]+0010051b[ ]+addiw[ ]+a0,zero,1 +[^:]+:[ ]+151a[ ]+slli[ ]+a0,a0,0x26 +[^:]+:[ ]+1565[ ]+addi[ ]+a0,a0,-7 +[^:]+:[ ]+0536[ ]+slli[ ]+a0,a0,0xd +[^:]+:[ ]+34550513[ ]+addi[ ]+a0,a0,837 +[^:]+:[ ]+0532[ ]+slli[ ]+a0,a0,0xc +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 [^:]+:[ ]+01fc4537[ ]+lui[ ]+a0,0x1fc4 -[^:]+:[ ]+c915051b[ ]+addw[ ]+a0,a0,-879 # .* -[^:]+:[ ]+0536[ ]+sll[ ]+a0,a0,0xd -[^:]+:[ ]+1565[ ]+add[ ]+a0,a0,-7 -[^:]+:[ ]+0536[ ]+sll[ ]+a0,a0,0xd -[^:]+:[ ]+34550513[ ]+add[ ]+a0,a0,837 -[^:]+:[ ]+0532[ ]+sll[ ]+a0,a0,0xc -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 +[^:]+:[ ]+c915051b[ ]+addiw[ ]+a0,a0,-879 # .* +[^:]+:[ ]+0536[ ]+slli[ ]+a0,a0,0xd +[^:]+:[ ]+1565[ ]+addi[ ]+a0,a0,-7 +[^:]+:[ ]+0536[ ]+slli[ ]+a0,a0,0xd +[^:]+:[ ]+34550513[ ]+addi[ ]+a0,a0,837 +[^:]+:[ ]+0532[ ]+slli[ ]+a0,a0,0xc +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 --- a/gas/testsuite/gas/riscv/lla32.d +++ b/gas/testsuite/gas/riscv/lla32.d @@ -10,10 +10,10 @@ Disassembly of section .text: 0: 00100513 li a0,1 4: 00001537 lui a0,0x1 8: 00001537 lui a0,0x1 - c: 00150513 add a0,a0,1 # 1001 <c> + c: 00150513 addi a0,a0,1 # 1001 <c> 10: 00001537 lui a0,0x1 - 14: fff50513 add a0,a0,-1 # fff <d> + 14: fff50513 addi a0,a0,-1 # fff <d> 18: 80000537 lui a0,0x80000 - 1c: fff50513 add a0,a0,-1 # 7fffffff <e> + 1c: fff50513 addi a0,a0,-1 # 7fffffff <e> 20: 00000513 li a0,0 24: fff00513 li a0,-1 --- a/gas/testsuite/gas/riscv/lla64.d +++ b/gas/testsuite/gas/riscv/lla64.d @@ -7,14 +7,14 @@ Disassembly of section .text: 0+000 <.text>: - 0: 0010051b addw a0,zero,1 + 0: 0010051b addiw a0,zero,1 4: 00001537 lui a0,0x1 8: 00001537 lui a0,0x1 - c: 0015051b addw a0,a0,1 # .* + c: 0015051b addiw a0,a0,1 # .* 10: 00001537 lui a0,0x1 - 14: fff5051b addw a0,a0,-1 # .* + 14: fff5051b addiw a0,a0,-1 # .* 18: 80000537 lui a0,0x80000 - 1c: fff5051b addw a0,a0,-1 # .* + 1c: fff5051b addiw a0,a0,-1 # .* 20: 0000051b sext.w a0,zero - 24: fff0051b addw a0,zero,-1 + 24: fff0051b addiw a0,zero,-1 28: 80000537 lui a0,0x80000 --- a/gas/testsuite/gas/riscv/zbkb-32.d +++ b/gas/testsuite/gas/riscv/zbkb-32.d @@ -10,7 +10,7 @@ Disassembly of section .text: 0+000 <target>: [ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 +[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 [ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 --- a/gas/testsuite/gas/riscv/zbkb-64.d +++ b/gas/testsuite/gas/riscv/zbkb-64.d @@ -10,10 +10,10 @@ Disassembly of section .text: 0+000 <target>: [ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 +[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 [ ]+[0-9a-f]+:[ ]+60c5d53b[ ]+rorw[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+60c5953b[ ]+rolw[ ]+a0,a1,a2 -[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2 +[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 [ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 [ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 --- a/ld/testsuite/ld-riscv-elf/ifunc-plt-01.d +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-01.d @@ -11,7 +11,7 @@ Disassembly of section .text: .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* .*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(_GLOBAL_OFFSET_TABLE_.*|__DATA_BEGIN__.*|.*)> .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* -.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* .*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* --- a/ld/testsuite/ld-riscv-elf/ifunc-plt-02.d +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-02.d @@ -13,7 +13,7 @@ Disassembly of section .text: .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* .*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(__DATA_BEGIN__.*|.*)> .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* -.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* .*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* --- a/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d @@ -9,7 +9,7 @@ Disassembly of section .text: #... 0+[0-9a-f]+ <bar>: .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* -.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* .*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> #... --- a/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d +++ b/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d @@ -10,6 +10,6 @@ Disassembly of section .text: [0-9a-f]+ <_start>: .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+a1.* -.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+a0,gp.*<data_a> -.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+a1,a1.*<data_b> +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,gp.*<data_a> +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a1,a1.*<data_b> #pass --- a/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d +++ b/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d @@ -8,7 +8,7 @@ Disassembly of section .text: 0+[0-9a-f]+ <_start>: -.*:[ ]+[0-9a-f]+[ ]+add[ ]+.*<gdata> +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<gdata> .*:[ ]+[0-9a-f]+[ ]+jal[ ]+.* .*:[ ]+[0-9a-f]+[ ]+j[ ]+.* .*:[ ]+[0-9a-f]+[ ]+nop --- a/ld/testsuite/ld-riscv-elf/weakref32.d +++ b/ld/testsuite/ld-riscv-elf/weakref32.d @@ -9,12 +9,12 @@ Disassembly of section \.text: 90000004: 02078663 beqz a5,90000030 <_start\+0x30> 90000008: 00000793 li a5,0 9000000c: 02078263 beqz a5,90000030 <_start\+0x30> -90000010: ff010113 addi? sp,sp,-16 +90000010: ff010113 addi sp,sp,-16 90000014: 00112623 sw ra,12\(sp\) 90000018: 00000097 auipc ra,0x0 9000001c: 000000e7 jalr zero # 0 <_start\-0x90000000> 90000020: 00c12083 lw ra,12\(sp\) -90000024: 01010113 addi? sp,sp,16 +90000024: 01010113 addi sp,sp,16 90000028: 00000317 auipc t1,0x0 9000002c: 00000067 jr zero # 0 <_start\-0x90000000> 90000030: 00008067 ret --- a/ld/testsuite/ld-riscv-elf/weakref64.d +++ b/ld/testsuite/ld-riscv-elf/weakref64.d @@ -9,12 +9,12 @@ Disassembly of section \.text: 90000004: 02078663 beqz a5,90000030 <_start\+0x30> 90000008: 00000793 li a5,0 9000000c: 02078263 beqz a5,90000030 <_start\+0x30> - 90000010: ff010113 addi? sp,sp,-16 + 90000010: ff010113 addi sp,sp,-16 90000014: 00113423 sd ra,8\(sp\) 90000018: 00000097 auipc ra,0x0 9000001c: 000000e7 jalr zero # 0 <_start\-0x90000000> 90000020: 00813083 ld ra,8\(sp\) - 90000024: 01010113 addi? sp,sp,16 + 90000024: 01010113 addi sp,sp,16 90000028: 00000317 auipc t1,0x0 9000002c: 00000067 jr zero # 0 <_start\-0x90000000> 90000030: 00008067 ret --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -382,14 +382,14 @@ const struct riscv_opcode riscv_opcodes[ {"move", 0, INSN_CLASS_I, "d,s", MATCH_ADDI, MASK_ADDI|MASK_IMM, match_opcode, INSN_ALIAS }, {"zext.b", 0, INSN_CLASS_ZCB, "Cs,Cw", MATCH_C_ZEXT_B, MASK_C_ZEXT_B, match_opcode, INSN_ALIAS }, {"zext.b", 0, INSN_CLASS_I, "d,s", MATCH_ANDI|ENCODE_ITYPE_IMM (255), MASK_ANDI | MASK_IMM, match_opcode, INSN_ALIAS }, +{"andi", 0, INSN_CLASS_ZCB, "Cs,Cw,Wcf",MATCH_C_ZEXT_B, MASK_C_ZEXT_B, match_opcode, INSN_ALIAS }, +{"andi", 0, INSN_CLASS_C, "Cs,Cw,Co", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, INSN_ALIAS }, +{"andi", 0, INSN_CLASS_I, "d,s,j", MATCH_ANDI, MASK_ANDI, match_opcode, 0 }, {"and", 0, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_AND, MASK_C_AND, match_opcode, INSN_ALIAS }, {"and", 0, INSN_CLASS_C, "Cs,Ct,Cw", MATCH_C_AND, MASK_C_AND, match_opcode, INSN_ALIAS }, {"and", 0, INSN_CLASS_C, "Cs,Cw,Co", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, INSN_ALIAS }, {"and", 0, INSN_CLASS_I, "d,s,t", MATCH_AND, MASK_AND, match_opcode, 0 }, {"and", 0, INSN_CLASS_I, "d,s,j", MATCH_ANDI, MASK_ANDI, match_opcode, INSN_ALIAS }, -{"andi", 0, INSN_CLASS_ZCB, "Cs,Cw,Wcf",MATCH_C_ZEXT_B, MASK_C_ZEXT_B, match_opcode, INSN_ALIAS }, -{"andi", 0, INSN_CLASS_C, "Cs,Cw,Co", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, INSN_ALIAS }, -{"andi", 0, INSN_CLASS_I, "d,s,j", MATCH_ANDI, MASK_ANDI, match_opcode, 0 }, {"beqz", 0, INSN_CLASS_C, "Cs,Cp", MATCH_C_BEQZ, MASK_C_BEQZ, match_opcode, INSN_ALIAS|INSN_CONDBRANCH }, {"beqz", 0, INSN_CLASS_I, "s,p", MATCH_BEQ, MASK_BEQ|MASK_RS2, match_opcode, INSN_ALIAS|INSN_CONDBRANCH }, {"beq", 0, INSN_CLASS_C, "Cs,Cz,Cp", MATCH_C_BEQZ, MASK_C_BEQZ, match_opcode, INSN_ALIAS|INSN_CONDBRANCH }, @@ -410,6 +410,13 @@ const struct riscv_opcode riscv_opcodes[ {"bnez", 0, INSN_CLASS_I, "s,p", MATCH_BNE, MASK_BNE|MASK_RS2, match_opcode, INSN_ALIAS|INSN_CONDBRANCH }, {"bne", 0, INSN_CLASS_C, "Cs,Cz,Cp", MATCH_C_BNEZ, MASK_C_BNEZ, match_opcode, INSN_ALIAS|INSN_CONDBRANCH }, {"bne", 0, INSN_CLASS_I, "s,t,p", MATCH_BNE, MASK_BNE, match_opcode, INSN_CONDBRANCH }, +{"addi", 0, INSN_CLASS_C, "Ct,Cc,CK", MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN, match_c_addi4spn, INSN_ALIAS }, +{"addi", 0, INSN_CLASS_C, "d,CU,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, INSN_ALIAS }, +{"addi", 0, INSN_CLASS_C, "d,CU,z", MATCH_C_NOP, MASK_C_ADDI|MASK_RVC_IMM, match_c_nop, INSN_ALIAS }, +{"addi", 0, INSN_CLASS_C, "Cc,Cc,CL", MATCH_C_ADDI16SP, MASK_C_ADDI16SP, match_c_addi16sp, INSN_ALIAS }, +{"addi", 0, INSN_CLASS_C, "d,Cz,Co", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, INSN_ALIAS }, +{"addi", 0, INSN_CLASS_C, "d,CV,z", MATCH_C_MV, MASK_C_MV, match_c_add, INSN_ALIAS }, +{"addi", 0, INSN_CLASS_I, "d,s,j", MATCH_ADDI, MASK_ADDI, match_opcode, 0 }, {"add", 0, INSN_CLASS_C, "d,CU,CV", MATCH_C_ADD, MASK_C_ADD, match_c_add, INSN_ALIAS }, {"add", 0, INSN_CLASS_C, "d,CV,CU", MATCH_C_ADD, MASK_C_ADD, match_c_add, INSN_ALIAS }, {"add", 0, INSN_CLASS_C, "d,CU,Co", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, INSN_ALIAS }, @@ -419,34 +426,27 @@ const struct riscv_opcode riscv_opcodes[ {"add", 0, INSN_CLASS_I, "d,s,t", MATCH_ADD, MASK_ADD, match_opcode, 0 }, {"add", 0, INSN_CLASS_I, "d,s,t,1", MATCH_ADD, MASK_ADD, match_opcode, 0 }, {"add", 0, INSN_CLASS_I, "d,s,j", MATCH_ADDI, MASK_ADDI, match_opcode, INSN_ALIAS }, -{"addi", 0, INSN_CLASS_C, "Ct,Cc,CK", MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN, match_c_addi4spn, INSN_ALIAS }, -{"addi", 0, INSN_CLASS_C, "d,CU,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, INSN_ALIAS }, -{"addi", 0, INSN_CLASS_C, "d,CU,z", MATCH_C_NOP, MASK_C_ADDI|MASK_RVC_IMM, match_c_nop, INSN_ALIAS }, -{"addi", 0, INSN_CLASS_C, "Cc,Cc,CL", MATCH_C_ADDI16SP, MASK_C_ADDI16SP, match_c_addi16sp, INSN_ALIAS }, -{"addi", 0, INSN_CLASS_C, "d,Cz,Co", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, INSN_ALIAS }, -{"addi", 0, INSN_CLASS_C, "d,CV,z", MATCH_C_MV, MASK_C_MV, match_c_add, INSN_ALIAS }, -{"addi", 0, INSN_CLASS_I, "d,s,j", MATCH_ADDI, MASK_ADDI, match_opcode, 0 }, {"la", 0, INSN_CLASS_I, "d,B", 0, (int) M_LA, match_never, INSN_MACRO }, {"lla", 0, INSN_CLASS_I, "d,B", 0, (int) M_LLA, match_never, INSN_MACRO }, {"lga", 0, INSN_CLASS_I, "d,B", 0, (int) M_LGA, match_never, INSN_MACRO }, {"la.tls.gd", 0, INSN_CLASS_I, "d,A", 0, (int) M_LA_TLS_GD, match_never, INSN_MACRO }, {"la.tls.ie", 0, INSN_CLASS_I, "d,A", 0, (int) M_LA_TLS_IE, match_never, INSN_MACRO }, {"neg", 0, INSN_CLASS_I, "d,t", MATCH_SUB, MASK_SUB|MASK_RS1, match_opcode, INSN_ALIAS }, /* sub 0 */ +{"slli", 0, INSN_CLASS_C, "d,CU,C>", MATCH_C_SLLI, MASK_C_SLLI, match_slli_as_c_slli, INSN_ALIAS }, +{"slli", 0, INSN_CLASS_I, "d,s,>", MATCH_SLLI, MASK_SLLI, match_opcode, 0 }, {"sll", 0, INSN_CLASS_C, "d,CU,C>", MATCH_C_SLLI, MASK_C_SLLI, match_slli_as_c_slli, INSN_ALIAS }, {"sll", 0, INSN_CLASS_I, "d,s,t", MATCH_SLL, MASK_SLL, match_opcode, 0 }, {"sll", 0, INSN_CLASS_I, "d,s,>", MATCH_SLLI, MASK_SLLI, match_opcode, INSN_ALIAS }, -{"slli", 0, INSN_CLASS_C, "d,CU,C>", MATCH_C_SLLI, MASK_C_SLLI, match_slli_as_c_slli, INSN_ALIAS }, -{"slli", 0, INSN_CLASS_I, "d,s,>", MATCH_SLLI, MASK_SLLI, match_opcode, 0 }, +{"srli", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_srxi_as_c_srxi, INSN_ALIAS }, +{"srli", 0, INSN_CLASS_I, "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, 0 }, {"srl", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_srxi_as_c_srxi, INSN_ALIAS }, {"srl", 0, INSN_CLASS_I, "d,s,t", MATCH_SRL, MASK_SRL, match_opcode, 0 }, {"srl", 0, INSN_CLASS_I, "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, INSN_ALIAS }, -{"srli", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_srxi_as_c_srxi, INSN_ALIAS }, -{"srli", 0, INSN_CLASS_I, "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, 0 }, +{"srai", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_srxi_as_c_srxi, INSN_ALIAS }, +{"srai", 0, INSN_CLASS_I, "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, 0 }, {"sra", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_srxi_as_c_srxi, INSN_ALIAS }, {"sra", 0, INSN_CLASS_I, "d,s,t", MATCH_SRA, MASK_SRA, match_opcode, 0 }, {"sra", 0, INSN_CLASS_I, "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, INSN_ALIAS }, -{"srai", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_srxi_as_c_srxi, INSN_ALIAS }, -{"srai", 0, INSN_CLASS_I, "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, 0 }, {"sub", 0, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_SUB, MASK_C_SUB, match_opcode, INSN_ALIAS }, {"sub", 0, INSN_CLASS_I, "d,s,t", MATCH_SUB, MASK_SUB, match_opcode, 0 }, {"lb", 0, INSN_CLASS_I, "d,o(s)", MATCH_LB, MASK_LB, match_opcode, INSN_DREF|INSN_1_BYTE }, @@ -466,11 +466,11 @@ const struct riscv_opcode riscv_opcodes[ {"lw", 0, INSN_CLASS_I, "d,A", 0, (int) M_LW, match_never, INSN_MACRO }, {"not", 0, INSN_CLASS_ZCB, "Cs,Cw", MATCH_C_NOT, MASK_C_NOT, match_opcode, INSN_ALIAS }, {"not", 0, INSN_CLASS_I, "d,s", MATCH_XORI|MASK_IMM, MASK_XORI|MASK_IMM, match_opcode, INSN_ALIAS }, +{"ori", 0, INSN_CLASS_I, "d,s,j", MATCH_ORI, MASK_ORI, match_opcode, 0 }, {"or", 0, INSN_CLASS_I, "d,s,j", MATCH_ORI, MASK_ORI, match_opcode, INSN_ALIAS }, {"or", 0, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_OR, MASK_C_OR, match_opcode, INSN_ALIAS }, {"or", 0, INSN_CLASS_C, "Cs,Ct,Cw", MATCH_C_OR, MASK_C_OR, match_opcode, INSN_ALIAS }, {"or", 0, INSN_CLASS_I, "d,s,t", MATCH_OR, MASK_OR, match_opcode, 0 }, -{"ori", 0, INSN_CLASS_I, "d,s,j", MATCH_ORI, MASK_ORI, match_opcode, 0 }, {"auipc", 0, INSN_CLASS_I, "d,u", MATCH_AUIPC, MASK_AUIPC, match_opcode, 0 }, {"seqz", 0, INSN_CLASS_I, "d,s", MATCH_SLTIU|ENCODE_ITYPE_IMM (1), MASK_SLTIU | MASK_IMM, match_opcode, INSN_ALIAS }, {"snez", 0, INSN_CLASS_I, "d,t", MATCH_SLTU, MASK_SLTU|MASK_RS1, match_opcode, INSN_ALIAS }, @@ -506,11 +506,11 @@ const struct riscv_opcode riscv_opcodes[ {"rdtimeh", 32, INSN_CLASS_I, "d", MATCH_RDTIMEH, MASK_RDTIMEH, match_opcode, INSN_ALIAS }, {"ecall", 0, INSN_CLASS_I, "", MATCH_SCALL, MASK_SCALL, match_opcode, 0 }, {"scall", 0, INSN_CLASS_I, "", MATCH_SCALL, MASK_SCALL, match_opcode, 0 }, +{"xori", 0, INSN_CLASS_I, "d,s,j", MATCH_XORI, MASK_XORI, match_opcode, 0 }, {"xor", 0, INSN_CLASS_I, "d,s,j", MATCH_XORI, MASK_XORI, match_opcode, INSN_ALIAS }, {"xor", 0, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_XOR, MASK_C_XOR, match_opcode, INSN_ALIAS }, {"xor", 0, INSN_CLASS_C, "Cs,Ct,Cw", MATCH_C_XOR, MASK_C_XOR, match_opcode, INSN_ALIAS }, {"xor", 0, INSN_CLASS_I, "d,s,t", MATCH_XOR, MASK_XOR, match_opcode, 0 }, -{"xori", 0, INSN_CLASS_I, "d,s,j", MATCH_XORI, MASK_XORI, match_opcode, 0 }, {"lwu", 64, INSN_CLASS_I, "d,o(s)", MATCH_LWU, MASK_LWU, match_opcode, INSN_DREF|INSN_4_BYTE }, {"lwu", 64, INSN_CLASS_I, "d,A", 0, (int) M_LWU, match_never, INSN_MACRO }, {"ld", 64, INSN_CLASS_C, "d,Cn(Cc)", MATCH_C_LDSP, MASK_C_LDSP, match_rd_nonzero, INSN_ALIAS|INSN_DREF|INSN_8_BYTE }, @@ -523,23 +523,23 @@ const struct riscv_opcode riscv_opcodes[ {"sd", 64, INSN_CLASS_I, "t,A,s", 0, (int) M_SD, match_never, INSN_MACRO }, {"sext.w", 64, INSN_CLASS_C, "d,CU", MATCH_C_ADDIW, MASK_C_ADDIW|MASK_RVC_IMM, match_rd_nonzero, INSN_ALIAS }, {"sext.w", 64, INSN_CLASS_I, "d,s", MATCH_ADDIW, MASK_ADDIW|MASK_IMM, match_opcode, INSN_ALIAS }, +{"addiw", 64, INSN_CLASS_C, "d,CU,Co", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, INSN_ALIAS }, +{"addiw", 64, INSN_CLASS_I, "d,s,j", MATCH_ADDIW, MASK_ADDIW, match_opcode, 0 }, {"addw", 64, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_ADDW, MASK_C_ADDW, match_opcode, INSN_ALIAS }, {"addw", 64, INSN_CLASS_C, "Cs,Ct,Cw", MATCH_C_ADDW, MASK_C_ADDW, match_opcode, INSN_ALIAS }, {"addw", 64, INSN_CLASS_C, "d,CU,Co", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, INSN_ALIAS }, {"addw", 64, INSN_CLASS_I, "d,s,t", MATCH_ADDW, MASK_ADDW, match_opcode, 0 }, {"addw", 64, INSN_CLASS_I, "d,s,j", MATCH_ADDIW, MASK_ADDIW, match_opcode, INSN_ALIAS }, -{"addiw", 64, INSN_CLASS_C, "d,CU,Co", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, INSN_ALIAS }, -{"addiw", 64, INSN_CLASS_I, "d,s,j", MATCH_ADDIW, MASK_ADDIW, match_opcode, 0 }, {"negw", 64, INSN_CLASS_I, "d,t", MATCH_SUBW, MASK_SUBW|MASK_RS1, match_opcode, INSN_ALIAS }, /* sub 0 */ +{"slliw", 64, INSN_CLASS_I, "d,s,<", MATCH_SLLIW, MASK_SLLIW, match_opcode, 0 }, {"sllw", 64, INSN_CLASS_I, "d,s,t", MATCH_SLLW, MASK_SLLW, match_opcode, 0 }, {"sllw", 64, INSN_CLASS_I, "d,s,<", MATCH_SLLIW, MASK_SLLIW, match_opcode, INSN_ALIAS }, -{"slliw", 64, INSN_CLASS_I, "d,s,<", MATCH_SLLIW, MASK_SLLIW, match_opcode, 0 }, +{"srliw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRLIW, MASK_SRLIW, match_opcode, 0 }, {"srlw", 64, INSN_CLASS_I, "d,s,t", MATCH_SRLW, MASK_SRLW, match_opcode, 0 }, {"srlw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRLIW, MASK_SRLIW, match_opcode, INSN_ALIAS }, -{"srliw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRLIW, MASK_SRLIW, match_opcode, 0 }, +{"sraiw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRAIW, MASK_SRAIW, match_opcode, 0 }, {"sraw", 64, INSN_CLASS_I, "d,s,t", MATCH_SRAW, MASK_SRAW, match_opcode, 0 }, {"sraw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRAIW, MASK_SRAIW, match_opcode, INSN_ALIAS }, -{"sraiw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRAIW, MASK_SRAIW, match_opcode, 0 }, {"subw", 64, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_SUBW, MASK_C_SUBW, match_opcode, INSN_ALIAS }, {"subw", 64, INSN_CLASS_I, "d,s,t", MATCH_SUBW, MASK_SUBW, match_opcode, 0 }, @@ -1050,15 +1050,15 @@ const struct riscv_opcode riscv_opcodes[ {"orn", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_ORN, MASK_ORN, match_opcode, 0 }, {"xnor", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_XNOR, MASK_XNOR, match_opcode, 0 }, {"rol", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_ROL, MASK_ROL, match_opcode, 0 }, +{"rori", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,>", MATCH_RORI, MASK_RORI, match_opcode, 0 }, {"ror", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_ROR, MASK_ROR, match_opcode, 0 }, {"ror", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,>", MATCH_RORI, MASK_RORI, match_opcode, INSN_ALIAS }, -{"rori", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,>", MATCH_RORI, MASK_RORI, match_opcode, 0 }, {"rev8", 32, INSN_CLASS_ZBB_OR_ZBKB, "d,s", MATCH_GREVI | MATCH_SHAMT_REV8_32, MASK_GREVI | MASK_SHAMT, match_opcode, 0 }, {"rev8", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s", MATCH_GREVI | MATCH_SHAMT_REV8_64, MASK_GREVI | MASK_SHAMT, match_opcode, 0 }, {"rolw", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_ROLW, MASK_ROLW, match_opcode, 0 }, +{"roriw", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s,<", MATCH_RORIW, MASK_RORIW, match_opcode, 0 }, {"rorw", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_RORW, MASK_RORW, match_opcode, 0 }, {"rorw", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s,<", MATCH_RORIW, MASK_RORIW, match_opcode, INSN_ALIAS }, -{"roriw", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s,<", MATCH_RORIW, MASK_RORIW, match_opcode, 0 }, /* Zba instructions. */ {"sh1add", 0, INSN_CLASS_ZBA, "d,s,t", MATCH_SH1ADD, MASK_SH1ADD, match_opcode, 0 }, @@ -1079,18 +1079,18 @@ const struct riscv_opcode riscv_opcodes[ {"clmulr", 0, INSN_CLASS_ZBC, "d,s,t", MATCH_CLMULR, MASK_CLMULR, match_opcode, 0 }, /* Zbs instructions. */ +{"bclri", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BCLRI, MASK_BCLRI, match_opcode, 0 }, {"bclr", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BCLR, MASK_BCLR, match_opcode, 0 }, {"bclr", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BCLRI, MASK_BCLRI, match_opcode, INSN_ALIAS }, -{"bclri", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BCLRI, MASK_BCLRI, match_opcode, 0 }, +{"bseti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BSETI, MASK_BSETI, match_opcode, 0 }, {"bset", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BSET, MASK_BSET, match_opcode, 0 }, {"bset", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BSETI, MASK_BSETI, match_opcode, INSN_ALIAS }, -{"bseti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BSETI, MASK_BSETI, match_opcode, 0 }, +{"binvi", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BINVI, MASK_BINVI, match_opcode, 0 }, {"binv", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BINV, MASK_BINV, match_opcode, 0 }, {"binv", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BINVI, MASK_BINVI, match_opcode, INSN_ALIAS }, -{"binvi", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BINVI, MASK_BINVI, match_opcode, 0 }, +{"bexti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BEXTI, MASK_BEXTI, match_opcode, 0 }, {"bext", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BEXT, MASK_BEXT, match_opcode, 0 }, {"bext", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BEXTI, MASK_BEXTI, match_opcode, INSN_ALIAS }, -{"bexti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BEXTI, MASK_BEXTI, match_opcode, 0 }, /* Zbkx instructions. */ {"xperm4", 0, INSN_CLASS_ZBKX, "d,s,t", MATCH_XPERM4, MASK_XPERM4, match_opcode, 0 }, @@ -1969,24 +1969,24 @@ const struct riscv_opcode riscv_opcodes[ /* Supervisor instructions. */ {"csrr", 0, INSN_CLASS_ZICSR, "d,E", MATCH_CSRRS, MASK_CSRRS|MASK_RS1, match_opcode, INSN_ALIAS }, +{"csrwi", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRWI, MASK_CSRRWI|MASK_RD, match_opcode, INSN_ALIAS }, {"csrw", 0, INSN_CLASS_ZICSR, "E,s", MATCH_CSRRW, MASK_CSRRW|MASK_RD, match_opcode, INSN_ALIAS }, {"csrw", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRWI, MASK_CSRRWI|MASK_RD, match_opcode, INSN_ALIAS }, -{"csrwi", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRWI, MASK_CSRRWI|MASK_RD, match_opcode, INSN_ALIAS }, +{"csrsi", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRSI, MASK_CSRRSI|MASK_RD, match_opcode, INSN_ALIAS }, {"csrs", 0, INSN_CLASS_ZICSR, "E,s", MATCH_CSRRS, MASK_CSRRS|MASK_RD, match_opcode, INSN_ALIAS }, {"csrs", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRSI, MASK_CSRRSI|MASK_RD, match_opcode, INSN_ALIAS }, -{"csrsi", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRSI, MASK_CSRRSI|MASK_RD, match_opcode, INSN_ALIAS }, +{"csrci", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRCI, MASK_CSRRCI|MASK_RD, match_opcode, INSN_ALIAS }, {"csrc", 0, INSN_CLASS_ZICSR, "E,s", MATCH_CSRRC, MASK_CSRRC|MASK_RD, match_opcode, INSN_ALIAS }, {"csrc", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRCI, MASK_CSRRCI|MASK_RD, match_opcode, INSN_ALIAS }, -{"csrci", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRCI, MASK_CSRRCI|MASK_RD, match_opcode, INSN_ALIAS }, +{"csrrwi", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRWI, MASK_CSRRWI, match_opcode, 0 }, {"csrrw", 0, INSN_CLASS_ZICSR, "d,E,s", MATCH_CSRRW, MASK_CSRRW, match_opcode, 0 }, {"csrrw", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRWI, MASK_CSRRWI, match_opcode, INSN_ALIAS }, -{"csrrwi", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRWI, MASK_CSRRWI, match_opcode, 0 }, +{"csrrsi", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRSI, MASK_CSRRSI, match_opcode, 0 }, {"csrrs", 0, INSN_CLASS_ZICSR, "d,E,s", MATCH_CSRRS, MASK_CSRRS, match_opcode, 0 }, {"csrrs", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRSI, MASK_CSRRSI, match_opcode, INSN_ALIAS }, -{"csrrsi", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRSI, MASK_CSRRSI, match_opcode, 0 }, +{"csrrci", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRCI, MASK_CSRRCI, match_opcode, 0 }, {"csrrc", 0, INSN_CLASS_ZICSR, "d,E,s", MATCH_CSRRC, MASK_CSRRC, match_opcode, 0 }, {"csrrc", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRCI, MASK_CSRRCI, match_opcode, INSN_ALIAS }, -{"csrrci", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRCI, MASK_CSRRCI, match_opcode, 0 }, {"uret", 0, INSN_CLASS_I, "", MATCH_URET, MASK_URET, match_opcode, 0 }, {"sret", 0, INSN_CLASS_I, "", MATCH_SRET, MASK_SRET, match_opcode, 0 }, {"hret", 0, INSN_CLASS_I, "", MATCH_HRET, MASK_HRET, match_opcode, 0 }, ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] RISC-V: move various alias entries 2023-08-04 12:00 [PATCH] RISC-V: move various alias entries Jan Beulich @ 2023-08-05 1:40 ` Tsukasa OI 2023-08-25 13:01 ` Jan Beulich 0 siblings, 1 reply; 5+ messages in thread From: Tsukasa OI @ 2023-08-05 1:40 UTC (permalink / raw) To: Jan Beulich; +Cc: Binutils On 2023/08/04 21:00, Jan Beulich via Binutils wrote: > For disassembly to only use spec-mandated aliases, respective non-alias > entries need to come ahead of their alias ones. Since identical > mnemonics need to stay together, whole groups are moved up where > necessary. > > This partly reverts 839189bc932e ("RISC-V: re-arrange opcode table for > consistent alias handling"), but then also goes beyond a plain revert. > --- > I did not adjust JAL back, to continue to match JALR. The spec doesn't > spell out how operands are to be specified, and hence it also doesn't > mention how many explicit ones there are supposed to be. > > What about NEG, NEGW, and RET (and perhaps more)? The spec doesn't know > of those afaics. I think JAL, NEG, NEGW and RET are okay as is. For JAL, I support Jan's opinion. For all instructions Jan pointed out (including JAL with one operand), they are listed in the RISC-V Assembly Programmer's Manual: <https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md> and should be considered safe (unlike "add rd, rs1, IMM" == "addi rd, rs1, IMM"). I support merging this patch without modification (or perhaps, with minor modification to the commit message?). Reviewed-by: Tsukasa OI <research_trasio@irq.a4lg.com> > > --- a/gas/testsuite/gas/riscv/b-ext.d > +++ b/gas/testsuite/gas/riscv/b-ext.d > @@ -23,8 +23,8 @@ Disassembly of section .text: > [ ]+30:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 > [ ]+34:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 > [ ]+38:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 > -[ ]+3c:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 > -[ ]+40:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 > +[ ]+3c:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > +[ ]+40:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > [ ]+44:[ ]+69855513[ ]+rev8[ ]+a0,a0 > [ ]+48:[ ]+28755513[ ]+orc.b[ ]+a0,a0 > [ ]+4c:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2 > @@ -33,19 +33,19 @@ Disassembly of section .text: > [ ]+58:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2 > [ ]+5c:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2 > [ ]+60:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclr[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+28059513[ ]+bset[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+68059513[ ]+binv[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bext[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclri[ ]+a0,a1,0x0 > +[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+28059513[ ]+bseti[ ]+a0,a1,0x0 > +[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+68059513[ ]+binvi[ ]+a0,a1,0x0 > +[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bexti[ ]+a0,a1,0x0 > +[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f > [ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f > --- a/gas/testsuite/gas/riscv/b-ext-64.d > +++ b/gas/testsuite/gas/riscv/b-ext-64.d > @@ -23,8 +23,8 @@ Disassembly of section .text: > [ ]+30:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 > [ ]+34:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 > [ ]+38:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 > -[ ]+3c:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 > -[ ]+40:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 > +[ ]+3c:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > +[ ]+40:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > [ ]+44:[ ]+6b855513[ ]+rev8[ ]+a0,a0 > [ ]+48:[ ]+28755513[ ]+orc.b[ ]+a0,a0 > [ ]+4c:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2 > @@ -38,35 +38,35 @@ Disassembly of section .text: > [ ]+6c:[ ]+6025151b[ ]+cpopw[ ]+a0,a0 > [ ]+70:[ ]+60c5953b[ ]+rolw[ ]+a0,a1,a2 > [ ]+74:[ ]+60c5d53b[ ]+rorw[ ]+a0,a1,a2 > -[ ]+78:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2 > -[ ]+7c:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2 > +[ ]+78:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 > +[ ]+7c:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 > [ ]+80:[ ]+20c5a53b[ ]+sh1add.uw[ ]+a0,a1,a2 > [ ]+84:[ ]+20c5c53b[ ]+sh2add.uw[ ]+a0,a1,a2 > [ ]+88:[ ]+20c5e53b[ ]+sh3add.uw[ ]+a0,a1,a2 > [ ]+8c:[ ]+08c5853b[ ]+add.uw[ ]+a0,a1,a2 > [ ]+90:[ ]+0805853b[ ]+zext.w[ ]+a0,a1 > [ ]+94:[ ]+0825951b[ ]+slli.uw[ ]+a0,a1,0x2 > -[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclr[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+28059513[ ]+bset[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+68059513[ ]+binv[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bext[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclr[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bset[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binv[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bext[ ]+a0,a1,0x3f > +[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclri[ ]+a0,a1,0x0 > +[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+28059513[ ]+bseti[ ]+a0,a1,0x0 > +[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+68059513[ ]+binvi[ ]+a0,a1,0x0 > +[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bexti[ ]+a0,a1,0x0 > +[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclri[ ]+a0,a1,0x3f > +[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bseti[ ]+a0,a1,0x3f > +[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binvi[ ]+a0,a1,0x3f > +[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bexti[ ]+a0,a1,0x3f > [ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclr[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bset[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binv[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bext[ ]+a0,a1,0x3f > +[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f > +[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclri[ ]+a0,a1,0x3f > +[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bseti[ ]+a0,a1,0x3f > +[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binvi[ ]+a0,a1,0x3f > +[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bexti[ ]+a0,a1,0x3f > --- a/gas/testsuite/gas/riscv/b-ext-64-na.d > +++ /dev/null > @@ -1,72 +0,0 @@ > -#as: -march=rv64i_zba_zbb_zbc_zbs > -#source: b-ext-64.s > -#objdump: -d -Mno-aliases > - > -.*:[ ]+file format .* > - > - > -Disassembly of section .text: > - > -0+000 <target>: > -[ ]+[0-9a-f]+:[ ]+60051513[ ]+clz[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+60151513[ ]+ctz[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+60251513[ ]+cpop[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac5d533[ ]+minu[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac5f533[ ]+maxu[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+60451513[ ]+sext\.b[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+60551513[ ]+sext\.h[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+0805453b[ ]+zext\.h[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > -[ ]+[0-9a-f]+:[ ]+6b855513[ ]+rev8[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+28755513[ ]+orc\.b[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+6005151b[ ]+clzw[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+6015151b[ ]+ctzw[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+6025151b[ ]+cpopw[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+60c5953b[ ]+rolw[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+60c5d53b[ ]+rorw[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 > -[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 > -[ ]+[0-9a-f]+:[ ]+20c5a53b[ ]+sh1add\.uw[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+20c5c53b[ ]+sh2add\.uw[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+20c5e53b[ ]+sh3add\.uw[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+08c5853b[ ]+add\.uw[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0805853b[ ]+add\.uw[ ]+a0,a1,zero > -[ ]+[0-9a-f]+:[ ]+0825951b[ ]+slli\.uw[ ]+a0,a1,0x2 > -[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclri[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+28059513[ ]+bseti[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+68059513[ ]+binvi[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bexti[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclri[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bseti[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binvi[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bexti[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclri[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bseti[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binvi[ ]+a0,a1,0x3f > -[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bexti[ ]+a0,a1,0x3f > --- a/gas/testsuite/gas/riscv/b-ext-na.d > +++ /dev/null > @@ -1,51 +0,0 @@ > -#as: -march=rv32i_zba_zbb_zbc_zbs > -#source: b-ext.s > -#objdump: -d -Mno-aliases > - > -.*:[ ]+file format .* > - > - > -Disassembly of section .text: > - > -0+000 <target>: > -[ ]+[0-9a-f]+:[ ]+60051513[ ]+clz[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+60151513[ ]+ctz[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+60251513[ ]+cpop[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac5d533[ ]+minu[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac5f533[ ]+maxu[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+60451513[ ]+sext\.b[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+60551513[ ]+sext\.h[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+08054533[ ]+zext\.h[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > -[ ]+[0-9a-f]+:[ ]+69855513[ ]+rev8[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+28755513[ ]+orc\.b[ ]+a0,a0 > -[ ]+[0-9a-f]+:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclri[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+28059513[ ]+bseti[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+68059513[ ]+binvi[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bexti[ ]+a0,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bseti[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f > -[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f > --- a/gas/testsuite/gas/riscv/c-zero-imm.d > +++ b/gas/testsuite/gas/riscv/c-zero-imm.d > @@ -9,14 +9,14 @@ Disassembly of section .text: > 0+000 <.text>: > [ ]+0:[ ]+4501[ ]+li[ ]+a0,0 > [ ]+2:[ ]+4581[ ]+li[ ]+a1,0 > -[ ]+4:[ ]+8a01[ ]+and[ ]+a2,a2,0 > -[ ]+6:[ ]+8a81[ ]+and[ ]+a3,a3,0 > +[ ]+4:[ ]+8a01[ ]+andi[ ]+a2,a2,0 > +[ ]+6:[ ]+8a81[ ]+andi[ ]+a3,a3,0 > [ ]+8:[ ]+0001[ ]+nop > [ ]+a:[ ]+873a[ ]+mv[ ]+a4,a4 > -[ ]+c:[ ]+0781[ ]+add[ ]+a5,a5,0 > -[ ]+e:[ ]+00051513[ ]+sll[ ]+a0,a0,0x0 > -[ ]+12:[ ]+0005d593[ ]+srl[ ]+a1,a1,0x0 > -[ ]+16:[ ]+40065613[ ]+sra[ ]+a2,a2,0x0 > +[ ]+c:[ ]+0781[ ]+addi[ ]+a5,a5,0 > +[ ]+e:[ ]+00051513[ ]+slli[ ]+a0,a0,0x0 > +[ ]+12:[ ]+0005d593[ ]+srli[ ]+a1,a1,0x0 > +[ ]+16:[ ]+40065613[ ]+srai[ ]+a2,a2,0x0 > [ ]+1a:[ ]+0682[ ]+c.slli64[ ]+a3 > [ ]+1c:[ ]+8301[ ]+c.srli64[ ]+a4 > [ ]+1e:[ ]+8781[ ]+c.srai64[ ]+a5 > --- a/gas/testsuite/gas/riscv/c-zero-imm-na.d > +++ /dev/null > @@ -1,24 +0,0 @@ > -#as: > -#source: c-zero-imm.s > -#objdump: -dr -Mno-aliases > - > -.*:[ ]+file format .* > - > - > -Disassembly of section .text: > - > -0+000 <.text>: > -[ ]+[0-9a-f]+:[ ]+4501[ ]+c\.li[ ]+a0,0 > -[ ]+[0-9a-f]+:[ ]+4581[ ]+c\.li[ ]+a1,0 > -[ ]+[0-9a-f]+:[ ]+8a01[ ]+c\.andi[ ]+a2,0 > -[ ]+[0-9a-f]+:[ ]+8a81[ ]+c\.andi[ ]+a3,0 > -[ ]+[0-9a-f]+:[ ]+0001[ ]+c\.addi[ ]+zero,0 > -[ ]+[0-9a-f]+:[ ]+873a[ ]+c\.mv[ ]+a4,a4 > -[ ]+[0-9a-f]+:[ ]+0781[ ]+c\.addi[ ]+a5,0 > -[ ]+[0-9a-f]+:[ ]+00051513[ ]+slli[ ]+a0,a0,0x0 > -[ ]+[0-9a-f]+:[ ]+0005d593[ ]+srli[ ]+a1,a1,0x0 > -[ ]+[0-9a-f]+:[ ]+40065613[ ]+srai[ ]+a2,a2,0x0 > -[ ]+[0-9a-f]+:[ ]+0682[ ]+c\.slli64[ ]+a3 > -[ ]+[0-9a-f]+:[ ]+8301[ ]+c\.srli64[ ]+a4 > -[ ]+[0-9a-f]+:[ ]+8781[ ]+c\.srai64[ ]+a5 > -#... > --- a/gas/testsuite/gas/riscv/c-zero-reg.d > +++ b/gas/testsuite/gas/riscv/c-zero-reg.d > @@ -14,7 +14,7 @@ Disassembly of section .text: > [ ]+8:[ ]+9006[ ]+c.add[ ]+zero,ra > [ ]+a:[ ]+00500013[ ]+li[ ]+zero,5 > [ ]+e:[ ]+00006037[ ]+lui[ ]+zero,0x6 > -[ ]+12:[ ]+00701013[ ]+sll[ ]+zero,zero,0x7 > +[ ]+12:[ ]+00701013[ ]+slli[ ]+zero,zero,0x7 > [ ]+16:[ ]+00008013[ ]+mv[ ]+zero,ra > [ ]+1a:[ ]+00100033[ ]+add[ ]+zero,zero,ra > #... > --- a/gas/testsuite/gas/riscv/csr-insns-pseudo.d > +++ b/gas/testsuite/gas/riscv/csr-insns-pseudo.d > @@ -12,9 +12,9 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+00029073[ ]+csrw[ ]+ustatus,t0 > [ ]+[0-9a-f]+:[ ]+0002a073[ ]+csrs[ ]+ustatus,t0 > [ ]+[0-9a-f]+:[ ]+0002b073[ ]+csrc[ ]+ustatus,t0 > -[ ]+[0-9a-f]+:[ ]+000fd073[ ]+csrw[ ]+ustatus,31 > -[ ]+[0-9a-f]+:[ ]+000fe073[ ]+csrs[ ]+ustatus,31 > -[ ]+[0-9a-f]+:[ ]+000ff073[ ]+csrc[ ]+ustatus,31 > +[ ]+[0-9a-f]+:[ ]+000fd073[ ]+csrwi[ ]+ustatus,31 > +[ ]+[0-9a-f]+:[ ]+000fe073[ ]+csrsi[ ]+ustatus,31 > +[ ]+[0-9a-f]+:[ ]+000ff073[ ]+csrci[ ]+ustatus,31 > [ ]+[0-9a-f]+:[ ]+c00022f3[ ]+rdcycle[ ]+t0 > [ ]+[0-9a-f]+:[ ]+c01022f3[ ]+rdtime[ ]+t0 > [ ]+[0-9a-f]+:[ ]+c02022f3[ ]+rdinstret[ ]+t0 > --- a/gas/testsuite/gas/riscv/csr-insns-pseudo-zfinx.d > +++ b/gas/testsuite/gas/riscv/csr-insns-pseudo-zfinx.d > @@ -12,9 +12,9 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+00029073[ ]+csrw[ ]+ustatus,t0 > [ ]+[0-9a-f]+:[ ]+0002a073[ ]+csrs[ ]+ustatus,t0 > [ ]+[0-9a-f]+:[ ]+0002b073[ ]+csrc[ ]+ustatus,t0 > -[ ]+[0-9a-f]+:[ ]+000fd073[ ]+csrw[ ]+ustatus,31 > -[ ]+[0-9a-f]+:[ ]+000fe073[ ]+csrs[ ]+ustatus,31 > -[ ]+[0-9a-f]+:[ ]+000ff073[ ]+csrc[ ]+ustatus,31 > +[ ]+[0-9a-f]+:[ ]+000fd073[ ]+csrwi[ ]+ustatus,31 > +[ ]+[0-9a-f]+:[ ]+000fe073[ ]+csrsi[ ]+ustatus,31 > +[ ]+[0-9a-f]+:[ ]+000ff073[ ]+csrci[ ]+ustatus,31 > [ ]+[0-9a-f]+:[ ]+c00022f3[ ]+rdcycle[ ]+t0 > [ ]+[0-9a-f]+:[ ]+c01022f3[ ]+rdtime[ ]+t0 > [ ]+[0-9a-f]+:[ ]+c02022f3[ ]+rdinstret[ ]+t0 > --- a/gas/testsuite/gas/riscv/dis-addr-addiw-a.d > +++ b/gas/testsuite/gas/riscv/dis-addr-addiw-a.d > @@ -9,10 +9,10 @@ Disassembly of section .text: > > 0+ffffffe0 <_start>: > [ ]+ffffffe0:[ ]+00000297[ ]+auipc[ ]+t0,0x0 > -[ ]+ffffffe4:[ ]+0182831b[ ]+addw[ ]+t1,t0,24 # fffffffffffffff8 <addr_rv64_addiw_0a> > +[ ]+ffffffe4:[ ]+0182831b[ ]+addiw[ ]+t1,t0,24 # fffffffffffffff8 <addr_rv64_addiw_0a> > [ ]+ffffffe8:[ ]+00000397[ ]+auipc[ ]+t2,0x0 > -[ ]+ffffffec:[ ]+01c38e1b[ ]+addw[ ]+t3,t2,28 # 4 <addr_rv64_addiw_0b> > +[ ]+ffffffec:[ ]+01c38e1b[ ]+addiw[ ]+t3,t2,28 # 4 <addr_rv64_addiw_0b> > [ ]+fffffff0:[ ]+00000e97[ ]+auipc[ ]+t4,0x0 > -[ ]+fffffff4:[ ]+2eb1[ ]+addw[ ]+t4,t4,12 # fffffffffffffffc <addr_rv64_c_addiw_0a> > +[ ]+fffffff4:[ ]+2eb1[ ]+addiw[ ]+t4,t4,12 # fffffffffffffffc <addr_rv64_c_addiw_0a> > [ ]+fffffff6:[ ]+00000f17[ ]+auipc[ ]+t5,0x0 > -[ ]+fffffffa:[ ]+2f49[ ]+addw[ ]+t5,t5,18 # 8 <addr_rv64_c_addiw_0b> > +[ ]+fffffffa:[ ]+2f49[ ]+addiw[ ]+t5,t5,18 # 8 <addr_rv64_c_addiw_0b> > --- a/gas/testsuite/gas/riscv/dis-addr-addiw-b.d > +++ b/gas/testsuite/gas/riscv/dis-addr-addiw-b.d > @@ -9,10 +9,10 @@ Disassembly of section .text: > > 0+7fffffe0 <_start>: > [ ]+7fffffe0:[ ]+00000297[ ]+auipc[ ]+t0,0x0 > -[ ]+7fffffe4:[ ]+0182831b[ ]+addw[ ]+t1,t0,24 # 7ffffff8 <addr_rv64_addiw_1a> > +[ ]+7fffffe4:[ ]+0182831b[ ]+addiw[ ]+t1,t0,24 # 7ffffff8 <addr_rv64_addiw_1a> > [ ]+7fffffe8:[ ]+00000397[ ]+auipc[ ]+t2,0x0 > -[ ]+7fffffec:[ ]+01c38e1b[ ]+addw[ ]+t3,t2,28 # ffffffff80000004 <addr_rv64_addiw_1b> > +[ ]+7fffffec:[ ]+01c38e1b[ ]+addiw[ ]+t3,t2,28 # ffffffff80000004 <addr_rv64_addiw_1b> > [ ]+7ffffff0:[ ]+00000e97[ ]+auipc[ ]+t4,0x0 > -[ ]+7ffffff4:[ ]+2eb1[ ]+addw[ ]+t4,t4,12 # 7ffffffc <addr_rv64_c_addiw_1a> > +[ ]+7ffffff4:[ ]+2eb1[ ]+addiw[ ]+t4,t4,12 # 7ffffffc <addr_rv64_c_addiw_1a> > [ ]+7ffffff6:[ ]+00000f17[ ]+auipc[ ]+t5,0x0 > -[ ]+7ffffffa:[ ]+2f49[ ]+addw[ ]+t5,t5,18 # ffffffff80000008 <addr_rv64_c_addiw_1b> > +[ ]+7ffffffa:[ ]+2f49[ ]+addiw[ ]+t5,t5,18 # ffffffff80000008 <addr_rv64_c_addiw_1b> > --- a/gas/testsuite/gas/riscv/dis-addr-overflow-32.d > +++ b/gas/testsuite/gas/riscv/dis-addr-overflow-32.d > @@ -19,9 +19,9 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+ffffbeb7[ ]+lui[ ]+t4,0xffffb > [ ]+[0-9a-f]+:[ ]+000e8a67[ ]+jalr[ ]+s4,t4 # ffffb000 <addr_jalr_3> > [ ]+[0-9a-f]+:[ ]+ffffaf37[ ]+lui[ ]+t5,0xffffa > -[ ]+[0-9a-f]+:[ ]+ff0f0a93[ ]+add[ ]+s5,t5,-16 # ffff9ff0 <addr_loadaddr> > +[ ]+[0-9a-f]+:[ ]+ff0f0a93[ ]+addi[ ]+s5,t5,-16 # ffff9ff0 <addr_loadaddr> > [ ]+[0-9a-f]+:[ ]+ffff9fb7[ ]+lui[ ]+t6,0xffff9 > -[ ]+[0-9a-f]+:[ ]+1fb1[ ]+add[ ]+t6,t6,-20 # ffff8fec <addr_loadaddr_c> > +[ ]+[0-9a-f]+:[ ]+1fb1[ ]+addi[ ]+t6,t6,-20 # ffff8fec <addr_loadaddr_c> > [ ]+[0-9a-f]+:[ ]+4001a283[ ]+lw[ ]+t0,1024\(gp\) # 600 <addr_rel_gp_pos> > [ ]+[0-9a-f]+:[ ]+c001a303[ ]+lw[ ]+t1,-1024\(gp\) # fffffe00 <addr_rel_gp_neg> > [ ]+[0-9a-f]+:[ ]+10002383[ ]+lw[ ]+t2,256\(zero\) # 100 <addr_rel_zero_pos> > --- a/gas/testsuite/gas/riscv/dis-addr-overflow-64.d > +++ b/gas/testsuite/gas/riscv/dis-addr-overflow-64.d > @@ -19,13 +19,13 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+ffffbeb7[ ]+lui[ ]+t4,0xffffb > [ ]+[0-9a-f]+:[ ]+000e8a67[ ]+jalr[ ]+s4,t4 # ffffffffffffb000 <addr_jalr_3> > [ ]+[0-9a-f]+:[ ]+ffffaf37[ ]+lui[ ]+t5,0xffffa > -[ ]+[0-9a-f]+:[ ]+ff0f0a93[ ]+add[ ]+s5,t5,-16 # ffffffffffff9ff0 <addr_loadaddr> > +[ ]+[0-9a-f]+:[ ]+ff0f0a93[ ]+addi[ ]+s5,t5,-16 # ffffffffffff9ff0 <addr_loadaddr> > [ ]+[0-9a-f]+:[ ]+ffff9fb7[ ]+lui[ ]+t6,0xffff9 > -[ ]+[0-9a-f]+:[ ]+1fb1[ ]+add[ ]+t6,t6,-20 # ffffffffffff8fec <addr_loadaddr_c> > +[ ]+[0-9a-f]+:[ ]+1fb1[ ]+addi[ ]+t6,t6,-20 # ffffffffffff8fec <addr_loadaddr_c> > [ ]+[0-9a-f]+:[ ]+ffff8b37[ ]+lui[ ]+s6,0xffff8 > -[ ]+[0-9a-f]+:[ ]+fe8b0b9b[ ]+addw[ ]+s7,s6,-24 # ffffffffffff7fe8 <addr_loadaddr_w> > +[ ]+[0-9a-f]+:[ ]+fe8b0b9b[ ]+addiw[ ]+s7,s6,-24 # ffffffffffff7fe8 <addr_loadaddr_w> > [ ]+[0-9a-f]+:[ ]+ffff7c37[ ]+lui[ ]+s8,0xffff7 > -[ ]+[0-9a-f]+:[ ]+3c11[ ]+addw[ ]+s8,s8,-28 # ffffffffffff6fe4 <addr_loadaddr_w_c> > +[ ]+[0-9a-f]+:[ ]+3c11[ ]+addiw[ ]+s8,s8,-28 # ffffffffffff6fe4 <addr_loadaddr_w_c> > [ ]+[0-9a-f]+:[ ]+4001a283[ ]+lw[ ]+t0,1024\(gp\) # 600 <addr_rel_gp_pos> > [ ]+[0-9a-f]+:[ ]+c001a303[ ]+lw[ ]+t1,-1024\(gp\) # fffffffffffffe00 <addr_rel_gp_neg> > [ ]+[0-9a-f]+:[ ]+10002383[ ]+lw[ ]+t2,256\(zero\) # 100 <addr_rel_zero_pos> > --- a/gas/testsuite/gas/riscv/ext-32.d > +++ b/gas/testsuite/gas/riscv/ext-32.d > @@ -9,31 +9,31 @@ Disassembly of section .text: > > 0+000 <target>: > [ ]+0:[ ]+0ff57513[ ]+zext.b[ ]+a0,a0 > -[ ]+4:[ ]+01051513[ ]+sll[ ]+a0,a0,0x10 > -[ ]+8:[ ]+01055513[ ]+srl[ ]+a0,a0,0x10 > -[ ]+c:[ ]+01851513[ ]+sll[ ]+a0,a0,0x18 > -[ ]+10:[ ]+41855513[ ]+sra[ ]+a0,a0,0x18 > -[ ]+14:[ ]+01051513[ ]+sll[ ]+a0,a0,0x10 > -[ ]+18:[ ]+41055513[ ]+sra[ ]+a0,a0,0x10 > +[ ]+4:[ ]+01051513[ ]+slli[ ]+a0,a0,0x10 > +[ ]+8:[ ]+01055513[ ]+srli[ ]+a0,a0,0x10 > +[ ]+c:[ ]+01851513[ ]+slli[ ]+a0,a0,0x18 > +[ ]+10:[ ]+41855513[ ]+srai[ ]+a0,a0,0x18 > +[ ]+14:[ ]+01051513[ ]+slli[ ]+a0,a0,0x10 > +[ ]+18:[ ]+41055513[ ]+srai[ ]+a0,a0,0x10 > [ ]+1c:[ ]+0ff67593[ ]+zext.b[ ]+a1,a2 > -[ ]+20:[ ]+01061593[ ]+sll[ ]+a1,a2,0x10 > -[ ]+24:[ ]+0105d593[ ]+srl[ ]+a1,a1,0x10 > -[ ]+28:[ ]+01861593[ ]+sll[ ]+a1,a2,0x18 > -[ ]+2c:[ ]+4185d593[ ]+sra[ ]+a1,a1,0x18 > -[ ]+30:[ ]+01061593[ ]+sll[ ]+a1,a2,0x10 > -[ ]+34:[ ]+4105d593[ ]+sra[ ]+a1,a1,0x10 > +[ ]+20:[ ]+01061593[ ]+slli[ ]+a1,a2,0x10 > +[ ]+24:[ ]+0105d593[ ]+srli[ ]+a1,a1,0x10 > +[ ]+28:[ ]+01861593[ ]+slli[ ]+a1,a2,0x18 > +[ ]+2c:[ ]+4185d593[ ]+srai[ ]+a1,a1,0x18 > +[ ]+30:[ ]+01061593[ ]+slli[ ]+a1,a2,0x10 > +[ ]+34:[ ]+4105d593[ ]+srai[ ]+a1,a1,0x10 > [ ]+38:[ ]+0ff57513[ ]+zext.b[ ]+a0,a0 > -[ ]+3c:[ ]+0542[ ]+sll[ ]+a0,a0,0x10 > -[ ]+3e:[ ]+8141[ ]+srl[ ]+a0,a0,0x10 > -[ ]+40:[ ]+0562[ ]+sll[ ]+a0,a0,0x18 > -[ ]+42:[ ]+8561[ ]+sra[ ]+a0,a0,0x18 > -[ ]+44:[ ]+0542[ ]+sll[ ]+a0,a0,0x10 > -[ ]+46:[ ]+8541[ ]+sra[ ]+a0,a0,0x10 > +[ ]+3c:[ ]+0542[ ]+slli[ ]+a0,a0,0x10 > +[ ]+3e:[ ]+8141[ ]+srli[ ]+a0,a0,0x10 > +[ ]+40:[ ]+0562[ ]+slli[ ]+a0,a0,0x18 > +[ ]+42:[ ]+8561[ ]+srai[ ]+a0,a0,0x18 > +[ ]+44:[ ]+0542[ ]+slli[ ]+a0,a0,0x10 > +[ ]+46:[ ]+8541[ ]+srai[ ]+a0,a0,0x10 > [ ]+48:[ ]+0ff67593[ ]+zext.b[ ]+a1,a2 > -[ ]+4c:[ ]+01061593[ ]+sll[ ]+a1,a2,0x10 > -[ ]+50:[ ]+81c1[ ]+srl[ ]+a1,a1,0x10 > -[ ]+52:[ ]+01861593[ ]+sll[ ]+a1,a2,0x18 > -[ ]+56:[ ]+85e1[ ]+sra[ ]+a1,a1,0x18 > -[ ]+58:[ ]+01061593[ ]+sll[ ]+a1,a2,0x10 > -[ ]+5c:[ ]+85c1[ ]+sra[ ]+a1,a1,0x10 > +[ ]+4c:[ ]+01061593[ ]+slli[ ]+a1,a2,0x10 > +[ ]+50:[ ]+81c1[ ]+srli[ ]+a1,a1,0x10 > +[ ]+52:[ ]+01861593[ ]+slli[ ]+a1,a2,0x18 > +[ ]+56:[ ]+85e1[ ]+srai[ ]+a1,a1,0x18 > +[ ]+58:[ ]+01061593[ ]+slli[ ]+a1,a2,0x10 > +[ ]+5c:[ ]+85c1[ ]+srai[ ]+a1,a1,0x10 > #... > --- a/gas/testsuite/gas/riscv/ext-64.d > +++ b/gas/testsuite/gas/riscv/ext-64.d > @@ -9,43 +9,43 @@ Disassembly of section .text: > > 0+000 <target>: > [ ]+0:[ ]+0ff57513[ ]+zext.b[ ]+a0,a0 > -[ ]+4:[ ]+03051513[ ]+sll[ ]+a0,a0,0x30 > -[ ]+8:[ ]+03055513[ ]+srl[ ]+a0,a0,0x30 > -[ ]+c:[ ]+03851513[ ]+sll[ ]+a0,a0,0x38 > -[ ]+10:[ ]+43855513[ ]+sra[ ]+a0,a0,0x38 > -[ ]+14:[ ]+03051513[ ]+sll[ ]+a0,a0,0x30 > -[ ]+18:[ ]+43055513[ ]+sra[ ]+a0,a0,0x30 > +[ ]+4:[ ]+03051513[ ]+slli[ ]+a0,a0,0x30 > +[ ]+8:[ ]+03055513[ ]+srli[ ]+a0,a0,0x30 > +[ ]+c:[ ]+03851513[ ]+slli[ ]+a0,a0,0x38 > +[ ]+10:[ ]+43855513[ ]+srai[ ]+a0,a0,0x38 > +[ ]+14:[ ]+03051513[ ]+slli[ ]+a0,a0,0x30 > +[ ]+18:[ ]+43055513[ ]+srai[ ]+a0,a0,0x30 > [ ]+1c:[ ]+0ff67593[ ]+zext.b[ ]+a1,a2 > -[ ]+20:[ ]+03061593[ ]+sll[ ]+a1,a2,0x30 > -[ ]+24:[ ]+0305d593[ ]+srl[ ]+a1,a1,0x30 > -[ ]+28:[ ]+03861593[ ]+sll[ ]+a1,a2,0x38 > -[ ]+2c:[ ]+4385d593[ ]+sra[ ]+a1,a1,0x38 > -[ ]+30:[ ]+03061593[ ]+sll[ ]+a1,a2,0x30 > -[ ]+34:[ ]+4305d593[ ]+sra[ ]+a1,a1,0x30 > -[ ]+38:[ ]+02051513[ ]+sll[ ]+a0,a0,0x20 > -[ ]+3c:[ ]+02055513[ ]+srl[ ]+a0,a0,0x20 > +[ ]+20:[ ]+03061593[ ]+slli[ ]+a1,a2,0x30 > +[ ]+24:[ ]+0305d593[ ]+srli[ ]+a1,a1,0x30 > +[ ]+28:[ ]+03861593[ ]+slli[ ]+a1,a2,0x38 > +[ ]+2c:[ ]+4385d593[ ]+srai[ ]+a1,a1,0x38 > +[ ]+30:[ ]+03061593[ ]+slli[ ]+a1,a2,0x30 > +[ ]+34:[ ]+4305d593[ ]+srai[ ]+a1,a1,0x30 > +[ ]+38:[ ]+02051513[ ]+slli[ ]+a0,a0,0x20 > +[ ]+3c:[ ]+02055513[ ]+srli[ ]+a0,a0,0x20 > [ ]+40:[ ]+0005051b[ ]+sext.w[ ]+a0,a0 > -[ ]+44:[ ]+02061593[ ]+sll[ ]+a1,a2,0x20 > -[ ]+48:[ ]+0205d593[ ]+srl[ ]+a1,a1,0x20 > +[ ]+44:[ ]+02061593[ ]+slli[ ]+a1,a2,0x20 > +[ ]+48:[ ]+0205d593[ ]+srli[ ]+a1,a1,0x20 > [ ]+4c:[ ]+0006059b[ ]+sext.w[ ]+a1,a2 > [ ]+50:[ ]+0ff57513[ ]+zext.b[ ]+a0,a0 > -[ ]+54:[ ]+1542[ ]+sll[ ]+a0,a0,0x30 > -[ ]+56:[ ]+9141[ ]+srl[ ]+a0,a0,0x30 > -[ ]+58:[ ]+1562[ ]+sll[ ]+a0,a0,0x38 > -[ ]+5a:[ ]+9561[ ]+sra[ ]+a0,a0,0x38 > -[ ]+5c:[ ]+1542[ ]+sll[ ]+a0,a0,0x30 > -[ ]+5e:[ ]+9541[ ]+sra[ ]+a0,a0,0x30 > +[ ]+54:[ ]+1542[ ]+slli[ ]+a0,a0,0x30 > +[ ]+56:[ ]+9141[ ]+srli[ ]+a0,a0,0x30 > +[ ]+58:[ ]+1562[ ]+slli[ ]+a0,a0,0x38 > +[ ]+5a:[ ]+9561[ ]+srai[ ]+a0,a0,0x38 > +[ ]+5c:[ ]+1542[ ]+slli[ ]+a0,a0,0x30 > +[ ]+5e:[ ]+9541[ ]+srai[ ]+a0,a0,0x30 > [ ]+60:[ ]+0ff67593[ ]+zext.b[ ]+a1,a2 > -[ ]+64:[ ]+03061593[ ]+sll[ ]+a1,a2,0x30 > -[ ]+68:[ ]+91c1[ ]+srl[ ]+a1,a1,0x30 > -[ ]+6a:[ ]+03861593[ ]+sll[ ]+a1,a2,0x38 > -[ ]+6e:[ ]+95e1[ ]+sra[ ]+a1,a1,0x38 > -[ ]+70:[ ]+03061593[ ]+sll[ ]+a1,a2,0x30 > -[ ]+74:[ ]+95c1[ ]+sra[ ]+a1,a1,0x30 > -[ ]+76:[ ]+1502[ ]+sll[ ]+a0,a0,0x20 > -[ ]+78:[ ]+9101[ ]+srl[ ]+a0,a0,0x20 > +[ ]+64:[ ]+03061593[ ]+slli[ ]+a1,a2,0x30 > +[ ]+68:[ ]+91c1[ ]+srli[ ]+a1,a1,0x30 > +[ ]+6a:[ ]+03861593[ ]+slli[ ]+a1,a2,0x38 > +[ ]+6e:[ ]+95e1[ ]+srai[ ]+a1,a1,0x38 > +[ ]+70:[ ]+03061593[ ]+slli[ ]+a1,a2,0x30 > +[ ]+74:[ ]+95c1[ ]+srai[ ]+a1,a1,0x30 > +[ ]+76:[ ]+1502[ ]+slli[ ]+a0,a0,0x20 > +[ ]+78:[ ]+9101[ ]+srli[ ]+a0,a0,0x20 > [ ]+7a:[ ]+2501[ ]+sext.w[ ]+a0,a0 > -[ ]+7c:[ ]+02061593[ ]+sll[ ]+a1,a2,0x20 > -[ ]+80:[ ]+9181[ ]+srl[ ]+a1,a1,0x20 > +[ ]+7c:[ ]+02061593[ ]+slli[ ]+a1,a2,0x20 > +[ ]+80:[ ]+9181[ ]+srli[ ]+a1,a1,0x20 > [ ]+82:[ ]+0006059b[ ]+sext.w[ ]+a1,a2 > #... > --- a/gas/testsuite/gas/riscv/insn.d > +++ b/gas/testsuite/gas/riscv/insn.d > @@ -8,7 +8,7 @@ Disassembly of section .text: > > 0+000 <target>: > [^:]+:[ ]+00c58533[ ]+add[ ]+a0,a1,a2 > -[^:]+:[ ]+00d58513[ ]+add[ ]+a0,a1,13 > +[^:]+:[ ]+00d58513[ ]+addi[ ]+a0,a1,13 > [^:]+:[ ]+00a58567[ ]+jalr[ ]+a0,10\(a1\) > [^:]+:[ ]+00458503[ ]+lb[ ]+a0,4\(a1\) > [^:]+:[ ]+feb508e3[ ]+beq[ ]+a0,a1,0 \<target\> > @@ -22,8 +22,8 @@ Disassembly of section .text: > [^:]+:[ ]+fddff56f[ ]+jal[ ]+a0,0 \<target\> > [^:]+: R_RISCV_JAL[ ]+target > [^:]+:[ ]+852e[ ]+mv[ ]+a0,a1 > -[^:]+:[ ]+0511[ ]+add[ ]+a0,a0,4 # .* > -[^:]+:[ ]+002c[ ]+add[ ]+a1,sp,8 > +[^:]+:[ ]+0511[ ]+addi[ ]+a0,a0,4 # .* > +[^:]+:[ ]+002c[ ]+addi[ ]+a1,sp,8 > [^:]+:[ ]+c0aa[ ]+sw[ ]+a0,64\(sp\) > [^:]+:[ ]+41a8[ ]+lw[ ]+a0,64\(a1\) > [^:]+:[ ]+c1a8[ ]+sw[ ]+a0,64\(a1\) > @@ -32,7 +32,7 @@ Disassembly of section .text: > [^:]+:[ ]+b7e9[ ]+j[ ]+0 \<target\> > [^:]+: R_RISCV_RVC_JUMP[ ]+target > [^:]+:[ ]+00c58533[ ]+add[ ]+a0,a1,a2 > -[^:]+:[ ]+00d58513[ ]+add[ ]+a0,a1,13 > +[^:]+:[ ]+00d58513[ ]+addi[ ]+a0,a1,13 > [^:]+:[ ]+00a58567[ ]+jalr[ ]+a0,10\(a1\) > [^:]+:[ ]+00458503[ ]+lb[ ]+a0,4\(a1\) > [^:]+:[ ]+fab50ce3[ ]+beq[ ]+a0,a1,0 \<target\> > @@ -46,8 +46,8 @@ Disassembly of section .text: > [^:]+:[ ]+fa5ff56f[ ]+jal[ ]+a0,0 \<target\> > [^:]+: R_RISCV_JAL[ ]+target > [^:]+:[ ]+852e[ ]+mv[ ]+a0,a1 > -[^:]+:[ ]+0511[ ]+add[ ]+a0,a0,4 # .* > -[^:]+:[ ]+002c[ ]+add[ ]+a1,sp,8 > +[^:]+:[ ]+0511[ ]+addi[ ]+a0,a0,4 # .* > +[^:]+:[ ]+002c[ ]+addi[ ]+a1,sp,8 > [^:]+:[ ]+c0aa[ ]+sw[ ]+a0,64\(sp\) > [^:]+:[ ]+41a8[ ]+lw[ ]+a0,64\(a1\) > [^:]+:[ ]+c1a8[ ]+sw[ ]+a0,64\(a1\) > --- a/gas/testsuite/gas/riscv/k-ext-64.d > +++ b/gas/testsuite/gas/riscv/k-ext-64.d > @@ -10,10 +10,10 @@ Disassembly of section .text: > 0+000 <target>: > [ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 > +[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > [ ]+[0-9a-f]+:[ ]+60c5d53b[ ]+rorw[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+60c5953b[ ]+rolw[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2 > +[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 > [ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 > --- a/gas/testsuite/gas/riscv/k-ext.d > +++ b/gas/testsuite/gas/riscv/k-ext.d > @@ -10,7 +10,7 @@ Disassembly of section .text: > 0+000 <target>: > [ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 > +[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > [ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 > --- a/gas/testsuite/gas/riscv/li32.d > +++ b/gas/testsuite/gas/riscv/li32.d > @@ -8,10 +8,10 @@ Disassembly of section .text: > > 0+000 <target>: > [^:]+:[ ]+6521[ ]+lui[ ]+a0,0x8 > -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 # .* > +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 # .* > [^:]+:[ ]+6509[ ]+lui[ ]+a0,0x2 > -[^:]+:[ ]+f0150513[ ]+add[ ]+a0,a0,-255 # .* > +[^:]+:[ ]+f0150513[ ]+addi[ ]+a0,a0,-255 # .* > [^:]+:[ ]+12345537[ ]+lui[ ]+a0,0x12345 > -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 # .* > +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 # .* > [^:]+:[ ]+f2345537[ ]+lui[ ]+a0,0xf2345 > -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 # .* > +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 # .* > --- a/gas/testsuite/gas/riscv/li64.d > +++ b/gas/testsuite/gas/riscv/li64.d > @@ -8,37 +8,37 @@ Disassembly of section .text: > > 0000000000000000 <target>: > [^:]+:[ ]+6521[ ]+lui[ ]+a0,0x8 > -[^:]+:[ ]+2505[ ]+addw[ ]+a0,a0,1 # .* > +[^:]+:[ ]+2505[ ]+addiw[ ]+a0,a0,1 # .* > [^:]+:[ ]+6509[ ]+lui[ ]+a0,0x2 > -[^:]+:[ ]+f015051b[ ]+addw[ ]+a0,a0,-255 # .* > +[^:]+:[ ]+f015051b[ ]+addiw[ ]+a0,a0,-255 # .* > [^:]+:[ ]+12345537[ ]+lui[ ]+a0,0x12345 > -[^:]+:[ ]+2505[ ]+addw[ ]+a0,a0,1 # .* > +[^:]+:[ ]+2505[ ]+addiw[ ]+a0,a0,1 # .* > [^:]+:[ ]+000f2537[ ]+lui[ ]+a0,0xf2 > -[^:]+:[ ]+3455051b[ ]+addw[ ]+a0,a0,837 # .* > -[^:]+:[ ]+0532[ ]+sll[ ]+a0,a0,0xc > -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 > +[^:]+:[ ]+3455051b[ ]+addiw[ ]+a0,a0,837 # .* > +[^:]+:[ ]+0532[ ]+slli[ ]+a0,a0,0xc > +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 > [^:]+:[ ]+00f12537[ ]+lui[ ]+a0,0xf12 > -[^:]+:[ ]+3455051b[ ]+addw[ ]+a0,a0,837 # .* > -[^:]+:[ ]+0532[ ]+sll[ ]+a0,a0,0xc > -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 > +[^:]+:[ ]+3455051b[ ]+addiw[ ]+a0,a0,837 # .* > +[^:]+:[ ]+0532[ ]+slli[ ]+a0,a0,0xc > +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 > [^:]+:[ ]+ff010537[ ]+lui[ ]+a0,0xff010 > -[^:]+:[ ]+f015051b[ ]+addw[ ]+a0,a0,-255 # .* > -[^:]+:[ ]+054e[ ]+sll[ ]+a0,a0,0x13 > -[^:]+:[ ]+80150513[ ]+add[ ]+a0,a0,-2047 > -[^:]+:[ ]+0536[ ]+sll[ ]+a0,a0,0xd > -[^:]+:[ ]+f0150513[ ]+add[ ]+a0,a0,-255 > -[^:]+:[ ]+0010051b[ ]+addw[ ]+a0,zero,1 > -[^:]+:[ ]+151a[ ]+sll[ ]+a0,a0,0x26 > -[^:]+:[ ]+1565[ ]+add[ ]+a0,a0,-7 > -[^:]+:[ ]+0536[ ]+sll[ ]+a0,a0,0xd > -[^:]+:[ ]+34550513[ ]+add[ ]+a0,a0,837 > -[^:]+:[ ]+0532[ ]+sll[ ]+a0,a0,0xc > -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 > +[^:]+:[ ]+f015051b[ ]+addiw[ ]+a0,a0,-255 # .* > +[^:]+:[ ]+054e[ ]+slli[ ]+a0,a0,0x13 > +[^:]+:[ ]+80150513[ ]+addi[ ]+a0,a0,-2047 > +[^:]+:[ ]+0536[ ]+slli[ ]+a0,a0,0xd > +[^:]+:[ ]+f0150513[ ]+addi[ ]+a0,a0,-255 > +[^:]+:[ ]+0010051b[ ]+addiw[ ]+a0,zero,1 > +[^:]+:[ ]+151a[ ]+slli[ ]+a0,a0,0x26 > +[^:]+:[ ]+1565[ ]+addi[ ]+a0,a0,-7 > +[^:]+:[ ]+0536[ ]+slli[ ]+a0,a0,0xd > +[^:]+:[ ]+34550513[ ]+addi[ ]+a0,a0,837 > +[^:]+:[ ]+0532[ ]+slli[ ]+a0,a0,0xc > +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 > [^:]+:[ ]+01fc4537[ ]+lui[ ]+a0,0x1fc4 > -[^:]+:[ ]+c915051b[ ]+addw[ ]+a0,a0,-879 # .* > -[^:]+:[ ]+0536[ ]+sll[ ]+a0,a0,0xd > -[^:]+:[ ]+1565[ ]+add[ ]+a0,a0,-7 > -[^:]+:[ ]+0536[ ]+sll[ ]+a0,a0,0xd > -[^:]+:[ ]+34550513[ ]+add[ ]+a0,a0,837 > -[^:]+:[ ]+0532[ ]+sll[ ]+a0,a0,0xc > -[^:]+:[ ]+0505[ ]+add[ ]+a0,a0,1 > +[^:]+:[ ]+c915051b[ ]+addiw[ ]+a0,a0,-879 # .* > +[^:]+:[ ]+0536[ ]+slli[ ]+a0,a0,0xd > +[^:]+:[ ]+1565[ ]+addi[ ]+a0,a0,-7 > +[^:]+:[ ]+0536[ ]+slli[ ]+a0,a0,0xd > +[^:]+:[ ]+34550513[ ]+addi[ ]+a0,a0,837 > +[^:]+:[ ]+0532[ ]+slli[ ]+a0,a0,0xc > +[^:]+:[ ]+0505[ ]+addi[ ]+a0,a0,1 > --- a/gas/testsuite/gas/riscv/lla32.d > +++ b/gas/testsuite/gas/riscv/lla32.d > @@ -10,10 +10,10 @@ Disassembly of section .text: > 0: 00100513 li a0,1 > 4: 00001537 lui a0,0x1 > 8: 00001537 lui a0,0x1 > - c: 00150513 add a0,a0,1 # 1001 <c> > + c: 00150513 addi a0,a0,1 # 1001 <c> > 10: 00001537 lui a0,0x1 > - 14: fff50513 add a0,a0,-1 # fff <d> > + 14: fff50513 addi a0,a0,-1 # fff <d> > 18: 80000537 lui a0,0x80000 > - 1c: fff50513 add a0,a0,-1 # 7fffffff <e> > + 1c: fff50513 addi a0,a0,-1 # 7fffffff <e> > 20: 00000513 li a0,0 > 24: fff00513 li a0,-1 > --- a/gas/testsuite/gas/riscv/lla64.d > +++ b/gas/testsuite/gas/riscv/lla64.d > @@ -7,14 +7,14 @@ > Disassembly of section .text: > > 0+000 <.text>: > - 0: 0010051b addw a0,zero,1 > + 0: 0010051b addiw a0,zero,1 > 4: 00001537 lui a0,0x1 > 8: 00001537 lui a0,0x1 > - c: 0015051b addw a0,a0,1 # .* > + c: 0015051b addiw a0,a0,1 # .* > 10: 00001537 lui a0,0x1 > - 14: fff5051b addw a0,a0,-1 # .* > + 14: fff5051b addiw a0,a0,-1 # .* > 18: 80000537 lui a0,0x80000 > - 1c: fff5051b addw a0,a0,-1 # .* > + 1c: fff5051b addiw a0,a0,-1 # .* > 20: 0000051b sext.w a0,zero > - 24: fff0051b addw a0,zero,-1 > + 24: fff0051b addiw a0,zero,-1 > 28: 80000537 lui a0,0x80000 > --- a/gas/testsuite/gas/riscv/zbkb-32.d > +++ b/gas/testsuite/gas/riscv/zbkb-32.d > @@ -10,7 +10,7 @@ Disassembly of section .text: > 0+000 <target>: > [ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 > +[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > [ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 > --- a/gas/testsuite/gas/riscv/zbkb-64.d > +++ b/gas/testsuite/gas/riscv/zbkb-64.d > @@ -10,10 +10,10 @@ Disassembly of section .text: > 0+000 <target>: > [ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2 > +[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2 > [ ]+[0-9a-f]+:[ ]+60c5d53b[ ]+rorw[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+60c5953b[ ]+rolw[ ]+a0,a1,a2 > -[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2 > +[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2 > [ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2 > [ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2 > --- a/ld/testsuite/ld-riscv-elf/ifunc-plt-01.d > +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-01.d > @@ -11,7 +11,7 @@ Disassembly of section .text: > .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* > .*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(_GLOBAL_OFFSET_TABLE_.*|__DATA_BEGIN__.*|.*)> > .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* > -.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> > +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> > .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* > .*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> > .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* > --- a/ld/testsuite/ld-riscv-elf/ifunc-plt-02.d > +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-02.d > @@ -13,7 +13,7 @@ Disassembly of section .text: > .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* > .*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(__DATA_BEGIN__.*|.*)> > .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* > -.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> > +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> > .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* > .*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> > .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* > --- a/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d > +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d > @@ -9,7 +9,7 @@ Disassembly of section .text: > #... > 0+[0-9a-f]+ <bar>: > .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* > -.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> > +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> > .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* > .*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> > #... > --- a/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d > +++ b/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d > @@ -10,6 +10,6 @@ Disassembly of section .text: > > [0-9a-f]+ <_start>: > .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+a1.* > -.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+a0,gp.*<data_a> > -.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+a1,a1.*<data_b> > +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,gp.*<data_a> > +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a1,a1.*<data_b> > #pass > --- a/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d > +++ b/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d > @@ -8,7 +8,7 @@ > Disassembly of section .text: > > 0+[0-9a-f]+ <_start>: > -.*:[ ]+[0-9a-f]+[ ]+add[ ]+.*<gdata> > +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<gdata> > .*:[ ]+[0-9a-f]+[ ]+jal[ ]+.* > .*:[ ]+[0-9a-f]+[ ]+j[ ]+.* > .*:[ ]+[0-9a-f]+[ ]+nop > --- a/ld/testsuite/ld-riscv-elf/weakref32.d > +++ b/ld/testsuite/ld-riscv-elf/weakref32.d > @@ -9,12 +9,12 @@ Disassembly of section \.text: > 90000004: 02078663 beqz a5,90000030 <_start\+0x30> > 90000008: 00000793 li a5,0 > 9000000c: 02078263 beqz a5,90000030 <_start\+0x30> > -90000010: ff010113 addi? sp,sp,-16 > +90000010: ff010113 addi sp,sp,-16 > 90000014: 00112623 sw ra,12\(sp\) > 90000018: 00000097 auipc ra,0x0 > 9000001c: 000000e7 jalr zero # 0 <_start\-0x90000000> > 90000020: 00c12083 lw ra,12\(sp\) > -90000024: 01010113 addi? sp,sp,16 > +90000024: 01010113 addi sp,sp,16 > 90000028: 00000317 auipc t1,0x0 > 9000002c: 00000067 jr zero # 0 <_start\-0x90000000> > 90000030: 00008067 ret > --- a/ld/testsuite/ld-riscv-elf/weakref64.d > +++ b/ld/testsuite/ld-riscv-elf/weakref64.d > @@ -9,12 +9,12 @@ Disassembly of section \.text: > 90000004: 02078663 beqz a5,90000030 <_start\+0x30> > 90000008: 00000793 li a5,0 > 9000000c: 02078263 beqz a5,90000030 <_start\+0x30> > - 90000010: ff010113 addi? sp,sp,-16 > + 90000010: ff010113 addi sp,sp,-16 > 90000014: 00113423 sd ra,8\(sp\) > 90000018: 00000097 auipc ra,0x0 > 9000001c: 000000e7 jalr zero # 0 <_start\-0x90000000> > 90000020: 00813083 ld ra,8\(sp\) > - 90000024: 01010113 addi? sp,sp,16 > + 90000024: 01010113 addi sp,sp,16 > 90000028: 00000317 auipc t1,0x0 > 9000002c: 00000067 jr zero # 0 <_start\-0x90000000> > 90000030: 00008067 ret > --- a/opcodes/riscv-opc.c > +++ b/opcodes/riscv-opc.c > @@ -382,14 +382,14 @@ const struct riscv_opcode riscv_opcodes[ > {"move", 0, INSN_CLASS_I, "d,s", MATCH_ADDI, MASK_ADDI|MASK_IMM, match_opcode, INSN_ALIAS }, > {"zext.b", 0, INSN_CLASS_ZCB, "Cs,Cw", MATCH_C_ZEXT_B, MASK_C_ZEXT_B, match_opcode, INSN_ALIAS }, > {"zext.b", 0, INSN_CLASS_I, "d,s", MATCH_ANDI|ENCODE_ITYPE_IMM (255), MASK_ANDI | MASK_IMM, match_opcode, INSN_ALIAS }, > +{"andi", 0, INSN_CLASS_ZCB, "Cs,Cw,Wcf",MATCH_C_ZEXT_B, MASK_C_ZEXT_B, match_opcode, INSN_ALIAS }, > +{"andi", 0, INSN_CLASS_C, "Cs,Cw,Co", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, INSN_ALIAS }, > +{"andi", 0, INSN_CLASS_I, "d,s,j", MATCH_ANDI, MASK_ANDI, match_opcode, 0 }, > {"and", 0, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_AND, MASK_C_AND, match_opcode, INSN_ALIAS }, > {"and", 0, INSN_CLASS_C, "Cs,Ct,Cw", MATCH_C_AND, MASK_C_AND, match_opcode, INSN_ALIAS }, > {"and", 0, INSN_CLASS_C, "Cs,Cw,Co", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, INSN_ALIAS }, > {"and", 0, INSN_CLASS_I, "d,s,t", MATCH_AND, MASK_AND, match_opcode, 0 }, > {"and", 0, INSN_CLASS_I, "d,s,j", MATCH_ANDI, MASK_ANDI, match_opcode, INSN_ALIAS }, > -{"andi", 0, INSN_CLASS_ZCB, "Cs,Cw,Wcf",MATCH_C_ZEXT_B, MASK_C_ZEXT_B, match_opcode, INSN_ALIAS }, > -{"andi", 0, INSN_CLASS_C, "Cs,Cw,Co", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, INSN_ALIAS }, > -{"andi", 0, INSN_CLASS_I, "d,s,j", MATCH_ANDI, MASK_ANDI, match_opcode, 0 }, > {"beqz", 0, INSN_CLASS_C, "Cs,Cp", MATCH_C_BEQZ, MASK_C_BEQZ, match_opcode, INSN_ALIAS|INSN_CONDBRANCH }, > {"beqz", 0, INSN_CLASS_I, "s,p", MATCH_BEQ, MASK_BEQ|MASK_RS2, match_opcode, INSN_ALIAS|INSN_CONDBRANCH }, > {"beq", 0, INSN_CLASS_C, "Cs,Cz,Cp", MATCH_C_BEQZ, MASK_C_BEQZ, match_opcode, INSN_ALIAS|INSN_CONDBRANCH }, > @@ -410,6 +410,13 @@ const struct riscv_opcode riscv_opcodes[ > {"bnez", 0, INSN_CLASS_I, "s,p", MATCH_BNE, MASK_BNE|MASK_RS2, match_opcode, INSN_ALIAS|INSN_CONDBRANCH }, > {"bne", 0, INSN_CLASS_C, "Cs,Cz,Cp", MATCH_C_BNEZ, MASK_C_BNEZ, match_opcode, INSN_ALIAS|INSN_CONDBRANCH }, > {"bne", 0, INSN_CLASS_I, "s,t,p", MATCH_BNE, MASK_BNE, match_opcode, INSN_CONDBRANCH }, > +{"addi", 0, INSN_CLASS_C, "Ct,Cc,CK", MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN, match_c_addi4spn, INSN_ALIAS }, > +{"addi", 0, INSN_CLASS_C, "d,CU,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, INSN_ALIAS }, > +{"addi", 0, INSN_CLASS_C, "d,CU,z", MATCH_C_NOP, MASK_C_ADDI|MASK_RVC_IMM, match_c_nop, INSN_ALIAS }, > +{"addi", 0, INSN_CLASS_C, "Cc,Cc,CL", MATCH_C_ADDI16SP, MASK_C_ADDI16SP, match_c_addi16sp, INSN_ALIAS }, > +{"addi", 0, INSN_CLASS_C, "d,Cz,Co", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, INSN_ALIAS }, > +{"addi", 0, INSN_CLASS_C, "d,CV,z", MATCH_C_MV, MASK_C_MV, match_c_add, INSN_ALIAS }, > +{"addi", 0, INSN_CLASS_I, "d,s,j", MATCH_ADDI, MASK_ADDI, match_opcode, 0 }, > {"add", 0, INSN_CLASS_C, "d,CU,CV", MATCH_C_ADD, MASK_C_ADD, match_c_add, INSN_ALIAS }, > {"add", 0, INSN_CLASS_C, "d,CV,CU", MATCH_C_ADD, MASK_C_ADD, match_c_add, INSN_ALIAS }, > {"add", 0, INSN_CLASS_C, "d,CU,Co", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, INSN_ALIAS }, > @@ -419,34 +426,27 @@ const struct riscv_opcode riscv_opcodes[ > {"add", 0, INSN_CLASS_I, "d,s,t", MATCH_ADD, MASK_ADD, match_opcode, 0 }, > {"add", 0, INSN_CLASS_I, "d,s,t,1", MATCH_ADD, MASK_ADD, match_opcode, 0 }, > {"add", 0, INSN_CLASS_I, "d,s,j", MATCH_ADDI, MASK_ADDI, match_opcode, INSN_ALIAS }, > -{"addi", 0, INSN_CLASS_C, "Ct,Cc,CK", MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN, match_c_addi4spn, INSN_ALIAS }, > -{"addi", 0, INSN_CLASS_C, "d,CU,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, INSN_ALIAS }, > -{"addi", 0, INSN_CLASS_C, "d,CU,z", MATCH_C_NOP, MASK_C_ADDI|MASK_RVC_IMM, match_c_nop, INSN_ALIAS }, > -{"addi", 0, INSN_CLASS_C, "Cc,Cc,CL", MATCH_C_ADDI16SP, MASK_C_ADDI16SP, match_c_addi16sp, INSN_ALIAS }, > -{"addi", 0, INSN_CLASS_C, "d,Cz,Co", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, INSN_ALIAS }, > -{"addi", 0, INSN_CLASS_C, "d,CV,z", MATCH_C_MV, MASK_C_MV, match_c_add, INSN_ALIAS }, > -{"addi", 0, INSN_CLASS_I, "d,s,j", MATCH_ADDI, MASK_ADDI, match_opcode, 0 }, > {"la", 0, INSN_CLASS_I, "d,B", 0, (int) M_LA, match_never, INSN_MACRO }, > {"lla", 0, INSN_CLASS_I, "d,B", 0, (int) M_LLA, match_never, INSN_MACRO }, > {"lga", 0, INSN_CLASS_I, "d,B", 0, (int) M_LGA, match_never, INSN_MACRO }, > {"la.tls.gd", 0, INSN_CLASS_I, "d,A", 0, (int) M_LA_TLS_GD, match_never, INSN_MACRO }, > {"la.tls.ie", 0, INSN_CLASS_I, "d,A", 0, (int) M_LA_TLS_IE, match_never, INSN_MACRO }, > {"neg", 0, INSN_CLASS_I, "d,t", MATCH_SUB, MASK_SUB|MASK_RS1, match_opcode, INSN_ALIAS }, /* sub 0 */ > +{"slli", 0, INSN_CLASS_C, "d,CU,C>", MATCH_C_SLLI, MASK_C_SLLI, match_slli_as_c_slli, INSN_ALIAS }, > +{"slli", 0, INSN_CLASS_I, "d,s,>", MATCH_SLLI, MASK_SLLI, match_opcode, 0 }, > {"sll", 0, INSN_CLASS_C, "d,CU,C>", MATCH_C_SLLI, MASK_C_SLLI, match_slli_as_c_slli, INSN_ALIAS }, > {"sll", 0, INSN_CLASS_I, "d,s,t", MATCH_SLL, MASK_SLL, match_opcode, 0 }, > {"sll", 0, INSN_CLASS_I, "d,s,>", MATCH_SLLI, MASK_SLLI, match_opcode, INSN_ALIAS }, > -{"slli", 0, INSN_CLASS_C, "d,CU,C>", MATCH_C_SLLI, MASK_C_SLLI, match_slli_as_c_slli, INSN_ALIAS }, > -{"slli", 0, INSN_CLASS_I, "d,s,>", MATCH_SLLI, MASK_SLLI, match_opcode, 0 }, > +{"srli", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_srxi_as_c_srxi, INSN_ALIAS }, > +{"srli", 0, INSN_CLASS_I, "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, 0 }, > {"srl", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_srxi_as_c_srxi, INSN_ALIAS }, > {"srl", 0, INSN_CLASS_I, "d,s,t", MATCH_SRL, MASK_SRL, match_opcode, 0 }, > {"srl", 0, INSN_CLASS_I, "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, INSN_ALIAS }, > -{"srli", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_srxi_as_c_srxi, INSN_ALIAS }, > -{"srli", 0, INSN_CLASS_I, "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, 0 }, > +{"srai", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_srxi_as_c_srxi, INSN_ALIAS }, > +{"srai", 0, INSN_CLASS_I, "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, 0 }, > {"sra", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_srxi_as_c_srxi, INSN_ALIAS }, > {"sra", 0, INSN_CLASS_I, "d,s,t", MATCH_SRA, MASK_SRA, match_opcode, 0 }, > {"sra", 0, INSN_CLASS_I, "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, INSN_ALIAS }, > -{"srai", 0, INSN_CLASS_C, "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_srxi_as_c_srxi, INSN_ALIAS }, > -{"srai", 0, INSN_CLASS_I, "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, 0 }, > {"sub", 0, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_SUB, MASK_C_SUB, match_opcode, INSN_ALIAS }, > {"sub", 0, INSN_CLASS_I, "d,s,t", MATCH_SUB, MASK_SUB, match_opcode, 0 }, > {"lb", 0, INSN_CLASS_I, "d,o(s)", MATCH_LB, MASK_LB, match_opcode, INSN_DREF|INSN_1_BYTE }, > @@ -466,11 +466,11 @@ const struct riscv_opcode riscv_opcodes[ > {"lw", 0, INSN_CLASS_I, "d,A", 0, (int) M_LW, match_never, INSN_MACRO }, > {"not", 0, INSN_CLASS_ZCB, "Cs,Cw", MATCH_C_NOT, MASK_C_NOT, match_opcode, INSN_ALIAS }, > {"not", 0, INSN_CLASS_I, "d,s", MATCH_XORI|MASK_IMM, MASK_XORI|MASK_IMM, match_opcode, INSN_ALIAS }, > +{"ori", 0, INSN_CLASS_I, "d,s,j", MATCH_ORI, MASK_ORI, match_opcode, 0 }, > {"or", 0, INSN_CLASS_I, "d,s,j", MATCH_ORI, MASK_ORI, match_opcode, INSN_ALIAS }, > {"or", 0, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_OR, MASK_C_OR, match_opcode, INSN_ALIAS }, > {"or", 0, INSN_CLASS_C, "Cs,Ct,Cw", MATCH_C_OR, MASK_C_OR, match_opcode, INSN_ALIAS }, > {"or", 0, INSN_CLASS_I, "d,s,t", MATCH_OR, MASK_OR, match_opcode, 0 }, > -{"ori", 0, INSN_CLASS_I, "d,s,j", MATCH_ORI, MASK_ORI, match_opcode, 0 }, > {"auipc", 0, INSN_CLASS_I, "d,u", MATCH_AUIPC, MASK_AUIPC, match_opcode, 0 }, > {"seqz", 0, INSN_CLASS_I, "d,s", MATCH_SLTIU|ENCODE_ITYPE_IMM (1), MASK_SLTIU | MASK_IMM, match_opcode, INSN_ALIAS }, > {"snez", 0, INSN_CLASS_I, "d,t", MATCH_SLTU, MASK_SLTU|MASK_RS1, match_opcode, INSN_ALIAS }, > @@ -506,11 +506,11 @@ const struct riscv_opcode riscv_opcodes[ > {"rdtimeh", 32, INSN_CLASS_I, "d", MATCH_RDTIMEH, MASK_RDTIMEH, match_opcode, INSN_ALIAS }, > {"ecall", 0, INSN_CLASS_I, "", MATCH_SCALL, MASK_SCALL, match_opcode, 0 }, > {"scall", 0, INSN_CLASS_I, "", MATCH_SCALL, MASK_SCALL, match_opcode, 0 }, > +{"xori", 0, INSN_CLASS_I, "d,s,j", MATCH_XORI, MASK_XORI, match_opcode, 0 }, > {"xor", 0, INSN_CLASS_I, "d,s,j", MATCH_XORI, MASK_XORI, match_opcode, INSN_ALIAS }, > {"xor", 0, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_XOR, MASK_C_XOR, match_opcode, INSN_ALIAS }, > {"xor", 0, INSN_CLASS_C, "Cs,Ct,Cw", MATCH_C_XOR, MASK_C_XOR, match_opcode, INSN_ALIAS }, > {"xor", 0, INSN_CLASS_I, "d,s,t", MATCH_XOR, MASK_XOR, match_opcode, 0 }, > -{"xori", 0, INSN_CLASS_I, "d,s,j", MATCH_XORI, MASK_XORI, match_opcode, 0 }, > {"lwu", 64, INSN_CLASS_I, "d,o(s)", MATCH_LWU, MASK_LWU, match_opcode, INSN_DREF|INSN_4_BYTE }, > {"lwu", 64, INSN_CLASS_I, "d,A", 0, (int) M_LWU, match_never, INSN_MACRO }, > {"ld", 64, INSN_CLASS_C, "d,Cn(Cc)", MATCH_C_LDSP, MASK_C_LDSP, match_rd_nonzero, INSN_ALIAS|INSN_DREF|INSN_8_BYTE }, > @@ -523,23 +523,23 @@ const struct riscv_opcode riscv_opcodes[ > {"sd", 64, INSN_CLASS_I, "t,A,s", 0, (int) M_SD, match_never, INSN_MACRO }, > {"sext.w", 64, INSN_CLASS_C, "d,CU", MATCH_C_ADDIW, MASK_C_ADDIW|MASK_RVC_IMM, match_rd_nonzero, INSN_ALIAS }, > {"sext.w", 64, INSN_CLASS_I, "d,s", MATCH_ADDIW, MASK_ADDIW|MASK_IMM, match_opcode, INSN_ALIAS }, > +{"addiw", 64, INSN_CLASS_C, "d,CU,Co", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, INSN_ALIAS }, > +{"addiw", 64, INSN_CLASS_I, "d,s,j", MATCH_ADDIW, MASK_ADDIW, match_opcode, 0 }, > {"addw", 64, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_ADDW, MASK_C_ADDW, match_opcode, INSN_ALIAS }, > {"addw", 64, INSN_CLASS_C, "Cs,Ct,Cw", MATCH_C_ADDW, MASK_C_ADDW, match_opcode, INSN_ALIAS }, > {"addw", 64, INSN_CLASS_C, "d,CU,Co", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, INSN_ALIAS }, > {"addw", 64, INSN_CLASS_I, "d,s,t", MATCH_ADDW, MASK_ADDW, match_opcode, 0 }, > {"addw", 64, INSN_CLASS_I, "d,s,j", MATCH_ADDIW, MASK_ADDIW, match_opcode, INSN_ALIAS }, > -{"addiw", 64, INSN_CLASS_C, "d,CU,Co", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, INSN_ALIAS }, > -{"addiw", 64, INSN_CLASS_I, "d,s,j", MATCH_ADDIW, MASK_ADDIW, match_opcode, 0 }, > {"negw", 64, INSN_CLASS_I, "d,t", MATCH_SUBW, MASK_SUBW|MASK_RS1, match_opcode, INSN_ALIAS }, /* sub 0 */ > +{"slliw", 64, INSN_CLASS_I, "d,s,<", MATCH_SLLIW, MASK_SLLIW, match_opcode, 0 }, > {"sllw", 64, INSN_CLASS_I, "d,s,t", MATCH_SLLW, MASK_SLLW, match_opcode, 0 }, > {"sllw", 64, INSN_CLASS_I, "d,s,<", MATCH_SLLIW, MASK_SLLIW, match_opcode, INSN_ALIAS }, > -{"slliw", 64, INSN_CLASS_I, "d,s,<", MATCH_SLLIW, MASK_SLLIW, match_opcode, 0 }, > +{"srliw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRLIW, MASK_SRLIW, match_opcode, 0 }, > {"srlw", 64, INSN_CLASS_I, "d,s,t", MATCH_SRLW, MASK_SRLW, match_opcode, 0 }, > {"srlw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRLIW, MASK_SRLIW, match_opcode, INSN_ALIAS }, > -{"srliw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRLIW, MASK_SRLIW, match_opcode, 0 }, > +{"sraiw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRAIW, MASK_SRAIW, match_opcode, 0 }, > {"sraw", 64, INSN_CLASS_I, "d,s,t", MATCH_SRAW, MASK_SRAW, match_opcode, 0 }, > {"sraw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRAIW, MASK_SRAIW, match_opcode, INSN_ALIAS }, > -{"sraiw", 64, INSN_CLASS_I, "d,s,<", MATCH_SRAIW, MASK_SRAIW, match_opcode, 0 }, > {"subw", 64, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_SUBW, MASK_C_SUBW, match_opcode, INSN_ALIAS }, > {"subw", 64, INSN_CLASS_I, "d,s,t", MATCH_SUBW, MASK_SUBW, match_opcode, 0 }, > > @@ -1050,15 +1050,15 @@ const struct riscv_opcode riscv_opcodes[ > {"orn", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_ORN, MASK_ORN, match_opcode, 0 }, > {"xnor", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_XNOR, MASK_XNOR, match_opcode, 0 }, > {"rol", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_ROL, MASK_ROL, match_opcode, 0 }, > +{"rori", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,>", MATCH_RORI, MASK_RORI, match_opcode, 0 }, > {"ror", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_ROR, MASK_ROR, match_opcode, 0 }, > {"ror", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,>", MATCH_RORI, MASK_RORI, match_opcode, INSN_ALIAS }, > -{"rori", 0, INSN_CLASS_ZBB_OR_ZBKB, "d,s,>", MATCH_RORI, MASK_RORI, match_opcode, 0 }, > {"rev8", 32, INSN_CLASS_ZBB_OR_ZBKB, "d,s", MATCH_GREVI | MATCH_SHAMT_REV8_32, MASK_GREVI | MASK_SHAMT, match_opcode, 0 }, > {"rev8", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s", MATCH_GREVI | MATCH_SHAMT_REV8_64, MASK_GREVI | MASK_SHAMT, match_opcode, 0 }, > {"rolw", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_ROLW, MASK_ROLW, match_opcode, 0 }, > +{"roriw", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s,<", MATCH_RORIW, MASK_RORIW, match_opcode, 0 }, > {"rorw", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s,t", MATCH_RORW, MASK_RORW, match_opcode, 0 }, > {"rorw", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s,<", MATCH_RORIW, MASK_RORIW, match_opcode, INSN_ALIAS }, > -{"roriw", 64, INSN_CLASS_ZBB_OR_ZBKB, "d,s,<", MATCH_RORIW, MASK_RORIW, match_opcode, 0 }, > > /* Zba instructions. */ > {"sh1add", 0, INSN_CLASS_ZBA, "d,s,t", MATCH_SH1ADD, MASK_SH1ADD, match_opcode, 0 }, > @@ -1079,18 +1079,18 @@ const struct riscv_opcode riscv_opcodes[ > {"clmulr", 0, INSN_CLASS_ZBC, "d,s,t", MATCH_CLMULR, MASK_CLMULR, match_opcode, 0 }, > > /* Zbs instructions. */ > +{"bclri", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BCLRI, MASK_BCLRI, match_opcode, 0 }, > {"bclr", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BCLR, MASK_BCLR, match_opcode, 0 }, > {"bclr", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BCLRI, MASK_BCLRI, match_opcode, INSN_ALIAS }, > -{"bclri", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BCLRI, MASK_BCLRI, match_opcode, 0 }, > +{"bseti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BSETI, MASK_BSETI, match_opcode, 0 }, > {"bset", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BSET, MASK_BSET, match_opcode, 0 }, > {"bset", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BSETI, MASK_BSETI, match_opcode, INSN_ALIAS }, > -{"bseti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BSETI, MASK_BSETI, match_opcode, 0 }, > +{"binvi", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BINVI, MASK_BINVI, match_opcode, 0 }, > {"binv", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BINV, MASK_BINV, match_opcode, 0 }, > {"binv", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BINVI, MASK_BINVI, match_opcode, INSN_ALIAS }, > -{"binvi", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BINVI, MASK_BINVI, match_opcode, 0 }, > +{"bexti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BEXTI, MASK_BEXTI, match_opcode, 0 }, > {"bext", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BEXT, MASK_BEXT, match_opcode, 0 }, > {"bext", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BEXTI, MASK_BEXTI, match_opcode, INSN_ALIAS }, > -{"bexti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BEXTI, MASK_BEXTI, match_opcode, 0 }, > > /* Zbkx instructions. */ > {"xperm4", 0, INSN_CLASS_ZBKX, "d,s,t", MATCH_XPERM4, MASK_XPERM4, match_opcode, 0 }, > @@ -1969,24 +1969,24 @@ const struct riscv_opcode riscv_opcodes[ > > /* Supervisor instructions. */ > {"csrr", 0, INSN_CLASS_ZICSR, "d,E", MATCH_CSRRS, MASK_CSRRS|MASK_RS1, match_opcode, INSN_ALIAS }, > +{"csrwi", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRWI, MASK_CSRRWI|MASK_RD, match_opcode, INSN_ALIAS }, > {"csrw", 0, INSN_CLASS_ZICSR, "E,s", MATCH_CSRRW, MASK_CSRRW|MASK_RD, match_opcode, INSN_ALIAS }, > {"csrw", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRWI, MASK_CSRRWI|MASK_RD, match_opcode, INSN_ALIAS }, > -{"csrwi", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRWI, MASK_CSRRWI|MASK_RD, match_opcode, INSN_ALIAS }, > +{"csrsi", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRSI, MASK_CSRRSI|MASK_RD, match_opcode, INSN_ALIAS }, > {"csrs", 0, INSN_CLASS_ZICSR, "E,s", MATCH_CSRRS, MASK_CSRRS|MASK_RD, match_opcode, INSN_ALIAS }, > {"csrs", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRSI, MASK_CSRRSI|MASK_RD, match_opcode, INSN_ALIAS }, > -{"csrsi", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRSI, MASK_CSRRSI|MASK_RD, match_opcode, INSN_ALIAS }, > +{"csrci", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRCI, MASK_CSRRCI|MASK_RD, match_opcode, INSN_ALIAS }, > {"csrc", 0, INSN_CLASS_ZICSR, "E,s", MATCH_CSRRC, MASK_CSRRC|MASK_RD, match_opcode, INSN_ALIAS }, > {"csrc", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRCI, MASK_CSRRCI|MASK_RD, match_opcode, INSN_ALIAS }, > -{"csrci", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRCI, MASK_CSRRCI|MASK_RD, match_opcode, INSN_ALIAS }, > +{"csrrwi", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRWI, MASK_CSRRWI, match_opcode, 0 }, > {"csrrw", 0, INSN_CLASS_ZICSR, "d,E,s", MATCH_CSRRW, MASK_CSRRW, match_opcode, 0 }, > {"csrrw", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRWI, MASK_CSRRWI, match_opcode, INSN_ALIAS }, > -{"csrrwi", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRWI, MASK_CSRRWI, match_opcode, 0 }, > +{"csrrsi", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRSI, MASK_CSRRSI, match_opcode, 0 }, > {"csrrs", 0, INSN_CLASS_ZICSR, "d,E,s", MATCH_CSRRS, MASK_CSRRS, match_opcode, 0 }, > {"csrrs", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRSI, MASK_CSRRSI, match_opcode, INSN_ALIAS }, > -{"csrrsi", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRSI, MASK_CSRRSI, match_opcode, 0 }, > +{"csrrci", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRCI, MASK_CSRRCI, match_opcode, 0 }, > {"csrrc", 0, INSN_CLASS_ZICSR, "d,E,s", MATCH_CSRRC, MASK_CSRRC, match_opcode, 0 }, > {"csrrc", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRCI, MASK_CSRRCI, match_opcode, INSN_ALIAS }, > -{"csrrci", 0, INSN_CLASS_ZICSR, "d,E,Z", MATCH_CSRRCI, MASK_CSRRCI, match_opcode, 0 }, > {"uret", 0, INSN_CLASS_I, "", MATCH_URET, MASK_URET, match_opcode, 0 }, > {"sret", 0, INSN_CLASS_I, "", MATCH_SRET, MASK_SRET, match_opcode, 0 }, > {"hret", 0, INSN_CLASS_I, "", MATCH_HRET, MASK_HRET, match_opcode, 0 }, > ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] RISC-V: move various alias entries 2023-08-05 1:40 ` Tsukasa OI @ 2023-08-25 13:01 ` Jan Beulich 2023-08-25 13:23 ` Palmer Dabbelt 0 siblings, 1 reply; 5+ messages in thread From: Jan Beulich @ 2023-08-25 13:01 UTC (permalink / raw) To: Palmer Dabbelt, Andrew Waterman, Jim Wilson, Nelson Chu Cc: Binutils, Tsukasa OI On 05.08.2023 03:40, Tsukasa OI wrote: > On 2023/08/04 21:00, Jan Beulich via Binutils wrote: >> For disassembly to only use spec-mandated aliases, respective non-alias >> entries need to come ahead of their alias ones. Since identical >> mnemonics need to stay together, whole groups are moved up where >> necessary. >> >> This partly reverts 839189bc932e ("RISC-V: re-arrange opcode table for >> consistent alias handling"), but then also goes beyond a plain revert. >> --- >> I did not adjust JAL back, to continue to match JALR. The spec doesn't >> spell out how operands are to be specified, and hence it also doesn't >> mention how many explicit ones there are supposed to be. >> >> What about NEG, NEGW, and RET (and perhaps more)? The spec doesn't know >> of those afaics. > > I think JAL, NEG, NEGW and RET are okay as is. > > For JAL, I support Jan's opinion. > > For all instructions Jan pointed out (including JAL with one operand), > they are listed in the RISC-V Assembly Programmer's Manual: > <https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md> > and should be considered safe > (unlike "add rd, rs1, IMM" == "addi rd, rs1, IMM"). > > I support merging this patch without modification (or perhaps, with > minor modification to the commit message?). > > Reviewed-by: Tsukasa OI <research_trasio@irq.a4lg.com> Arch maintainers - any view? I guess I'll wait another week or so and commit if I don't hear anything to the contrary. Jan ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] RISC-V: move various alias entries 2023-08-25 13:01 ` Jan Beulich @ 2023-08-25 13:23 ` Palmer Dabbelt 2023-08-28 2:21 ` Nelson Chu 0 siblings, 1 reply; 5+ messages in thread From: Palmer Dabbelt @ 2023-08-25 13:23 UTC (permalink / raw) To: jbeulich, nelson; +Cc: Andrew Waterman, Jim Wilson, binutils, research_trasio On Fri, 25 Aug 2023 06:01:07 PDT (-0700), jbeulich@suse.com wrote: > On 05.08.2023 03:40, Tsukasa OI wrote: >> On 2023/08/04 21:00, Jan Beulich via Binutils wrote: >>> For disassembly to only use spec-mandated aliases, respective non-alias >>> entries need to come ahead of their alias ones. Since identical >>> mnemonics need to stay together, whole groups are moved up where >>> necessary. >>> >>> This partly reverts 839189bc932e ("RISC-V: re-arrange opcode table for >>> consistent alias handling"), but then also goes beyond a plain revert. >>> --- >>> I did not adjust JAL back, to continue to match JALR. The spec doesn't >>> spell out how operands are to be specified, and hence it also doesn't >>> mention how many explicit ones there are supposed to be. >>> >>> What about NEG, NEGW, and RET (and perhaps more)? The spec doesn't know >>> of those afaics. >> >> I think JAL, NEG, NEGW and RET are okay as is. >> >> For JAL, I support Jan's opinion. >> >> For all instructions Jan pointed out (including JAL with one operand), >> they are listed in the RISC-V Assembly Programmer's Manual: >> <https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md> >> and should be considered safe >> (unlike "add rd, rs1, IMM" == "addi rd, rs1, IMM"). IMO that's a reasonable rationale. The various RISC-V specs define things in surprising places all the time, but users already need to deal with that and there's really nothing we can do to change it. At least this way we're generating disassembly that is defined somewhere, so there's a better chance they'll be able to figue out what the mnemonics mean. >> I support merging this patch without modification (or perhaps, with >> minor modification to the commit message?). >> >> Reviewed-by: Tsukasa OI <research_trasio@irq.a4lg.com> > > Arch maintainers - any view? I guess I'll wait another week or so and > commit if I don't hear anything to the contrary. Sorry for missing this. It looks good to me, so Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> but I remember talking about it at some point with Nelson. It's the weekend already in Taiwain, so I'll try to remember to bug him on Monday if he doesn't see this. > > Jan ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] RISC-V: move various alias entries 2023-08-25 13:23 ` Palmer Dabbelt @ 2023-08-28 2:21 ` Nelson Chu 0 siblings, 0 replies; 5+ messages in thread From: Nelson Chu @ 2023-08-28 2:21 UTC (permalink / raw) To: Palmer Dabbelt Cc: jbeulich, Andrew Waterman, Jim Wilson, binutils, research_trasio, Fangrui Song [-- Attachment #1: Type: text/plain, Size: 897 bytes --] On Fri, Aug 25, 2023 at 9:23 PM Palmer Dabbelt <palmer@dabbelt.com> wrote: > On Fri, 25 Aug 2023 06:01:07 PDT (-0700), jbeulich@suse.com wrote: > > On 05.08.2023 03:40, Tsukasa OI wrote: > >> On 2023/08/04 21:00, Jan Beulich via Binutils wrote: > >> I support merging this patch without modification (or perhaps, with > >> minor modification to the commit message?). > >> > >> Reviewed-by: Tsukasa OI <research_trasio@irq.a4lg.com> > > > > Arch maintainers - any view? I guess I'll wait another week or so and > > commit if I don't hear anything to the contrary. > > Sorry for missing this. It looks good to me, so > > Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> > > but I remember talking about it at some point with Nelson. It's the > weekend already in Taiwain, so I'll try to remember to bug him on Monday > if he doesn't see this. > Thanks, LGTM. Nelson ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2023-08-28 2:21 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2023-08-04 12:00 [PATCH] RISC-V: move various alias entries Jan Beulich 2023-08-05 1:40 ` Tsukasa OI 2023-08-25 13:01 ` Jan Beulich 2023-08-25 13:23 ` Palmer Dabbelt 2023-08-28 2:21 ` Nelson Chu
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