From: Jan Beulich <jbeulich@suse.com>
To: "Jiang, Haochen" <haochen.jiang@intel.com>,
"H.J. Lu" <hjl.tools@gmail.com>
Cc: Binutils <binutils@sourceware.org>, "Cui, Lili" <lili.cui@intel.com>
Subject: Re: [PATCH 07/12] x86: template-ize packed/scalar vector floating point insns
Date: Thu, 11 Aug 2022 08:03:51 +0200 [thread overview]
Message-ID: <60bb0afb-9dd8-95bf-eede-81e4c34b05d8@suse.com> (raw)
In-Reply-To: <SA1PR11MB5946244594073BF546BBC2BBEC649@SA1PR11MB5946.namprd11.prod.outlook.com>
On 11.08.2022 03:12, Jiang, Haochen wrote:
>> -----Original Message-----
>> From: H.J. Lu <hjl.tools@gmail.com>
>> Sent: Saturday, August 6, 2022 7:07 AM
>>
>> Lili, Hongchen, do you have any comments? Will this make future changes
>> difficult?
>>
>
> I suppose it won't make future changes difficult if its purpose is to combine sdh and
> Disp8 Shift.
The combining with Disp8 shift is a result (or side effect), not the
purpose. The purpose is reduction of redundancy, and as such I
actually cannot see how this could get in the way of future changes.
Ideally future changes would leverage the templates where feasible,
but if there are reasons not to then "traditional" insn templates are
still going to work as before.
Jan
next prev parent reply other threads:[~2022-08-11 6:03 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-05 12:17 [PATCH 00/12] x86: more templatization of insn templates Jan Beulich
2022-08-05 12:19 ` [PATCH 01/12] x86/Intel: split certain AVX512-FP16 VCVT*2PH templates Jan Beulich
2022-08-05 22:28 ` H.J. Lu
2022-08-05 12:20 ` [PATCH 02/12] x86: allow use of broadcast with X/Y/Z-suffixed AVX512-FP16 insns Jan Beulich
2022-08-05 22:31 ` H.J. Lu
2022-08-05 12:20 ` [PATCH 03/12] x86: fold AVX VGATHERDPD / VPGATHERDQ Jan Beulich
2022-08-05 22:32 ` H.J. Lu
2022-08-05 12:21 ` [PATCH 04/12] x86: adjust MOVSD attributes Jan Beulich
2022-08-05 22:46 ` H.J. Lu
2022-08-05 12:22 ` [PATCH 05/12] x86-64: adjust MOVQ to/from SReg attributes Jan Beulich
2022-08-05 23:00 ` H.J. Lu
2022-08-05 12:23 ` [PATCH 06/12] revert "x86: Also pass -P to $(CPP) when processing i386-opc.tbl" Jan Beulich
2022-08-05 23:17 ` H.J. Lu
2022-08-09 7:22 ` Jan Beulich
2022-08-08 12:49 ` Michael Matz
2022-08-09 7:33 ` Jan Beulich
2022-08-11 16:40 ` H.J. Lu
2022-08-05 12:24 ` [PATCH 07/12] x86: template-ize packed/scalar vector floating point insns Jan Beulich
2022-08-05 23:07 ` H.J. Lu
2022-08-11 1:12 ` Jiang, Haochen
2022-08-11 6:03 ` Jan Beulich [this message]
2022-08-11 16:38 ` H.J. Lu
2022-08-05 12:25 ` [PATCH 08/12] x86: template-ize vector packed dword/qword integer insns Jan Beulich
2022-08-11 17:23 ` H.J. Lu
2022-08-16 7:37 ` Jan Beulich
2022-08-16 15:53 ` H.J. Lu
2022-08-16 16:20 ` Jan Beulich
2022-08-16 16:32 ` H.J. Lu
2022-08-05 12:26 ` [PATCH 09/12] x86: re-order AVX512 S/G templates Jan Beulich
2022-08-11 17:24 ` H.J. Lu
2022-08-05 12:27 ` [PATCH 10/12] x86: template-ize vector packed byte/word integer insns Jan Beulich
2022-08-11 17:38 ` H.J. Lu
2022-08-05 12:28 ` [PATCH 11/12] x86: template-ize certain vector conversion insns Jan Beulich
2022-08-11 17:48 ` H.J. Lu
2022-08-05 12:29 ` [PATCH 12/12] x86: shorten certain template names Jan Beulich
2022-08-11 17:49 ` H.J. Lu
2022-08-12 11:33 ` [PATCH v1.1 06/12] revert "x86: Also pass -P to $(CPP) when processing i386-opc.tbl" Jan Beulich
2022-08-15 18:11 ` H.J. Lu
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