* [PATCH] x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms
@ 2022-04-12 6:57 Jan Beulich
2022-05-18 17:38 ` H.J. Lu
0 siblings, 1 reply; 5+ messages in thread
From: Jan Beulich @ 2022-04-12 6:57 UTC (permalink / raw)
To: Binutils
For an unclear reason corresponding AVX512F tests were apparently not
cloned or used as reference here, and instead the bogus legacy forms of
the insns (with the embedded rounding specifier not last) were used.
---
Ideally the legacy forms wouldn't have been supported by gas in the
first place, but I guess it's too late now for correcting this mistake.
Note that in some other (pre-FP16) tests we also have some legacy
instances left. Perhaps we want to retain those for making sure they
continue to work even if modern code better wouldn't use them.
Ultimately even those forms aren't MASM-compatible, but I'll get to that
later.
--- a/gas/testsuite/gas/i386/avx512_fp16.s
+++ b/gas/testsuite/gas/i386/avx512_fp16.s
@@ -891,7 +891,7 @@ _start:
vcvtsh2usi edx, WORD PTR [ecx+254] #AVX512-FP16 Disp8(7f)
vcvtsh2usi edx, WORD PTR [edx-256] #AVX512-FP16 Disp8(80)
vcvtsi2sh xmm6, xmm5, edx #AVX512-FP16
- vcvtsi2sh xmm6, xmm5, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtsi2sh xmm6, xmm5, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtsi2sh xmm6, xmm5, DWORD PTR [esp+esi*8+0x10000000] #AVX512-FP16
vcvtsi2sh xmm6, xmm5, DWORD PTR [ecx] #AVX512-FP16
vcvtsi2sh xmm6, xmm5, DWORD PTR [ecx+508] #AVX512-FP16 Disp8(7f)
@@ -972,7 +972,7 @@ _start:
vcvtuqq2ph xmm6, ZMMWORD PTR [ecx+8128] #AVX512-FP16 Disp8(7f)
vcvtuqq2ph xmm6{k7}{z}, QWORD PTR [edx-1024]{1to8} #AVX512-FP16 BROADCAST_EN Disp8(80) MASK_ENABLING ZEROCTL
vcvtusi2sh xmm6, xmm5, edx #AVX512-FP16
- vcvtusi2sh xmm6, xmm5, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtusi2sh xmm6, xmm5, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtusi2sh xmm6, xmm5, DWORD PTR [esp+esi*8+0x10000000] #AVX512-FP16
vcvtusi2sh xmm6, xmm5, DWORD PTR [ecx] #AVX512-FP16
vcvtusi2sh xmm6, xmm5, DWORD PTR [ecx+508] #AVX512-FP16 Disp8(7f)
--- a/gas/testsuite/gas/i386/x86-64-avx512_fp16.s
+++ b/gas/testsuite/gas/i386/x86-64-avx512_fp16.s
@@ -933,9 +933,9 @@ _start:
vcvtsh2usi r12, WORD PTR [rcx+254] #AVX512-FP16 Disp8(7f)
vcvtsh2usi r12, WORD PTR [rdx-256] #AVX512-FP16 Disp8(80)
vcvtsi2sh xmm30, xmm29, r12 #AVX512-FP16
- vcvtsi2sh xmm30, xmm29, {rn-sae}, r12 #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtsi2sh xmm30, xmm29, r12, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtsi2sh xmm30, xmm29, edx #AVX512-FP16
- vcvtsi2sh xmm30, xmm29, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtsi2sh xmm30, xmm29, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtsi2sh xmm30, xmm29, DWORD PTR [rbp+r14*8+0x10000000] #AVX512-FP16
vcvtsi2sh xmm30, xmm29, DWORD PTR [r9] #AVX512-FP16
vcvtsi2sh xmm30, xmm29, DWORD PTR [rcx+508] #AVX512-FP16 Disp8(7f)
@@ -1030,9 +1030,9 @@ _start:
vcvtuqq2ph xmm30, ZMMWORD PTR [rcx+8128] #AVX512-FP16 Disp8(7f)
vcvtuqq2ph xmm30{k7}{z}, QWORD PTR [rdx-1024]{1to8} #AVX512-FP16 BROADCAST_EN Disp8(80) MASK_ENABLING ZEROCTL
vcvtusi2sh xmm30, xmm29, r12 #AVX512-FP16
- vcvtusi2sh xmm30, xmm29, {rn-sae}, r12 #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtusi2sh xmm30, xmm29, r12, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtusi2sh xmm30, xmm29, edx #AVX512-FP16
- vcvtusi2sh xmm30, xmm29, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtusi2sh xmm30, xmm29, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtusi2sh xmm30, xmm29, DWORD PTR [rbp+r14*8+0x10000000] #AVX512-FP16
vcvtusi2sh xmm30, xmm29, DWORD PTR [r9] #AVX512-FP16
vcvtusi2sh xmm30, xmm29, DWORD PTR [rcx+508] #AVX512-FP16 Disp8(7f)
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms
2022-04-12 6:57 [PATCH] x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms Jan Beulich
@ 2022-05-18 17:38 ` H.J. Lu
2022-05-19 1:21 ` Cui, Lili
0 siblings, 1 reply; 5+ messages in thread
From: H.J. Lu @ 2022-05-18 17:38 UTC (permalink / raw)
To: Jan Beulich; +Cc: Binutils
On Mon, Apr 11, 2022 at 11:57 PM Jan Beulich <jbeulich@suse.com> wrote:
>
> For an unclear reason corresponding AVX512F tests were apparently not
> cloned or used as reference here, and instead the bogus legacy forms of
> the insns (with the embedded rounding specifier not last) were used.
> ---
> Ideally the legacy forms wouldn't have been supported by gas in the
> first place, but I guess it's too late now for correcting this mistake.
>
> Note that in some other (pre-FP16) tests we also have some legacy
> instances left. Perhaps we want to retain those for making sure they
> continue to work even if modern code better wouldn't use them.
> Ultimately even those forms aren't MASM-compatible, but I'll get to that
> later.
>
> --- a/gas/testsuite/gas/i386/avx512_fp16.s
> +++ b/gas/testsuite/gas/i386/avx512_fp16.s
> @@ -891,7 +891,7 @@ _start:
> vcvtsh2usi edx, WORD PTR [ecx+254] #AVX512-FP16 Disp8(7f)
> vcvtsh2usi edx, WORD PTR [edx-256] #AVX512-FP16 Disp8(80)
> vcvtsi2sh xmm6, xmm5, edx #AVX512-FP16
> - vcvtsi2sh xmm6, xmm5, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
> + vcvtsi2sh xmm6, xmm5, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
> vcvtsi2sh xmm6, xmm5, DWORD PTR [esp+esi*8+0x10000000] #AVX512-FP16
> vcvtsi2sh xmm6, xmm5, DWORD PTR [ecx] #AVX512-FP16
> vcvtsi2sh xmm6, xmm5, DWORD PTR [ecx+508] #AVX512-FP16 Disp8(7f)
> @@ -972,7 +972,7 @@ _start:
> vcvtuqq2ph xmm6, ZMMWORD PTR [ecx+8128] #AVX512-FP16 Disp8(7f)
> vcvtuqq2ph xmm6{k7}{z}, QWORD PTR [edx-1024]{1to8} #AVX512-FP16 BROADCAST_EN Disp8(80) MASK_ENABLING ZEROCTL
> vcvtusi2sh xmm6, xmm5, edx #AVX512-FP16
> - vcvtusi2sh xmm6, xmm5, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
> + vcvtusi2sh xmm6, xmm5, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
> vcvtusi2sh xmm6, xmm5, DWORD PTR [esp+esi*8+0x10000000] #AVX512-FP16
> vcvtusi2sh xmm6, xmm5, DWORD PTR [ecx] #AVX512-FP16
> vcvtusi2sh xmm6, xmm5, DWORD PTR [ecx+508] #AVX512-FP16 Disp8(7f)
> --- a/gas/testsuite/gas/i386/x86-64-avx512_fp16.s
> +++ b/gas/testsuite/gas/i386/x86-64-avx512_fp16.s
> @@ -933,9 +933,9 @@ _start:
> vcvtsh2usi r12, WORD PTR [rcx+254] #AVX512-FP16 Disp8(7f)
> vcvtsh2usi r12, WORD PTR [rdx-256] #AVX512-FP16 Disp8(80)
> vcvtsi2sh xmm30, xmm29, r12 #AVX512-FP16
> - vcvtsi2sh xmm30, xmm29, {rn-sae}, r12 #AVX512-FP16 HAS_SAE RC_CTRL
> + vcvtsi2sh xmm30, xmm29, r12, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
> vcvtsi2sh xmm30, xmm29, edx #AVX512-FP16
> - vcvtsi2sh xmm30, xmm29, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
> + vcvtsi2sh xmm30, xmm29, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
> vcvtsi2sh xmm30, xmm29, DWORD PTR [rbp+r14*8+0x10000000] #AVX512-FP16
> vcvtsi2sh xmm30, xmm29, DWORD PTR [r9] #AVX512-FP16
> vcvtsi2sh xmm30, xmm29, DWORD PTR [rcx+508] #AVX512-FP16 Disp8(7f)
> @@ -1030,9 +1030,9 @@ _start:
> vcvtuqq2ph xmm30, ZMMWORD PTR [rcx+8128] #AVX512-FP16 Disp8(7f)
> vcvtuqq2ph xmm30{k7}{z}, QWORD PTR [rdx-1024]{1to8} #AVX512-FP16 BROADCAST_EN Disp8(80) MASK_ENABLING ZEROCTL
> vcvtusi2sh xmm30, xmm29, r12 #AVX512-FP16
> - vcvtusi2sh xmm30, xmm29, {rn-sae}, r12 #AVX512-FP16 HAS_SAE RC_CTRL
> + vcvtusi2sh xmm30, xmm29, r12, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
> vcvtusi2sh xmm30, xmm29, edx #AVX512-FP16
> - vcvtusi2sh xmm30, xmm29, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
> + vcvtusi2sh xmm30, xmm29, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
> vcvtusi2sh xmm30, xmm29, DWORD PTR [rbp+r14*8+0x10000000] #AVX512-FP16
> vcvtusi2sh xmm30, xmm29, DWORD PTR [r9] #AVX512-FP16
> vcvtusi2sh xmm30, xmm29, DWORD PTR [rcx+508] #AVX512-FP16 Disp8(7f)
>
OK.
Thanks.
--
H.J.
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH] x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms
2022-05-18 17:38 ` H.J. Lu
@ 2022-05-19 1:21 ` Cui, Lili
2022-05-19 5:53 ` Jan Beulich
0 siblings, 1 reply; 5+ messages in thread
From: Cui, Lili @ 2022-05-19 1:21 UTC (permalink / raw)
To: H.J. Lu, Beulich, Jan; +Cc: Binutils
> -----Original Message-----
> From: Binutils <binutils-bounces+lili.cui=intel.com@sourceware.org> On
> Behalf Of H.J. Lu via Binutils
> Sent: Thursday, May 19, 2022 1:39 AM
> To: Beulich, Jan <JBeulich@suse.com>
> Cc: Binutils <binutils@sourceware.org>
> Subject: Re: [PATCH] x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms
>
> On Mon, Apr 11, 2022 at 11:57 PM Jan Beulich <jbeulich@suse.com> wrote:
> >
> > For an unclear reason corresponding AVX512F tests were apparently not
> > cloned or used as reference here, and instead the bogus legacy forms
> > of the insns (with the embedded rounding specifier not last) were used.
> > ---
> > Ideally the legacy forms wouldn't have been supported by gas in the
> > first place, but I guess it's too late now for correcting this mistake.
> >
> > Note that in some other (pre-FP16) tests we also have some legacy
> > instances left. Perhaps we want to retain those for making sure they
> > continue to work even if modern code better wouldn't use them.
> > Ultimately even those forms aren't MASM-compatible, but I'll get to
> > that later.
> >
Hi Jan, I also found some other similar cases, and I will create a patch to fix them later. Thanks!
gas/testsuite/gas/i386/evex-lig.s: vcvtsi2ss xmm6, xmm5, {rn-sae}, eax # AVX512
gas/testsuite/gas/i386/evex-lig.s: vcvtsi2ss xmm6, xmm5, {rn-sae}, ebp # AVX512
gas/testsuite/gas/i386/evex-lig.s: vcvtusi2ss xmm6, xmm5, {rn-sae}, eax # AVX512
gas/testsuite/gas/i386/evex-lig.s: vcvtusi2ss xmm6, xmm5, {rn-sae}, ebp # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2sd xmm30, xmm29, {rn-sae}, rax # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2sd xmm30, xmm29, {rn-sae}, r8 # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2ss xmm30, xmm29, {rn-sae}, eax # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2ss xmm30, xmm29, {rn-sae}, ebp # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2ss xmm30, xmm29, {rn-sae}, r13d # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2ss xmm30, xmm29, {rn-sae}, rax # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2ss xmm30, xmm29, {rn-sae}, r8 # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2sd xmm30, xmm29, {rn-sae}, rax # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2sd xmm30, xmm29, {rn-sae}, r8 # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2ss xmm30, xmm29, {rn-sae}, eax # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2ss xmm30, xmm29, {rn-sae}, ebp # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2ss xmm30, xmm29, {rn-sae}, r13d # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2ss xmm30, xmm29, {rn-sae}, rax # AVX512
gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2ss xmm30, xmm29, {rn-sae}, r8 # AVX512
Lili.
> > --- a/gas/testsuite/gas/i386/avx512_fp16.s
> > +++ b/gas/testsuite/gas/i386/avx512_fp16.s
> > @@ -891,7 +891,7 @@ _start:
> > vcvtsh2usi edx, WORD PTR [ecx+254] #AVX512-FP16 Disp8(7f)
> > vcvtsh2usi edx, WORD PTR [edx-256] #AVX512-FP16 Disp8(80)
> > vcvtsi2sh xmm6, xmm5, edx #AVX512-FP16
> > - vcvtsi2sh xmm6, xmm5, {rn-sae}, edx #AVX512-FP16 HAS_SAE
> RC_CTRL
> > + vcvtsi2sh xmm6, xmm5, edx, {rn-sae} #AVX512-FP16 HAS_SAE
> RC_CTRL
> > vcvtsi2sh xmm6, xmm5, DWORD PTR [esp+esi*8+0x10000000]
> #AVX512-FP16
> > vcvtsi2sh xmm6, xmm5, DWORD PTR [ecx] #AVX512-FP16
> > vcvtsi2sh xmm6, xmm5, DWORD PTR [ecx+508] #AVX512-FP16
> Disp8(7f)
> > @@ -972,7 +972,7 @@ _start:
> > vcvtuqq2ph xmm6, ZMMWORD PTR [ecx+8128] #AVX512-FP16
> Disp8(7f)
> > vcvtuqq2ph xmm6{k7}{z}, QWORD PTR [edx-1024]{1to8} #AVX512-
> FP16 BROADCAST_EN Disp8(80) MASK_ENABLING ZEROCTL
> > vcvtusi2sh xmm6, xmm5, edx #AVX512-FP16
> > - vcvtusi2sh xmm6, xmm5, {rn-sae}, edx #AVX512-FP16 HAS_SAE
> RC_CTRL
> > + vcvtusi2sh xmm6, xmm5, edx, {rn-sae} #AVX512-FP16 HAS_SAE
> RC_CTRL
> > vcvtusi2sh xmm6, xmm5, DWORD PTR [esp+esi*8+0x10000000]
> #AVX512-FP16
> > vcvtusi2sh xmm6, xmm5, DWORD PTR [ecx] #AVX512-FP16
> > vcvtusi2sh xmm6, xmm5, DWORD PTR [ecx+508] #AVX512-FP16
> Disp8(7f)
> > --- a/gas/testsuite/gas/i386/x86-64-avx512_fp16.s
> > +++ b/gas/testsuite/gas/i386/x86-64-avx512_fp16.s
> > @@ -933,9 +933,9 @@ _start:
> > vcvtsh2usi r12, WORD PTR [rcx+254] #AVX512-FP16 Disp8(7f)
> > vcvtsh2usi r12, WORD PTR [rdx-256] #AVX512-FP16 Disp8(80)
> > vcvtsi2sh xmm30, xmm29, r12 #AVX512-FP16
> > - vcvtsi2sh xmm30, xmm29, {rn-sae}, r12 #AVX512-FP16 HAS_SAE
> RC_CTRL
> > + vcvtsi2sh xmm30, xmm29, r12, {rn-sae} #AVX512-FP16 HAS_SAE
> RC_CTRL
> > vcvtsi2sh xmm30, xmm29, edx #AVX512-FP16
> > - vcvtsi2sh xmm30, xmm29, {rn-sae}, edx #AVX512-FP16 HAS_SAE
> RC_CTRL
> > + vcvtsi2sh xmm30, xmm29, edx, {rn-sae} #AVX512-FP16 HAS_SAE
> RC_CTRL
> > vcvtsi2sh xmm30, xmm29, DWORD PTR [rbp+r14*8+0x10000000]
> #AVX512-FP16
> > vcvtsi2sh xmm30, xmm29, DWORD PTR [r9] #AVX512-FP16
> > vcvtsi2sh xmm30, xmm29, DWORD PTR [rcx+508] #AVX512-
> FP16 Disp8(7f)
> > @@ -1030,9 +1030,9 @@ _start:
> > vcvtuqq2ph xmm30, ZMMWORD PTR [rcx+8128] #AVX512-FP16
> Disp8(7f)
> > vcvtuqq2ph xmm30{k7}{z}, QWORD PTR [rdx-1024]{1to8}
> #AVX512-FP16 BROADCAST_EN Disp8(80) MASK_ENABLING ZEROCTL
> > vcvtusi2sh xmm30, xmm29, r12 #AVX512-FP16
> > - vcvtusi2sh xmm30, xmm29, {rn-sae}, r12 #AVX512-FP16 HAS_SAE
> RC_CTRL
> > + vcvtusi2sh xmm30, xmm29, r12, {rn-sae} #AVX512-FP16 HAS_SAE
> RC_CTRL
> > vcvtusi2sh xmm30, xmm29, edx #AVX512-FP16
> > - vcvtusi2sh xmm30, xmm29, {rn-sae}, edx #AVX512-FP16 HAS_SAE
> RC_CTRL
> > + vcvtusi2sh xmm30, xmm29, edx, {rn-sae} #AVX512-FP16
> HAS_SAE RC_CTRL
> > vcvtusi2sh xmm30, xmm29, DWORD PTR [rbp+r14*8+0x10000000]
> #AVX512-FP16
> > vcvtusi2sh xmm30, xmm29, DWORD PTR [r9] #AVX512-FP16
> > vcvtusi2sh xmm30, xmm29, DWORD PTR [rcx+508] #AVX512-
> FP16 Disp8(7f)
> >
>
> OK.
>
> Thanks.
>
> --
> H.J.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms
2022-05-19 1:21 ` Cui, Lili
@ 2022-05-19 5:53 ` Jan Beulich
2022-05-19 6:14 ` Cui, Lili
0 siblings, 1 reply; 5+ messages in thread
From: Jan Beulich @ 2022-05-19 5:53 UTC (permalink / raw)
To: Cui, Lili; +Cc: Binutils, H.J. Lu
On 19.05.2022 03:21, Cui, Lili wrote:
>
>
>> -----Original Message-----
>> From: Binutils <binutils-bounces+lili.cui=intel.com@sourceware.org> On
>> Behalf Of H.J. Lu via Binutils
>> Sent: Thursday, May 19, 2022 1:39 AM
>> To: Beulich, Jan <JBeulich@suse.com>
>> Cc: Binutils <binutils@sourceware.org>
>> Subject: Re: [PATCH] x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms
>>
>> On Mon, Apr 11, 2022 at 11:57 PM Jan Beulich <jbeulich@suse.com> wrote:
>>>
>>> For an unclear reason corresponding AVX512F tests were apparently not
>>> cloned or used as reference here, and instead the bogus legacy forms
>>> of the insns (with the embedded rounding specifier not last) were used.
>>> ---
>>> Ideally the legacy forms wouldn't have been supported by gas in the
>>> first place, but I guess it's too late now for correcting this mistake.
>>>
>>> Note that in some other (pre-FP16) tests we also have some legacy
>>> instances left. Perhaps we want to retain those for making sure they
>>> continue to work even if modern code better wouldn't use them.
>>> Ultimately even those forms aren't MASM-compatible, but I'll get to
>>> that later.
>>>
>
> Hi Jan, I also found some other similar cases, and I will create a patch to fix them later. Thanks!
I'm not sure we want to eliminate / replace all of them - see what I've
said above. After all we want the assembler to continue to accept this
form, for not breaking code pre-dating the introduction of the partly
(and now also the fully) SDM-compatible form.
Jan
> gas/testsuite/gas/i386/evex-lig.s: vcvtsi2ss xmm6, xmm5, {rn-sae}, eax # AVX512
> gas/testsuite/gas/i386/evex-lig.s: vcvtsi2ss xmm6, xmm5, {rn-sae}, ebp # AVX512
> gas/testsuite/gas/i386/evex-lig.s: vcvtusi2ss xmm6, xmm5, {rn-sae}, eax # AVX512
> gas/testsuite/gas/i386/evex-lig.s: vcvtusi2ss xmm6, xmm5, {rn-sae}, ebp # AVX512
>
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2sd xmm30, xmm29, {rn-sae}, rax # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2sd xmm30, xmm29, {rn-sae}, r8 # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2ss xmm30, xmm29, {rn-sae}, eax # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2ss xmm30, xmm29, {rn-sae}, ebp # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2ss xmm30, xmm29, {rn-sae}, r13d # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2ss xmm30, xmm29, {rn-sae}, rax # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtsi2ss xmm30, xmm29, {rn-sae}, r8 # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2sd xmm30, xmm29, {rn-sae}, rax # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2sd xmm30, xmm29, {rn-sae}, r8 # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2ss xmm30, xmm29, {rn-sae}, eax # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2ss xmm30, xmm29, {rn-sae}, ebp # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2ss xmm30, xmm29, {rn-sae}, r13d # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2ss xmm30, xmm29, {rn-sae}, rax # AVX512
> gas/testsuite/gas/i386/x86-64-evex-lig.s: vcvtusi2ss xmm30, xmm29, {rn-sae}, r8 # AVX512
>
> Lili.
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH] x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms
2022-05-19 5:53 ` Jan Beulich
@ 2022-05-19 6:14 ` Cui, Lili
0 siblings, 0 replies; 5+ messages in thread
From: Cui, Lili @ 2022-05-19 6:14 UTC (permalink / raw)
To: Beulich, Jan; +Cc: Binutils, H.J. Lu
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Thursday, May 19, 2022 1:54 PM
> To: Cui, Lili <lili.cui@intel.com>
> Cc: Binutils <binutils@sourceware.org>; H.J. Lu <hjl.tools@gmail.com>
> Subject: Re: [PATCH] x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms
>
> On 19.05.2022 03:21, Cui, Lili wrote:
> >>> For an unclear reason corresponding AVX512F tests were apparently
> >>> not cloned or used as reference here, and instead the bogus legacy
> >>> forms of the insns (with the embedded rounding specifier not last) were
> used.
> >>> ---
> >>> Ideally the legacy forms wouldn't have been supported by gas in the
> >>> first place, but I guess it's too late now for correcting this mistake.
> >>>
> >>> Note that in some other (pre-FP16) tests we also have some legacy
> >>> instances left. Perhaps we want to retain those for making sure they
> >>> continue to work even if modern code better wouldn't use them.
> >>> Ultimately even those forms aren't MASM-compatible, but I'll get to
> >>> that later.
> >>>
> >
> > Hi Jan, I also found some other similar cases, and I will create a patch to fix
> them later. Thanks!
>
> I'm not sure we want to eliminate / replace all of them - see what I've said
> above. After all we want the assembler to continue to accept this form, for
> not breaking code pre-dating the introduction of the partly (and now also the
> fully) SDM-compatible form.
>
Ok, got it, I'm not going to change them to make sure their formatting continues to work.
Thanks,
Lili.
> Jan
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-05-19 6:15 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-12 6:57 [PATCH] x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms Jan Beulich
2022-05-18 17:38 ` H.J. Lu
2022-05-19 1:21 ` Cui, Lili
2022-05-19 5:53 ` Jan Beulich
2022-05-19 6:14 ` Cui, Lili
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