From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
Nelson Chu <nelson.chu@sifive.com>,
Kito Cheng <kito.cheng@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Cc: binutils@sourceware.org
Subject: [PATCH 1/5] RISC-V: Remove unused instruction macros
Date: Sat, 9 Jul 2022 18:09:10 +0900 [thread overview]
Message-ID: <b0f7ce99bed8d03b9cac0c98e3dc9bdc10c90856.1657357697.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1657357697.git.research_trasio@irq.a4lg.com>
This commit removes unused instruction macros.
include/ChangeLog:
* opcode/riscv-opc.h (MATCH_SLLI_RV32, MASK_SLLI_RV32,
MATCH_SRLI_RV32, MASK_SRLI_RV32, MATCH_SRAI_RV32,
MASK_SRAI_RV32, MATCH_VQMACCUVV, MASK_VQMACCUVV,
MATCH_VQMACCUVX, MASK_VQMACCUVX, MATCH_VQMACCVV, MASK_VQMACCVV,
MATCH_VQMACCVX, MASK_VQMACCVX, MATCH_VQMACCSUVV,
MASK_VQMACCSUVV, MATCH_VQMACCSUVX, MASK_VQMACCSUVX,
MATCH_VQMACCUSVX, MASK_VQMACCUSVX, MATCH_VDOTVV, MASK_VDOTVV,
MATCH_VDOTUVV, MASK_VDOTUVV, MATCH_VFDOTVV, MASK_VFDOTVV):
Removed as no longer used.
---
include/opcode/riscv-opc.h | 29 -----------------------------
1 file changed, 29 deletions(-)
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index 88b8d7ff595..a808f52232b 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -21,12 +21,6 @@
#ifndef RISCV_ENCODING_H
#define RISCV_ENCODING_H
/* Instruction opcode macros. */
-#define MATCH_SLLI_RV32 0x1013
-#define MASK_SLLI_RV32 0xfe00707f
-#define MATCH_SRLI_RV32 0x5013
-#define MASK_SRLI_RV32 0xfe00707f
-#define MATCH_SRAI_RV32 0x40005013
-#define MASK_SRAI_RV32 0xfe00707f
#define MATCH_FRFLAGS 0x102073
#define MASK_FRFLAGS 0xfffff07f
#define MATCH_FSFLAGS 0x101073
@@ -1657,20 +1651,6 @@
#define MASK_VWMACCSUVX 0xfc00707f
#define MATCH_VWMACCUSVX 0xf8006057
#define MASK_VWMACCUSVX 0xfc00707f
-#define MATCH_VQMACCUVV 0xf0000057
-#define MASK_VQMACCUVV 0xfc00707f
-#define MATCH_VQMACCUVX 0xf0004057
-#define MASK_VQMACCUVX 0xfc00707f
-#define MATCH_VQMACCVV 0xf4000057
-#define MASK_VQMACCVV 0xfc00707f
-#define MATCH_VQMACCVX 0xf4004057
-#define MASK_VQMACCVX 0xfc00707f
-#define MATCH_VQMACCSUVV 0xfc000057
-#define MASK_VQMACCSUVV 0xfc00707f
-#define MATCH_VQMACCSUVX 0xfc004057
-#define MASK_VQMACCSUVX 0xfc00707f
-#define MATCH_VQMACCUSVX 0xf8004057
-#define MASK_VQMACCUSVX 0xfc00707f
#define MATCH_VDIVVV 0x84002057
#define MASK_VDIVVV 0xfc00707f
#define MATCH_VDIVVX 0x84006057
@@ -2049,12 +2029,6 @@
#define MASK_VMV4RV 0xfe0ff07f
#define MATCH_VMV8RV 0x9e03b057
#define MASK_VMV8RV 0xfe0ff07f
-#define MATCH_VDOTVV 0xe4000057
-#define MASK_VDOTVV 0xfc00707f
-#define MATCH_VDOTUVV 0xe0000057
-#define MASK_VDOTUVV 0xfc00707f
-#define MATCH_VFDOTVV 0xe4001057
-#define MASK_VFDOTVV 0xfc00707f
/* Svinval instruction. */
#define MATCH_SINVAL_VMA 0x16000073
#define MASK_SINVAL_VMA 0xfe007fff
@@ -2520,9 +2494,6 @@
#define CSR_VLENB 0xc22
#endif /* RISCV_ENCODING_H */
#ifdef DECLARE_INSN
-DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32)
-DECLARE_INSN(srli_rv32, MATCH_SRLI_RV32, MASK_SRLI_RV32)
-DECLARE_INSN(srai_rv32, MATCH_SRAI_RV32, MASK_SRAI_RV32)
DECLARE_INSN(frflags, MATCH_FRFLAGS, MASK_FRFLAGS)
DECLARE_INSN(fsflags, MATCH_FSFLAGS, MASK_FSFLAGS)
DECLARE_INSN(fsflagsi, MATCH_FSFLAGSI, MASK_FSFLAGSI)
--
2.34.1
next prev parent reply other threads:[~2022-07-09 9:09 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-09 9:09 [PATCH 0/5] RISC-V: Opcode tidying (batch 1) Tsukasa OI
2022-07-09 9:09 ` Tsukasa OI [this message]
2022-07-09 9:09 ` [PATCH 2/5] RISC-V: Complete tidying up with SCALL and SBREAK Tsukasa OI
2022-07-09 9:09 ` [PATCH 3/5] RISC-V: Tidying up with fmv.w.x and fmv.x.w Tsukasa OI
2022-07-09 9:09 ` [PATCH 4/5] RISC-V: Use defined mask and match values Tsukasa OI
2022-07-09 9:09 ` [PATCH 5/5] RISC-V: Make alias instructions aliases Tsukasa OI
2022-10-19 13:11 ` [PATCH v2 0/8] RISC-V: Various opcode tidying (batch 1) Tsukasa OI
2022-10-19 13:11 ` [PATCH v2 1/8] RISC-V: Add a space at the end of pinfo Tsukasa OI
2022-10-19 13:11 ` [PATCH v2 2/8] RISC-V: Fix obvious misalignments ('Zbb'/'Zba') Tsukasa OI
2022-10-19 13:11 ` [PATCH v2 3/8] RISC-V: Remove spaces in opcode entries Tsukasa OI
2022-10-19 13:11 ` [PATCH v2 4/8] RISC-V: Remove unused instruction macros Tsukasa OI
2022-10-19 13:11 ` [PATCH v2 5/8] RISC-V: Complete tidying up with SCALL and SBREAK Tsukasa OI
2022-10-19 13:12 ` [PATCH v2 6/8] RISC-V: Tidying up with fmv.w.x and fmv.x.w Tsukasa OI
2022-10-19 13:12 ` [PATCH v2 7/8] RISC-V: Make alias instructions aliases Tsukasa OI
2022-10-19 13:12 ` [PATCH v2 8/8] RISC-V: Use defined mask and match values Tsukasa OI
2022-11-05 11:51 ` [PING^1][PATCH v2 0/8] RISC-V: Various opcode tidying (batch 1) Tsukasa OI
2022-11-15 4:31 ` [PATCH v3 " Tsukasa OI
2022-11-15 4:31 ` [PATCH v3 1/8] RISC-V: Add a space at the end of pinfo Tsukasa OI
2022-11-15 4:31 ` [PATCH v3 2/8] RISC-V: Fix obvious misalignments ('Zbb'/'Zba') Tsukasa OI
2022-11-15 4:31 ` [PATCH v3 3/8] RISC-V: Remove spaces in opcode entries Tsukasa OI
2022-11-15 4:31 ` [PATCH v3 4/8] RISC-V: Remove unused instruction macros Tsukasa OI
2022-11-15 4:31 ` [PATCH v3 5/8] RISC-V: Complete tidying up with SCALL and SBREAK Tsukasa OI
2022-11-15 4:31 ` [PATCH v3 6/8] RISC-V: Tidying up with fmv.w.x and fmv.x.w Tsukasa OI
2022-11-15 4:31 ` [PATCH v3 7/8] RISC-V: Make alias instructions aliases Tsukasa OI
2022-11-15 4:31 ` [PATCH v3 8/8] RISC-V: Use defined mask and match values Tsukasa OI
2022-11-18 2:07 ` [PATCH v4 0/8] RISC-V: Various opcode tidying (batch 1) Tsukasa OI
2022-11-18 2:07 ` [PATCH v4 1/8] RISC-V: Add a space at the end of pinfo Tsukasa OI
2022-11-18 2:07 ` [PATCH v4 2/8] RISC-V: Fix obvious misalignments ('Zbb'/'Zba') Tsukasa OI
2022-11-18 2:07 ` [PATCH v4 3/8] RISC-V: Remove spaces in opcode entries Tsukasa OI
2022-11-18 2:07 ` [PATCH v4 4/8] RISC-V: Remove unused instruction macros Tsukasa OI
2022-11-18 2:07 ` [PATCH v4 5/8] RISC-V: Complete tidying up with SCALL and SBREAK Tsukasa OI
2022-11-18 2:07 ` [PATCH v4 6/8] RISC-V: Tidying up with fmv.w.x and fmv.x.w Tsukasa OI
2022-11-18 2:07 ` [PATCH v4 7/8] RISC-V: Make alias instructions aliases Tsukasa OI
2022-11-18 2:07 ` [PATCH v4 8/8] RISC-V: Use defined mask and match values Tsukasa OI
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