From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>
Cc: binutils@sourceware.org
Subject: [PATCH 0/5] RISC-V: Add Ratified Cache Management Operation ISA Extensions (with paren)
Date: Wed, 9 Feb 2022 11:29:27 +0900 [thread overview]
Message-ID: <cover.1644373764.git.research_trasio@irq.a4lg.com> (raw)
This patchset is a modified version of:
<https://sourceware.org/pipermail/binutils/2021-December/118909.html>
GitHub:
<https://github.com/a4lg/binutils-gdb/tree/riscv-CMOs> (original; 2021-12-16, rebased)
<https://github.com/a4lg/binutils-gdb/tree/riscv-CMOs-with-paren> (new: 2022-02-09)
There seems a discussion to change operand of cbo.* instructions on:
<https://github.com/riscv/riscv-CMOs/issues/47>.
I have a little preference for old one but it's not bad to have both
options (as complete patchsets).
Note that however, the original patchset is *NOT OUTDATED* yet.
It implements Zicbom/Zicboz instruction like:
cbo.zero a0
This new patchset implements Zicbom/Zicboz instructions like:
cbo.zero (a0)
cbo.zero 0(a0) # only zero is allowed
Actually, my first attempt to implement cbo.* instructions used the same
format as *new* patchset (I modified before submitting the first
patchset for compliance to the specification document).
This version requires extra checking (0(a0) actually allows
EXPRESSION_RESULTS_IN_ZERO(a0)) so I added a few extra tests.
It will also reject operand format in older patchset.
Old patchset and new patchset are mutually exclusive and should follow
the conclusion of the discussion above.
Thanks,
Tsukasa
Tsukasa OI (5):
RISC-V: Add mininal support for Zicbo[mpz]
RISC-V: Cache management instructions
RISC-V: Cache management instruction testcases
RISC-V: Prefetch hint instructions and operand set
RISC-V: Prefetch hint instruction testcases
bfd/elfxx-riscv.c | 9 +++++++++
gas/config/tc-riscv.c | 18 ++++++++++++++++++
gas/testsuite/gas/riscv/zicbom-fail.d | 3 +++
gas/testsuite/gas/riscv/zicbom-fail.l | 7 +++++++
gas/testsuite/gas/riscv/zicbom-fail.s | 7 +++++++
gas/testsuite/gas/riscv/zicbom.d | 15 +++++++++++++++
gas/testsuite/gas/riscv/zicbom.s | 7 +++++++
gas/testsuite/gas/riscv/zicbop-fail.d | 3 +++
gas/testsuite/gas/riscv/zicbop-fail.l | 4 ++++
gas/testsuite/gas/riscv/zicbop-fail.s | 4 ++++
gas/testsuite/gas/riscv/zicbop.d | 12 ++++++++++++
gas/testsuite/gas/riscv/zicbop.s | 4 ++++
gas/testsuite/gas/riscv/zicboz-fail.d | 3 +++
gas/testsuite/gas/riscv/zicboz-fail.l | 3 +++
gas/testsuite/gas/riscv/zicboz-fail.s | 3 +++
gas/testsuite/gas/riscv/zicboz.d | 12 ++++++++++++
gas/testsuite/gas/riscv/zicboz.s | 4 ++++
include/opcode/riscv-opc.h | 16 ++++++++++++++++
include/opcode/riscv.h | 3 +++
opcodes/riscv-dis.c | 4 ++++
opcodes/riscv-opc.c | 9 +++++++++
21 files changed, 150 insertions(+)
create mode 100644 gas/testsuite/gas/riscv/zicbom-fail.d
create mode 100644 gas/testsuite/gas/riscv/zicbom-fail.l
create mode 100644 gas/testsuite/gas/riscv/zicbom-fail.s
create mode 100644 gas/testsuite/gas/riscv/zicbom.d
create mode 100644 gas/testsuite/gas/riscv/zicbom.s
create mode 100644 gas/testsuite/gas/riscv/zicbop-fail.d
create mode 100644 gas/testsuite/gas/riscv/zicbop-fail.l
create mode 100644 gas/testsuite/gas/riscv/zicbop-fail.s
create mode 100644 gas/testsuite/gas/riscv/zicbop.d
create mode 100644 gas/testsuite/gas/riscv/zicbop.s
create mode 100644 gas/testsuite/gas/riscv/zicboz-fail.d
create mode 100644 gas/testsuite/gas/riscv/zicboz-fail.l
create mode 100644 gas/testsuite/gas/riscv/zicboz-fail.s
create mode 100644 gas/testsuite/gas/riscv/zicboz.d
create mode 100644 gas/testsuite/gas/riscv/zicboz.s
base-commit: a37603c43f8da7983ed53b567ea30ce66066daa2
--
2.32.0
next reply other threads:[~2022-02-09 2:29 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-09 2:29 Tsukasa OI [this message]
2022-02-09 2:29 ` [PATCH 1/5] RISC-V: Add mininal support for Zicbo[mpz] Tsukasa OI
2022-02-09 2:29 ` [PATCH 2/5] RISC-V: Cache management instructions Tsukasa OI
2022-02-09 2:29 ` [PATCH 3/5] RISC-V: Cache management instruction testcases Tsukasa OI
2022-02-09 2:29 ` [PATCH 4/5] RISC-V: Prefetch hint instructions and operand set Tsukasa OI
2022-02-25 2:50 ` Nelson Chu
2022-02-25 7:07 ` Tsukasa OI
2022-03-18 7:50 ` Nelson Chu
2022-02-09 2:29 ` [PATCH 5/5] RISC-V: Prefetch hint instruction testcases Tsukasa OI
2022-04-01 3:33 ` [PATCH 0/5] RISC-V: Add Ratified Cache Management Operation ISA Extensions (with paren) Palmer Dabbelt
2022-04-01 4:04 ` Kito Cheng
2022-04-01 4:15 ` Palmer Dabbelt
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