From: Jan Beulich <jbeulich@suse.com>
To: "Cui, Lili" <lili.cui@intel.com>
Cc: hongjiu.lu@intel.com, binutils@sourceware.org
Subject: Re: [PATCH 3/8] Add tests for APX GPR32 with extend evex prefix
Date: Wed, 27 Sep 2023 15:11:54 +0200 [thread overview]
Message-ID: <de8dea13-cb69-18f8-07f1-d100e718c45d@suse.com> (raw)
In-Reply-To: <20230919152527.497773-4-lili.cui@intel.com>
On 19.09.2023 17:25, Cui, Lili wrote:
> gas/ChangeLog:
>
> * testsuite/gas/i386/x86-64-apx-egpr-inval.l: Add some
> insn don't support gpr32
> * testsuite/gas/i386/x86-64-apx-egpr-inval.s: Ditto.
> * testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s: Ditto.
> * testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s: Ditto.
> * testsuite/gas/i386/x86-64.exp: Add x86-64-apx-evex-egpr,
> x86-64-apx-evex-legacy and x86-64-apx-evex-vex.
> * testsuite/gas/i386/x86-64-apx-evex-egpr.d: New test.
> * testsuite/gas/i386/x86-64-apx-evex-egpr.s: New test.
> * testsuite/gas/i386/x86-64-apx-evex-promoted-intrel.d: New test.
> * testsuite/gas/i386/x86-64-apx-evex-promoted.d: New test.
> * testsuite/gas/i386/x86-64-apx-evex-promoted.s: New test.
> ---
> .../gas/i386/x86-64-apx-egpr-inval.l | 190 ++-
> .../gas/i386/x86-64-apx-egpr-inval.s | 194 ++-
> .../gas/i386/x86-64-apx-egpr-promote-inval.l | 17 +
> .../gas/i386/x86-64-apx-egpr-promote-inval.s | 18 +
> gas/testsuite/gas/i386/x86-64-apx-evex-egpr.d | 22 +
> gas/testsuite/gas/i386/x86-64-apx-evex-egpr.s | 25 +
> .../gas/i386/x86-64-apx-evex-promoted-intel.d | 740 +++++++++
> .../gas/i386/x86-64-apx-evex-promoted.d | 740 +++++++++
> .../gas/i386/x86-64-apx-evex-promoted.s | 1464 +++++++++++++++++
> gas/testsuite/gas/i386/x86-64-evex.d | 2 +-
> gas/testsuite/gas/i386/x86-64-inval-movbe.l | 31 +-
> gas/testsuite/gas/i386/x86-64-inval-movbe.s | 1 +
> gas/testsuite/gas/i386/x86-64.exp | 4 +
> 13 files changed, 3430 insertions(+), 18 deletions(-)
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.l
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-egpr.d
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-egpr.s
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
>
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l
> index c419f449f27..2fc8a4cc5f0 100644
> --- a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l
> +++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l
> @@ -12,9 +12,197 @@
> .*:16: Error: register type mismatch for `xsaveopt64'
> .*:17: Error: register type mismatch for `xsavec'
> .*:18: Error: register type mismatch for `xsavec64'
> +.*:20: Error: register type mismatch for `phaddw'
> +.*:21: Error: register type mismatch for `phaddd'
> +.*:22: Error: register type mismatch for `phaddsw'
> +.*:23: Error: register type mismatch for `phsubw'
> +.*:24: Error: register type mismatch for `pmaddubsw'
> +.*:25: Error: register type mismatch for `pmulhrsw'
> +.*:26: Error: register type mismatch for `pshufb'
> +.*:27: Error: register type mismatch for `psignb'
> +.*:28: Error: register type mismatch for `psignw'
> +.*:29: Error: register type mismatch for `psignd'
> +.*:30: Error: register type mismatch for `palignr'
> +.*:31: Error: register type mismatch for `pabsb'
> +.*:32: Error: register type mismatch for `pabsw'
> +.*:33: Error: register type mismatch for `pabsd'
> +.*:34: Error: register type mismatch for `blendpd'
> +.*:35: Error: register type mismatch for `blendps'
> +.*:36: Error: register type mismatch for `blendvpd'
> +.*:37: Error: register type mismatch for `blendvps'
> +.*:38: Error: register type mismatch for `blendvpd'
> +.*:39: Error: register type mismatch for `blendvps'
> +.*:40: Error: register type mismatch for `dppd'
> +.*:41: Error: register type mismatch for `dpps'
> +.*:42: Error: register type mismatch for `extractps'
> +.*:43: Error: register type mismatch for `extractps'
> +.*:44: Error: register type mismatch for `insertps'
> +.*:45: Error: register type mismatch for `movntdqa'
> +.*:46: Error: register type mismatch for `mpsadbw'
> +.*:47: Error: register type mismatch for `packusdw'
> +.*:48: Error: register type mismatch for `pblendvb'
> +.*:49: Error: register type mismatch for `pblendvb'
> +.*:50: Error: register type mismatch for `pblendw'
> +.*:51: Error: register type mismatch for `pcmpeqq'
> +.*:52: Error: register type mismatch for `pextrb'
> +.*:53: Error: register type mismatch for `pextrw'
> +.*:54: Error: register type mismatch for `pextrb'
> +.*:55: Error: register type mismatch for `pextrd'
> +.*:56: Error: register type mismatch for `pextrd'
> +.*:57: Error: register type mismatch for `phminposuw'
> +.*:58: Error: register type mismatch for `pinsrb'
> +.*:59: Error: register type mismatch for `pinsrb'
> +.*:60: Error: register type mismatch for `pinsrd'
> +.*:61: Error: register type mismatch for `pinsrd'
> +.*:62: Error: register type mismatch for `pinsrq'
> +.*:63: Error: register type mismatch for `pinsrq'
> +.*:64: Error: register type mismatch for `pmaxsb'
> +.*:65: Error: register type mismatch for `pmaxsd'
> +.*:66: Error: register type mismatch for `pmaxud'
> +.*:67: Error: register type mismatch for `pmaxuw'
> +.*:68: Error: register type mismatch for `pminsb'
> +.*:69: Error: register type mismatch for `pminsd'
> +.*:70: Error: register type mismatch for `pminud'
> +.*:71: Error: register type mismatch for `pminuw'
> +.*:72: Error: register type mismatch for `pmovsxbw'
> +.*:73: Error: register type mismatch for `pmovsxbd'
> +.*:74: Error: register type mismatch for `pmovsxbq'
> +.*:75: Error: register type mismatch for `pmovsxwd'
> +.*:76: Error: register type mismatch for `pmovsxwq'
> +.*:77: Error: register type mismatch for `pmovsxdq'
> +.*:78: Error: register type mismatch for `pmovsxbw'
> +.*:79: Error: register type mismatch for `pmovzxbd'
> +.*:80: Error: register type mismatch for `pmovzxbq'
> +.*:81: Error: register type mismatch for `pmovzxwd'
> +.*:82: Error: register type mismatch for `pmovzxwq'
> +.*:83: Error: register type mismatch for `pmovzxdq'
> +.*:84: Error: register type mismatch for `pmuldq'
> +.*:85: Error: register type mismatch for `pmulld'
> +.*:86: Error: register type mismatch for `roundpd'
> +.*:87: Error: register type mismatch for `roundps'
> +.*:88: Error: register type mismatch for `roundsd'
> +.*:89: Error: register type mismatch for `roundss'
> +.*:90: Error: register type mismatch for `pcmpgtq'
> +.*:91: Error: register type mismatch for `pcmpestri'
> +.*:92: Error: register type mismatch for `pcmpestrm'
> +.*:93: Error: register type mismatch for `pcmpistri'
> +.*:94: Error: register type mismatch for `pcmpistrm'
> +.*:96: Error: register type mismatch for `aesdec'
> +.*:97: Error: register type mismatch for `aesdeclast'
> +.*:98: Error: register type mismatch for `aesenc'
> +.*:99: Error: register type mismatch for `aesenclast'
> +.*:100: Error: register type mismatch for `aesimc'
> +.*:101: Error: register type mismatch for `aeskeygenassist'
> +.*:102: Error: register type mismatch for `pclmulqdq'
> +.*:103: Error: register type mismatch for `pclmullqlqdq'
> +.*:104: Error: register type mismatch for `pclmulhqlqdq'
> +.*:105: Error: register type mismatch for `pclmullqhqdq'
> +.*:106: Error: register type mismatch for `pclmulhqhqdq'
> +.*:108: Error: register type mismatch for `gf2p8affineqb'
> +.*:109: Error: register type mismatch for `gf2p8affineinvqb'
> +.*:110: Error: register type mismatch for `gf2p8mulb'
> +.*:112: Error: register type mismatch for `vblendpd'
> +.*:113: Error: register type mismatch for `vblendpd'
> +.*:114: Error: register type mismatch for `vblendps'
> +.*:115: Error: register type mismatch for `vblendps'
> +.*:116: Error: register type mismatch for `vblendvpd'
> +.*:117: Error: register type mismatch for `vblendvpd'
> +.*:118: Error: register type mismatch for `vblendvps'
> +.*:119: Error: register type mismatch for `vblendvps'
> +.*:120: Error: register type mismatch for `vdppd'
> +.*:121: Error: register type mismatch for `vdpps'
> +.*:122: Error: register type mismatch for `vdpps'
> +.*:123: Error: register type mismatch for `vhaddpd'
> +.*:124: Error: register type mismatch for `vhaddpd'
> +.*:125: Error: register type mismatch for `vhsubps'
> +.*:126: Error: register type mismatch for `vhsubps'
> +.*:127: Error: register type mismatch for `vlddqu'
> +.*:128: Error: register type mismatch for `vlddqu'
> +.*:129: Error: register type mismatch for `vldmxcsr'
> +.*:130: Error: register type mismatch for `vmaskmovpd'
> +.*:131: Error: register type mismatch for `vmaskmovpd'
> +.*:132: Error: register type mismatch for `vmaskmovps'
> +.*:133: Error: register type mismatch for `vmaskmovps'
> +.*:134: Error: register type mismatch for `vmaskmovpd'
> +.*:135: Error: register type mismatch for `vmaskmovpd'
> +.*:136: Error: register type mismatch for `vmaskmovps'
> +.*:137: Error: register type mismatch for `vmaskmovps'
> +.*:138: Error: register type mismatch for `vmovmskpd'
> +.*:139: Error: register type mismatch for `vmovmskpd'
> +.*:140: Error: register type mismatch for `vmovmskps'
> +.*:141: Error: register type mismatch for `vmovmskps'
> +.*:142: Error: register type mismatch for `vpblendvb'
> +.*:143: Error: register type mismatch for `vpblendvb'
> +.*:144: Error: register type mismatch for `vpblendw'
> +.*:145: Error: register type mismatch for `vpblendw'
> +.*:146: Error: register type mismatch for `vpcmpestri'
> +.*:147: Error: register type mismatch for `vpcmpestrm'
> +.*:148: Error: register type mismatch for `vperm2f128'
> +.*:149: Error: register type mismatch for `vphaddd'
> +.*:150: Error: register type mismatch for `vphaddsw'
> +.*:151: Error: register type mismatch for `vphaddw'
> +.*:152: Error: register type mismatch for `vphsubd'
> +.*:153: Error: register type mismatch for `vphsubsw'
> +.*:154: Error: register type mismatch for `vphsubw'
> +.*:155: Error: register type mismatch for `vphaddd'
> +.*:156: Error: register type mismatch for `vphaddsw'
> +.*:157: Error: register type mismatch for `vphaddw'
> +.*:158: Error: register type mismatch for `vphsubd'
> +.*:159: Error: register type mismatch for `vphsubsw'
> +.*:160: Error: register type mismatch for `vphsubw'
> +.*:161: Error: register type mismatch for `vphminposuw'
> +.*:162: Error: register type mismatch for `vpmovmskb'
> +.*:163: Error: register type mismatch for `vpmovmskb'
> +.*:164: Error: register type mismatch for `vpsignb'
> +.*:165: Error: register type mismatch for `vpsignw'
> +.*:166: Error: register type mismatch for `vpsignd'
> +.*:167: Error: register type mismatch for `vpsignb'
> +.*:168: Error: register type mismatch for `vpsignw'
> +.*:169: Error: register type mismatch for `vpsignd'
> +.*:170: Error: register type mismatch for `vptest'
> +.*:171: Error: register type mismatch for `vptest'
> +.*:172: Error: register type mismatch for `vrcpps'
> +.*:173: Error: register type mismatch for `vrcpps'
> +.*:174: Error: register type mismatch for `vrcpss'
> +.*:175: Error: register type mismatch for `vrsqrtps'
> +.*:176: Error: register type mismatch for `vrsqrtps'
> +.*:177: Error: register type mismatch for `vrsqrtss'
> +.*:178: Error: register type mismatch for `vstmxcsr'
> +.*:179: Error: register type mismatch for `vtestps'
> +.*:180: Error: register type mismatch for `vtestps'
> +.*:181: Error: register type mismatch for `vtestpd'
> +.*:182: Error: register type mismatch for `vtestps'
> +.*:183: Error: register type mismatch for `vtestpd'
> +.*:184: Error: register type mismatch for `vpblendd'
> +.*:185: Error: register type mismatch for `vpblendd'
> +.*:186: Error: register type mismatch for `vperm2i128'
> +.*:187: Error: register type mismatch for `vpmaskmovd'
> +.*:188: Error: register type mismatch for `vpmaskmovd'
> +.*:189: Error: register type mismatch for `vpmaskmovq'
> +.*:190: Error: register type mismatch for `vpmaskmovq'
> +.*:191: Error: register type mismatch for `vpmaskmovd'
> +.*:192: Error: register type mismatch for `vpmaskmovd'
> +.*:193: Error: register type mismatch for `vpmaskmovq'
> +.*:194: Error: register type mismatch for `vpmaskmovq'
> +.*:195: Error: register type mismatch for `vaesimc'
> +.*:196: Error: register type mismatch for `vaeskeygenassist'
> +.*:197: Error: register type mismatch for `vroundpd'
> +.*:198: Error: register type mismatch for `vroundps'
> +.*:199: Error: register type mismatch for `vroundsd'
> +.*:200: Error: register type mismatch for `vroundss'
> +.*:201: Error: register type mismatch for `vpcmpistri'
> +.*:202: Error: register type mismatch for `vpcmpistrm'
> +.*:203: Error: register type mismatch for `vpcmpeqb'
> +.*:204: Error: register type mismatch for `vpcmpeqw'
> +.*:205: Error: register type mismatch for `vpcmpeqd'
> +.*:206: Error: register type mismatch for `vpcmpeqq'
> +.*:207: Error: register type mismatch for `vpcmpgtb'
> +.*:208: Error: register type mismatch for `vpcmpgtw'
> +.*:209: Error: register type mismatch for `vpcmpgtd'
> +.*:210: Error: register type mismatch for `vpcmpgtq'
> GAS LISTING .*
> #...
> -[ ]*1[ ]+\# Check Illegal 64bit APX instructions
> +[ ]*1[ ]+\# Check illegal 64bit APX instructions
> [ ]*2[ ]+\.text
> [ ]*3[ ]+\.arch \.noapx_f
> [ ]*4[ ]+test \$0x7, %r17d
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s
> index 5249b888046..cbac896fd28 100644
> --- a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s
> +++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s
> @@ -1,4 +1,4 @@
> -# Check Illegal 64bit APX instructions
> +# Check illegal 64bit APX instructions
> .text
> .arch .noapx_f
> test $0x7, %r17d
> @@ -16,3 +16,195 @@
> xsaveopt64 (%r16, %rbx)
> xsavec (%r16, %rbx)
> xsavec64 (%r16, %rbx)
> +#SSE
> + phaddw (%r17),%xmm0
> + phaddd (%r17),%xmm0
> + phaddsw (%r17),%xmm0
> + phsubw (%r17),%xmm0
> + pmaddubsw (%r17),%xmm0
> + pmulhrsw (%r17),%xmm0
> + pshufb (%r17),%xmm0
> + psignb (%r17),%xmm0
> + psignw (%r17),%xmm0
> + psignd (%r17),%xmm0
> + palignr $100,(%r17),%xmm6
> + pabsb (%r17),%xmm0
> + pabsw (%r17),%xmm0
> + pabsd (%r17),%xmm0
> + blendpd $100,(%r18),%xmm6
> + blendps $100,(%r18),%xmm6
> + blendvpd %xmm0,(%r19),%xmm6
> + blendvps %xmm0,(%r19),%xmm6
> + blendvpd (%r19),%xmm6
> + blendvps (%r19),%xmm6
> + dppd $100,(%r20),%xmm6
> + dpps $100,(%r20),%xmm6
> + extractps $100,%xmm4,(%r21)
> + extractps $100,%xmm4,%r21
> + insertps $100,(%r21),%xmm6
> + movntdqa (%r21),%xmm4
> + mpsadbw $100,(%r21),%xmm6
> + packusdw (%r21),%xmm6
> + pblendvb %xmm0,(%r22),%xmm6
> + pblendvb (%r22),%xmm6
> + pblendw $100,(%r22),%xmm6
> + pcmpeqq (%r22),%xmm6
> + pextrb $100,%xmm4,(%r22)
> + pextrw $100,%xmm4,(%r22)
> + pextrb $100,%xmm4,%r22
Would be nice to stick to strict alphabetic sorting.
> + pextrd $100,%xmm4,%r22d
> + pextrd $100,%xmm4,(%r22)
pextrq?
> + phminposuw (%r23),%xmm4
> + pinsrb $100,%r23,%xmm4
> + pinsrb $100,(%r23),%xmm4
> + pinsrd $100, %r23d, %xmm4
> + pinsrd $100,(%r23),%xmm4
> + pinsrq $100, %r24, %xmm4
> + pinsrq $100,(%r24),%xmm4
> + pmaxsb (%r24),%xmm6
> + pmaxsd (%r24),%xmm6
> + pmaxud (%r24),%xmm6
> + pmaxuw (%r24),%xmm6
> + pminsb (%r24),%xmm6
> + pminsd (%r24),%xmm6
> + pminud (%r24),%xmm6
> + pminuw (%r24),%xmm6
> + pmovsxbw (%r24),%xmm4
> + pmovsxbd (%r24),%xmm4
> + pmovsxbq (%r24),%xmm4
> + pmovsxwd (%r24),%xmm4
> + pmovsxwq (%r24),%xmm4
> + pmovsxdq (%r24),%xmm4
> + pmovsxbw (%r24),%xmm4
> + pmovzxbd (%r24),%xmm4
> + pmovzxbq (%r24),%xmm4
> + pmovzxwd (%r24),%xmm4
> + pmovzxwq (%r24),%xmm4
> + pmovzxdq (%r24),%xmm4
> + pmuldq (%r24),%xmm4
> + pmulld (%r24),%xmm4
> + roundpd $100,(%r24),%xmm6
> + roundps $100,(%r24),%xmm6
> + roundsd $100,(%r24),%xmm6
> + roundss $100,(%r24),%xmm6
> + pcmpgtq (%r25),%xmm4
> + pcmpestri $100,(%r25),%xmm6
> + pcmpestrm $100,(%r25),%xmm6
> + pcmpistri $100,(%r25),%xmm6
> + pcmpistrm $100,(%r25),%xmm6
For these last five - again would be nice to stick to strict alphabetic sorting.
(I was almost going to as where pcmpeqq is.)
> +#AES
> + aesdec (%r26),%xmm6
> + aesdeclast (%r26),%xmm6
> + aesenc (%r26),%xmm6
> + aesenclast (%r26),%xmm6
> + aesimc (%r26),%xmm6
> + aeskeygenassist $100,(%r26),%xmm6
> + pclmulqdq $100,(%r26),%xmm6
> + pclmullqlqdq (%r26),%xmm6
> + pclmulhqlqdq (%r26),%xmm6
> + pclmullqhqdq (%r26),%xmm6
> + pclmulhqhqdq (%r26),%xmm6
> +#GFNI
> + gf2p8affineqb $100,(%r26),%xmm6
> + gf2p8affineinvqb $100,(%r26),%xmm6
> + gf2p8mulb (%r26),%xmm6
> +#VEX without evex
> + vblendpd $7,(%r27),%xmm6,%xmm2
> + vblendpd $7,(%r27),%ymm6,%ymm2
> + vblendps $7,(%r27),%xmm6,%xmm2
> + vblendps $7,(%r27),%ymm6,%ymm2
> + vblendvpd %xmm4,(%r27),%xmm2,%xmm7
> + vblendvpd %ymm4,(%r27),%ymm2,%ymm7
> + vblendvps %xmm4,(%r27),%xmm2,%xmm7
> + vblendvps %ymm4,(%r27),%ymm2,%ymm7
> + vdppd $7,(%r27),%xmm6,%xmm2
> + vdpps $7,(%r27),%xmm6,%xmm2
> + vdpps $7,(%r27),%ymm6,%ymm2
> + vhaddpd (%r27),%xmm6,%xmm5
> + vhaddpd (%r27),%ymm6,%ymm5
> + vhsubps (%r27),%xmm6,%xmm5
> + vhsubps (%r27),%ymm6,%ymm5
> + vlddqu (%r27),%xmm4
> + vlddqu (%r27),%ymm4
> + vldmxcsr (%r27)
Are the designers not intending to reconsider this (and vstmxcsr), getting
on par with {ld,st}tilecfg? Even more generally I wonder if things shouldn't
remain less inconsistent. After all most major opcodes haven't been re-used,
so adding (less-than-512-bit) EVEX equivalents would only seem reasonable to
me. I'll be really curious how this asymmetry is going to be dealt with in
gcc, in a way still permitting sane inline assembly use.
> + vmaskmovpd (%r27),%xmm4,%xmm6
> + vmaskmovpd %xmm4,%xmm6,(%r27)
> + vmaskmovps (%r27),%xmm4,%xmm6
> + vmaskmovps %xmm4,%xmm6,(%r27)
> + vmaskmovpd (%r27),%ymm4,%ymm6
> + vmaskmovpd %ymm4,%ymm6,(%r27)
> + vmaskmovps (%r27),%ymm4,%ymm6
> + vmaskmovps %ymm4,%ymm6,(%r27)
> + vmovmskpd %xmm4,%r27d
> + vmovmskpd %xmm8,%r27d
> + vmovmskps %xmm4,%r27d
> + vmovmskps %ymm8,%r27d
> + vpblendvb %xmm4,(%r27),%xmm2,%xmm7
> + vpblendvb %ymm4,(%r27),%ymm2,%ymm7
> + vpblendw $7,(%r27),%xmm6,%xmm2
> + vpblendw $7,(%r27),%ymm6,%ymm2
> + vpcmpestri $7,(%r27),%xmm6
> + vpcmpestrm $7,(%r27),%xmm6
> + vperm2f128 $7,(%r27),%ymm6,%ymm2
> + vphaddd (%r27),%xmm6,%xmm7
> + vphaddsw (%r27),%xmm6,%xmm7
> + vphaddw (%r27),%xmm6,%xmm7
> + vphsubd (%r27),%xmm6,%xmm7
> + vphsubsw (%r27),%xmm6,%xmm7
> + vphsubw (%r27),%xmm6,%xmm7
> + vphaddd (%r27),%ymm6,%ymm7
> + vphaddsw (%r27),%ymm6,%ymm7
> + vphaddw (%r27),%ymm6,%ymm7
> + vphsubd (%r27),%ymm6,%ymm7
> + vphsubsw (%r27),%ymm6,%ymm7
> + vphsubw (%r27),%ymm6,%ymm7
> + vphminposuw (%r27),%xmm6
> + vpmovmskb %xmm4,%r27
> + vpmovmskb %ymm4,%r27d
> + vpsignb (%r27),%xmm6,%xmm7
> + vpsignw (%r27),%xmm6,%xmm7
> + vpsignd (%r27),%xmm6,%xmm7
> + vpsignb (%r27),%xmm6,%xmm7
> + vpsignw (%r27),%xmm6,%xmm7
> + vpsignd (%r27),%xmm6,%xmm7
> + vptest (%r27),%xmm6
> + vptest (%r27),%ymm6
> + vrcpps (%r27),%xmm6
> + vrcpps (%r27),%ymm6
> + vrcpss (%r27),%xmm6,%xmm6
> + vrsqrtps (%r27),%xmm6
> + vrsqrtps (%r27),%ymm6
> + vrsqrtss (%r27),%xmm6,%xmm6
> + vstmxcsr (%r27)
> + vtestps (%r27),%xmm6
> + vtestps (%r27),%ymm6
> + vtestpd (%r27),%xmm6
> + vtestps (%r27),%ymm6
> + vtestpd (%r27),%ymm6
> + vpblendd $7,(%r27),%xmm6,%xmm2
> + vpblendd $7,(%r27),%ymm6,%ymm2
> + vperm2i128 $7,(%r27),%ymm6,%ymm2
> + vpmaskmovd (%r27),%xmm4,%xmm6
> + vpmaskmovd %xmm4,%xmm6,(%r27)
> + vpmaskmovq (%r27),%xmm4,%xmm6
> + vpmaskmovq %xmm4,%xmm6,(%r27)
> + vpmaskmovd (%r27),%ymm4,%ymm6
> + vpmaskmovd %ymm4,%ymm6,(%r27)
> + vpmaskmovq (%r27),%ymm4,%ymm6
> + vpmaskmovq %ymm4,%ymm6,(%r27)
> + vaesimc (%r27), %xmm3
> + vaeskeygenassist $7,(%r27),%xmm3
> + vroundpd $100,(%r24),%xmm6
> + vroundps $100,(%r24),%xmm6
> + vroundsd $100,(%r24),%xmm6,%xmm3
> + vroundss $100,(%r24),%xmm6,%xmm3
For these I wonder if they shouldn't be accepted (with in-range immediate)
and converted to vrndscale*. Imo the spec could even mandate (or at least
suggest) this.
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s
> @@ -0,0 +1,18 @@
> +# Check illegal 64bit APX EVEX promoted instructions
> + .text
> + .arch .apx_f
This doesn't have any effect (on this test), does it?
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-egpr.s
> @@ -0,0 +1,25 @@
> +# Check 64bit old evex instructions use gpr32 with evex prefix encoding
> +
> + .allow_index_reg
> + .text
> +_start:
> +## MRMDestMem
> + vextractf32x4 $1, %zmm0, (%r16,%r17)
> +## MRMSrcMem
> + vbroadcasti32x4 (%r16,%r17), %zmm0
> +## MRM0m
> + vprorq $0, (%r16,%r17), %zmm0
> +## MRM1m
> + vprolq $0, (%r16,%r17), %zmm0
> +## MRM2m
> + vpsrlq $0, (%r16,%r17), %zmm0
> +## MRM3m
> + vpsrldq $0, (%r16,%r17), %zmm0
> +## MRM4m
> + vpsraq $0, (%r16,%r17), %zmm0
> +## MRM6m
> + vpsllq $0, (%r16,%r17), %zmm0
> +## MRM7m
> + vpslldq $0, (%r16,%r17), %zmm0
> +## MRMDestReg
> + vextractps $1, %xmm16, %r16d
What is the purpose of this test? Using all the same base and index
registers isn't really covering very much. I'm also missing a GPR-is-
source case (e.g. vpinsr*). And finally (I think I commented on this
elsewhere already) can the comments please be made meaningful, without
needing to guess what the acronyms are to be decoded to?
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
> @@ -0,0 +1,1464 @@
> +# Check 64bit APX_F EVEX-Promoted instructions.
> +
> + .text
> +_start:
> + aadd %r25d,0x123(%r31,%rax,4) #APX_F OPC_EVEX_EVEX
> + aadd %r31,0x123(%r31,%rax,4) #APX_F OPC_EVEX_EVEX
> + aand %r25d,0x123(%r31,%rax,4) #APX_F OPC_EVEX_EVEX
> + aand %r31,0x123(%r31,%rax,4) #APX_F OPC_EVEX_EVEX
> + adc $0x7b,%r16b #APX_F OPC_EVEX_EVEX
> + adc $0x7b,%r18w #APX_F OPC_EVEX_EVEX
> + adc $0x7b,%r25d #APX_F OPC_EVEX_EVEX
> + adc $0x7b,%r31 #APX_F OPC_EVEX_EVEX
> + adcb $0x7b,0x123(%r16,%rax,4) #APX_F OPC_EVEX_EVEX
> + adcw $0x7b,0x123(%r16,%rax,4) #APX_F OPC_EVEX_EVEX
> + adcl $0x7b,0x123(%r16,%rax,4) #APX_F OPC_EVEX_EVEX
> + adcq $0x7b,0x123(%r16,%rax,4) #APX_F OPC_EVEX_EVEX
> + adcw $0x7b,0x123(%r31,%rax,4) #APX_F OPC_EVEX_EVEX
> + adcl $0x7b,0x123(%r31,%rax,4) #APX_F OPC_EVEX_EVEX
> + adcq $0x7b,0x123(%r31,%rax,4) #APX_F OPC_EVEX_EVEX
If this 2nd triplet of adc* is useful, why no adcb? Also, like above:
- more variation of register use would imo be better (there's no egpr
index register here),
- comments want to be useful, or be dropped.
Speaking of comments, ...
> + adc %r16b,%dl #APX_F OPC_EVEX_EVEX
> + adc %r16b,0x123(%r31,%rax,4) #APX_F OPC_EVEX_EVEX
> + adc %r18w,%ax #APX_F OPC_EVEX_EVEX
> + adc %r18w,0x123(%r16,%rax,4) #APX_F OPC_EVEX_EVEX
> + adc %r18w,0x123(%r31,%rax,4) #APX_F OPC_EVEX_EVEX
> + adc %r25d,%edx #APX_F OPC_EVEX_EVEX
> + adc %r25d,0x123(%r31,%rax,4) #APX_F OPC_EVEX_EVEX
> + adc %r31,%r15 #APX_F OPC_EVEX_EVEX
> + adc %r31,0x123(%r31,%rax,4) #APX_F OPC_EVEX_EVEX
> + adc 0x123(%r16,%rax,4),%r16b #APX_F OPC_EVEX_EVEX
> + adc 0x123(%r16,%rax,4),%r31 #APX_F OPC_EVEX_EVEX
> + adc 0x123(%r31,%rax,4),%r18w #APX_F OPC_EVEX_EVEX
> + adc 0x123(%r31,%rax,4),%r25d #APX_F OPC_EVEX_EVEX
> + adc 0x123(%r31,%rax,4),%r31 #APX_F OPC_EVEX_EVEX
... the entire set of adc here doesn't encode as EVEX, but as REX2 (i.e.
the comments are outright wrong). As a result the EVEX encodings added
to the opcode table in the previous patch aren't being tested at all.
> --- a/gas/testsuite/gas/i386/x86-64-evex.d
> +++ b/gas/testsuite/gas/i386/x86-64-evex.d
> @@ -17,6 +17,6 @@ Disassembly of section .text:
> +[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6
> +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,\{rd-bad\},%xmm5,%xmm6
> +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6
> - +[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,\(bad\)
> + +[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,%r16d
> +[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,\(bad\)
If the line that's now disassembling okay cannot be replaced by a suitable
equivalent, it should be dropped rather than be adjusted. Furthermore such
an adjustment needs to be done right in the patch leading to the changed
output, or else things end up non-bisectable. (New tests are okay to add
in a separate patch.)
> --- a/gas/testsuite/gas/i386/x86-64-inval-movbe.l
> +++ b/gas/testsuite/gas/i386/x86-64-inval-movbe.l
> @@ -1,29 +1,30 @@
> .*: Assembler messages:
> -.*:4: Error: .*
> .*:5: Error: .*
> .*:6: Error: .*
> .*:7: Error: .*
> .*:8: Error: .*
> -.*:11: Error: .*
> +.*:9: Error: .*
> .*:12: Error: .*
> .*:13: Error: .*
> .*:14: Error: .*
> .*:15: Error: .*
> +.*:16: Error: .*
> GAS LISTING .*
>
>
> [ ]*1[ ]+\# Check illegal movbe in 64bit mode\.
> [ ]*2[ ]+\.text
> -[ ]*3[ ]+foo:
> -[ ]*4[ ]+movbe \(%rcx\),%bl
> -[ ]*5[ ]+movbe %ecx,%ebx
> -[ ]*6[ ]+movbe %bx,%rcx
> -[ ]*7[ ]+movbe %rbx,%rcx
> -[ ]*8[ ]+movbe %bl,\(%rcx\)
> -[ ]*9[ ]+
> -[ ]*10[ ]+\.intel_syntax noprefix
> -[ ]*11[ ]+movbe bl, byte ptr \[rcx\]
> -[ ]*12[ ]+movbe ebx, ecx
> -[ ]*13[ ]+movbe rcx, bx
> -[ ]*14[ ]+movbe rcx, rbx
> -[ ]*15[ ]+movbe byte ptr \[rcx\], bl
> +[ ]*3[ ]+\.arch \.noapx_f
> +[ ]*4[ ]+foo:
> +[ ]*5[ ]+movbe \(%rcx\),%bl
> +[ ]*6[ ]+movbe %ecx,%ebx
> +[ ]*7[ ]+movbe %bx,%rcx
> +[ ]*8[ ]+movbe %rbx,%rcx
> +[ ]*9[ ]+movbe %bl,\(%rcx\)
> +[ ]*10[ ]+
> +[ ]*11[ ]+\.intel_syntax noprefix
> +[ ]*12[ ]+movbe bl, byte ptr \[rcx\]
> +[ ]*13[ ]+movbe ebx, ecx
> +[ ]*14[ ]+movbe rcx, bx
> +[ ]*15[ ]+movbe rcx, rbx
> +[ ]*16[ ]+movbe byte ptr \[rcx\], bl
> --- a/gas/testsuite/gas/i386/x86-64-inval-movbe.s
> +++ b/gas/testsuite/gas/i386/x86-64-inval-movbe.s
> @@ -1,5 +1,6 @@
> # Check illegal movbe in 64bit mode.
> .text
> + .arch .noapx_f
> foo:
> movbe (%rcx),%bl
> movbe %ecx,%ebx
I don't understand the need for this addition (and hence for the need
to change the test's expecations). Like was mentioned on the original
AVX10 series, tests like this shall not need modification, or else it
indicates people's code also may need ".arch .noapx_f" additions, which
I'm sure you agree may not be required. Finally, if testcase expecations
like the above would be needed anywhere, please generalize them such that
a similar mere addition of a line doesn't require the entire test to be
touched. Here this means that while for the diagnostics you of course
want exact line number matches, for the actual listing line numbers don't
don't need matching individually.
Jan
next prev parent reply other threads:[~2023-09-27 13:12 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-19 15:25 [PATCH 0/8] [RFC] Support Intel APX EGPR Cui, Lili
2023-09-19 15:25 ` [PATCH 1/8] Support APX GPR32 with rex2 prefix Cui, Lili
2023-09-21 15:27 ` Jan Beulich
2023-09-27 15:57 ` Cui, Lili
2023-09-21 15:51 ` Jan Beulich
2023-09-27 15:59 ` Cui, Lili
2023-09-28 8:02 ` Jan Beulich
2023-10-07 3:27 ` Cui, Lili
2023-09-19 15:25 ` [PATCH 2/8] Support APX GPR32 with extend evex prefix Cui, Lili
2023-09-22 10:12 ` Jan Beulich
2023-10-17 15:48 ` Cui, Lili
2023-10-18 6:40 ` Jan Beulich
2023-10-18 10:44 ` Cui, Lili
2023-10-18 10:50 ` Jan Beulich
2023-09-22 10:50 ` Jan Beulich
2023-10-17 15:50 ` Cui, Lili
2023-10-17 16:11 ` Jan Beulich
2023-10-18 2:02 ` Cui, Lili
2023-10-18 6:10 ` Jan Beulich
2023-09-25 6:03 ` Jan Beulich
2023-10-17 15:52 ` Cui, Lili
2023-10-17 16:12 ` Jan Beulich
2023-10-18 6:31 ` Cui, Lili
2023-10-18 6:47 ` Jan Beulich
2023-10-18 7:52 ` Cui, Lili
2023-10-18 8:21 ` Jan Beulich
2023-10-18 11:30 ` Cui, Lili
2023-10-19 11:58 ` Cui, Lili
2023-10-19 15:24 ` Jan Beulich
2023-10-19 16:38 ` Cui, Lili
2023-10-20 6:25 ` Jan Beulich
2023-10-22 14:33 ` Cui, Lili
2023-09-19 15:25 ` [PATCH 3/8] Add tests for " Cui, Lili
2023-09-27 13:11 ` Jan Beulich [this message]
2023-10-17 15:53 ` FW: " Cui, Lili
2023-10-17 16:19 ` Jan Beulich
2023-10-18 2:32 ` Cui, Lili
2023-10-18 6:05 ` Jan Beulich
2023-10-18 7:16 ` Cui, Lili
2023-10-18 8:05 ` Jan Beulich
2023-10-18 11:26 ` Cui, Lili
2023-10-18 12:06 ` Jan Beulich
2023-10-25 16:03 ` Cui, Lili
2023-09-27 13:19 ` Jan Beulich
2023-09-19 15:25 ` [PATCH 4/8] Support APX NDD Cui, Lili
2023-09-27 14:44 ` Jan Beulich
2023-10-22 14:05 ` Cui, Lili
2023-10-23 7:12 ` Jan Beulich
2023-10-25 8:10 ` Cui, Lili
2023-10-25 8:47 ` Jan Beulich
2023-10-25 15:49 ` Cui, Lili
2023-10-25 15:59 ` Jan Beulich
2023-09-28 7:57 ` Jan Beulich
2023-10-22 14:57 ` Cui, Lili
2023-10-24 11:39 ` Cui, Lili
2023-10-24 11:58 ` Jan Beulich
2023-10-25 15:29 ` Cui, Lili
2023-09-19 15:25 ` [PATCH 5/8] Support APX NDD optimized encoding Cui, Lili
2023-09-28 9:29 ` Jan Beulich
2023-10-23 2:57 ` Hu, Lin1
2023-10-23 7:23 ` Jan Beulich
2023-10-23 7:50 ` Hu, Lin1
2023-10-23 8:15 ` Jan Beulich
2023-10-24 1:40 ` Hu, Lin1
2023-10-24 6:03 ` Jan Beulich
2023-10-24 6:08 ` Hu, Lin1
2023-10-23 3:07 ` [PATCH-V2] " Hu, Lin1
2023-10-23 3:30 ` [PATCH 5/8] [v2] " Hu, Lin1
2023-10-23 7:26 ` Jan Beulich
2023-09-19 15:25 ` [PATCH 6/8] Support APX Push2/Pop2 Cui, Lili
2023-09-28 11:37 ` Jan Beulich
2023-10-30 15:21 ` Cui, Lili
2023-10-30 15:31 ` Jan Beulich
2023-11-20 13:05 ` Cui, Lili
2023-09-19 15:25 ` [PATCH 7/8] Support APX NF Cui, Lili
2023-09-25 6:07 ` Jan Beulich
2023-09-28 12:42 ` Jan Beulich
2023-11-02 10:15 ` Cui, Lili
2023-11-02 10:23 ` Jan Beulich
2023-11-02 10:46 ` Cui, Lili
2023-12-12 2:59 ` H.J. Lu
2023-09-19 15:25 ` [PATCH 8/8] Support APX JMPABS Cui, Lili
2023-09-28 13:11 ` Jan Beulich
2023-11-02 2:32 ` Hu, Lin1
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