[Bug target/109725] New: [14 Regression] ICE: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4430

[Bug target/109725] New: [14 Regression] ICE: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4430

[zsojka at seznam dot cz]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109725

            Bug ID: 109725
           Summary: [14 Regression] ICE: RTL check: expected code
                    'const_int', have 'reg' in riscv_print_operand, at
                    config/riscv/riscv.cc:4430
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Keywords: build, ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: zsojka at seznam dot cz
  Target Milestone: ---
              Host: x86_64-pc-linux-gnu
            Target: riscv64-unknown-linux-gnu

RTL checking might need to be enabled.
This currently breaks build with RTL checking enabled.

Compiler output:
$ echo 'void foo(void) {}' | /repo/build-gcc-trunk-riscv64/./gcc/cc1 -quiet -
during RTL pass: final
<stdin>: In function 'foo':
<stdin>:1:17: internal compiler error: RTL check: expected code 'const_int',
have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4430
0x8296e1 rtl_check_failed_code1(rtx_def const*, rtx_code, char const*, int,
char const*)
        /repo/gcc-trunk/gcc/rtl.cc:916
0x8cf1d3 riscv_print_operand
        /repo/gcc-trunk/gcc/config/riscv/riscv.cc:4430
0xdb4aa8 output_operand(rtx_def*, int)
        /repo/gcc-trunk/gcc/final.cc:3632
0xdb5508 output_asm_insn(char const*, rtx_def**)
        /repo/gcc-trunk/gcc/final.cc:3544
0xdb98f2 output_asm_insn(char const*, rtx_def**)
        /repo/gcc-trunk/gcc/final.cc:3421
0xdb98f2 final_scan_insn_1
        /repo/gcc-trunk/gcc/final.cc:2841
0xdb9c8b final_scan_insn(rtx_insn*, _IO_FILE*, int, int, int*)
        /repo/gcc-trunk/gcc/final.cc:2887
0xdb9ec4 final_1
        /repo/gcc-trunk/gcc/final.cc:1979
0xdbab08 rest_of_handle_final
        /repo/gcc-trunk/gcc/final.cc:4240
0xdbab08 execute
        /repo/gcc-trunk/gcc/final.cc:4318
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

$ /repo/build-gcc-trunk-riscv64/./gcc/xgcc -v
Using built-in specs.
COLLECT_GCC=/repo/build-gcc-trunk-riscv64/./gcc/xgcc
Target: riscv64-unknown-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++
--enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra
--with-cloog --with-ppl --with-isl --with-isa-spec=2.2
--with-sysroot=/usr/riscv64-unknown-linux-gnu --build=x86_64-pc-linux-gnu
--host=x86_64-pc-linux-gnu --target=riscv64-unknown-linux-gnu
--with-ld=/usr/bin/riscv64-unknown-linux-gnu-ld
--with-as=/usr/bin/riscv64-unknown-linux-gnu-as --disable-multilib
--disable-libstdcxx-pch
--prefix=/repo/gcc-trunk//binary-trunk-r14-467-20230504024653-g8c361179c01-checking-yes-rtl-df-extra-riscv64
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 14.0.0 20230504 (experimental) (GCC)

[Bug target/109725] [14 Regression] ICE: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4430

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109725

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2023-05-04
             Status|UNCONFIRMED                 |NEW
   Target Milestone|---                         |14.0
     Ever confirmed|0                           |1
           Keywords|                            |ice-checking

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Yes this is bad coding:
static void
riscv_print_operand (FILE *file, rtx op, int letter)
{
  /* `~` does not take an operand so op will be null
     Check for before accessing op.
  */
  if (letter == '~')
    {
      if (TARGET_64BIT)
        fputc('w', file);
      return;
    }
  machine_mode mode = GET_MODE (op);
  enum rtx_code code = GET_CODE (op);
  const enum memmodel model = memmodel_base (INTVAL (op));


model should only be defined where it is used rather than in the top.

[Bug target/109725] [14 Regression] ICE: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4430

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109725

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Dimitar Dimitrov <dimitar@gcc.gnu.org>:

https://gcc.gnu.org/g:7f26e76c9848aeea9ec10ea701a6168464a4a9c2

commit r14-1621-g7f26e76c9848aeea9ec10ea701a6168464a4a9c2
Author: Dimitar Dimitrov <dimitar@dinux.eu>
Date:   Mon Jun 5 21:39:16 2023 +0300

    riscv: Fix scope for memory model calculation

    During libgcc configure stage for riscv32-none-elf, when
    "--enable-checking=yes,rtl" has been activated, the following error
    is observed:

      during RTL pass: final
      conftest.c: In function 'main':
      conftest.c:16:1: internal compiler error: RTL check: expected code
'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4462
         16 | }
            | ^
      0x843c4d rtl_check_failed_code1(rtx_def const*, rtx_code, char const*,
int, char const*)
              /mnt/nvme/dinux/local-workspace/gcc/gcc/rtl.cc:916
      0x8ea823 riscv_print_operand
             
/mnt/nvme/dinux/local-workspace/gcc/gcc/config/riscv/riscv.cc:4462
      0xde84b5 output_operand(rtx_def*, int)
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3632
      0xde8ef8 output_asm_insn(char const*, rtx_def**)
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3544
      0xded33b output_asm_insn(char const*, rtx_def**)
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3421
      0xded33b final_scan_insn_1
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:2841
      0xded6cb final_scan_insn(rtx_insn*, _IO_FILE*, int, int, int*)
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:2887
      0xded8b7 final_1
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:1979
      0xdee518 rest_of_handle_final
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:4240
      0xdee518 execute
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:4318

    Fix by moving the calculation of memmodel to the cases where it is used.

    Regression tested for riscv32-none-elf. No changes in gcc.sum and
    g++.sum.

            PR target/109725

    gcc/ChangeLog:

            * config/riscv/riscv.cc (riscv_print_operand): Calculate
            memmodel only when it is valid.

    Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>

[Bug target/109725] [14 Regression] ICE: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4430

[dimitar at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109725

Dimitar Dimitrov <dimitar at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|NEW                         |RESOLVED

--- Comment #3 from Dimitar Dimitrov <dimitar at gcc dot gnu.org> ---
Should be fixed now.

[Bug target/109725] [14 Regression] ICE: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4430

[xuli1 at eswincomputing dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109725

xuli1 at eswincomputing dot com <xuli1 at eswincomputing dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |xuli1 at eswincomputing dot com

--- Comment #4 from xuli1 at eswincomputing dot com <xuli1 at eswincomputing dot com> ---
The gcc-13 branch also has the same issue
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111161), can I backport this
patch to gcc-13？

[Bug target/109725] [14 Regression] ICE: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4430

[xuli1 at eswincomputing dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109725

--- Comment #5 from xuli1 at eswincomputing dot com <xuli1 at eswincomputing dot com> ---
(In reply to xuli1@eswincomputing.com from comment #4)
> The gcc-13 branch also has the same issue
> (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111161), can I backport this
> patch to gcc-13？

@kito.cheng@gmail.com @juzhe.zhong@rivai.ai @dimitar@gcc.gnu.org

[Bug target/109725] [14 Regression] ICE: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4430

[kito at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109725

Kito Cheng <kito at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |kito at gcc dot gnu.org

--- Comment #6 from Kito Cheng <kito at gcc dot gnu.org> ---
Ok for back port :)

[Bug target/109725] [14 Regression] ICE: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4430

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109725

--- Comment #7 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-13 branch has been updated by Li Xu <xuli@gcc.gnu.org>:

https://gcc.gnu.org/g:b81d476756a1f17617f0837761785c4b5d1d195d

commit r13-7766-gb81d476756a1f17617f0837761785c4b5d1d195d
Author: Dimitar Dimitrov <dimitar@dinux.eu>
Date:   Mon Jun 5 21:39:16 2023 +0300

    riscv: Fix scope for memory model calculation

    During libgcc configure stage for riscv32-none-elf, when
    "--enable-checking=yes,rtl" has been activated, the following error
    is observed:

      during RTL pass: final
      conftest.c: In function 'main':
      conftest.c:16:1: internal compiler error: RTL check: expected code
'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4462
         16 | }
            | ^
      0x843c4d rtl_check_failed_code1(rtx_def const*, rtx_code, char const*,
int, char const*)
              /mnt/nvme/dinux/local-workspace/gcc/gcc/rtl.cc:916
      0x8ea823 riscv_print_operand
             
/mnt/nvme/dinux/local-workspace/gcc/gcc/config/riscv/riscv.cc:4462
      0xde84b5 output_operand(rtx_def*, int)
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3632
      0xde8ef8 output_asm_insn(char const*, rtx_def**)
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3544
      0xded33b output_asm_insn(char const*, rtx_def**)
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3421
      0xded33b final_scan_insn_1
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:2841
      0xded6cb final_scan_insn(rtx_insn*, _IO_FILE*, int, int, int*)
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:2887
      0xded8b7 final_1
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:1979
      0xdee518 rest_of_handle_final
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:4240
      0xdee518 execute
              /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:4318

    Fix by moving the calculation of memmodel to the cases where it is used.

    Regression tested for riscv32-none-elf. No changes in gcc.sum and
    g++.sum.

            PR target/109725

    gcc/ChangeLog:

            * config/riscv/riscv.cc (riscv_print_operand): Calculate
            memmodel only when it is valid.

    Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>