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From: "xuli1 at eswincomputing dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/110751] New: RISC-V: Suport undefined value that allows VSETVL PASS use TA/MA
Date: Thu, 20 Jul 2023 09:03:43 +0000	[thread overview]
Message-ID: <bug-110751-4@http.gcc.gnu.org/bugzilla/> (raw)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110751

            Bug ID: 110751
           Summary: RISC-V: Suport undefined value that allows VSETVL PASS
                    use TA/MA
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: xuli1 at eswincomputing dot com
  Target Milestone: ---

Created attachment 55588
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55588&action=edit
testcase

Zhong has merged two auto-vectorization patches:
https://github.com/gcc-mirror/gcc/commit/0d4dd7e07a879d6c07a33edb2799710faa95651e
https://github.com/gcc-mirror/gcc/commit/44f244e4672578be6cc513104473981790a1c164


Consider this following case:
#include <stdint-gcc.h>

  __attribute__((noipa))
  void vrem_int8_t (int8_t * __restrict dst, int8_t * __restrict a, int8_t *
__restrict b, int n)
  {
    for (int i = 0; i < n; i++)
      dst[i] = a[i] % b[i];
  }

vrem_int8_t:
  ble a3,zero,.L5
.L3:
  vsetvli a5,a3,e8,m1,tu,ma  --> tu here
  vle8.v v1,0(a1)
  vle8.v v2,0(a2)
  sub a3,a3,a5
  vrem.vv v1,v1,v2
  vse8.v v1,0(a0)
  add a1,a1,a5
  add a2,a2,a5
  add a0,a0,a5
  bne a3,zero,.L3
.L5:
  ret

Currently, the return value of TARGET_PREFERRED_ELSE_VALUE targethook is not
ideal for RVV since it will let VSETVL PASS use MU or TU. We want to suport
undefined value that allows VSETVL PASS use TA/MA.

According to Zhong's advice, there are two approachs:
1.Add a new tree code representing undefined value, like
  DEFTREECODE (UNDEF_TYPE, "undef_type", tcc_type, 0).
2.Modify the targethook TARGET_PREFERRED_ELSE_VALUE to support passing in a GSI
parameter. (Currently only the aarch64 and riscv architectures implement this
hook), In this way, we can build an RVV intrinsic __riscv_vundefine in the
RISCV backend, so that the backend can automatically recognize undefine and use
TA in VSETVL instruction.

Which approach is better? Looking forward to your advice, thanks.

             reply	other threads:[~2023-07-20  9:03 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-20  9:03 xuli1 at eswincomputing dot com [this message]
2023-07-20  9:10 ` [Bug target/110751] " juzhe.zhong at rivai dot ai
2023-07-20  9:30 ` rguenth at gcc dot gnu.org
2023-07-20  9:37 ` rguenth at gcc dot gnu.org
2023-07-20  9:58 ` kito at gcc dot gnu.org
2023-07-20 11:28 ` rguenther at suse dot de
2023-07-20 11:43 ` juzhe.zhong at rivai dot ai
2023-07-20 12:00 ` juzhe.zhong at rivai dot ai
2023-07-20 12:35 ` rguenther at suse dot de
2023-07-20 12:42 ` juzhe.zhong at rivai dot ai
2023-07-20 12:45 ` rguenther at suse dot de
2023-07-20 12:50 ` juzhe.zhong at rivai dot ai
2023-07-20 12:56 ` rguenther at suse dot de
2023-07-20 13:29 ` rsandifo at gcc dot gnu.org
2023-07-20 13:32 ` rguenther at suse dot de
2023-07-20 22:03 ` juzhe.zhong at rivai dot ai
2023-07-21  1:53 ` xuli1 at eswincomputing dot com
2023-07-21  6:17 ` rguenth at gcc dot gnu.org
2023-07-21 12:47 ` rsandifo at gcc dot gnu.org
2023-07-21 12:53 ` rguenth at gcc dot gnu.org
2023-07-21 13:23 ` rsandifo at gcc dot gnu.org
2023-07-24  6:20 ` rguenther at suse dot de
2023-07-25  7:05 ` juzhe.zhong at rivai dot ai
2023-09-12 11:44 ` juzhe.zhong at rivai dot ai
2023-09-12 14:24 ` rsandifo at gcc dot gnu.org
2023-09-12 14:53 ` juzhe.zhong at rivai dot ai
2023-09-12 15:59 ` rsandifo at gcc dot gnu.org
2023-09-12 16:21 ` juzhe.zhong at rivai dot ai
2023-09-12 16:27 ` juzhe.zhong at rivai dot ai
2023-09-12 16:31 ` juzhe.zhong at rivai dot ai
2023-09-12 22:44 ` juzhe.zhong at rivai dot ai
2023-09-13  7:56 ` rguenth at gcc dot gnu.org
2023-09-13  8:34 ` juzhe.zhong at rivai dot ai
2023-09-13  8:39 ` juzhe.zhong at rivai dot ai
2023-09-13  9:38 ` rguenth at gcc dot gnu.org
2023-09-13  9:39 ` rguenth at gcc dot gnu.org
2023-09-13  9:48 ` juzhe.zhong at rivai dot ai
2023-09-13  9:48 ` juzhe.zhong at rivai dot ai
2023-09-13 10:15 ` rguenther at suse dot de
2023-09-13 22:39 ` rsandifo at gcc dot gnu.org
2023-09-14  8:53 ` juzhe.zhong at rivai dot ai
2023-09-14  9:15 ` richard.sandiford at arm dot com
2023-09-20 16:27 ` cvs-commit at gcc dot gnu.org
2023-09-21  9:13 ` cvs-commit at gcc dot gnu.org
2023-09-21  9:28 ` juzhe.zhong at rivai dot ai
2023-09-22  7:31 ` xuli1 at eswincomputing dot com
2023-09-22  7:33 ` xuli1 at eswincomputing dot com

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