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From: "juzhe.zhong at rivai dot ai" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/110751] RISC-V: Suport undefined value that allows VSETVL PASS use TA/MA
Date: Wed, 13 Sep 2023 09:48:32 +0000 [thread overview]
Message-ID: <bug-110751-4-2QtNnsFLtC@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-110751-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110751
--- Comment #36 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
(In reply to Richard Biener from comment #34)
> The ELSE value of type TYPE would be constructed like
>
> tree var = create_tmp_var (type);
> tree else_val = get_or_create_ssa_default_def (cfun, var);
>
> I'm not sure const0_rtx is a good representation on RTL - how would
> you distinguish that from a conditional operation on an integer vector
> with else value zero? Say for an integer division?
My current approach is that I passed scalar 0 to the ELSE VALUE.
So in the I relax the operand predicate of the cond_len else operand:
it can be either a register_operand has VECTOR_MODE or a const_int 0 (Note that
it
can't be the CONST_VECTOR).
So, I can distinguish the else operand. If it is a scalar const_int 0, it is
undefine. Otherwise, it is always a register operand with a vector mode.
next prev parent reply other threads:[~2023-09-13 9:48 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-20 9:03 [Bug target/110751] New: " xuli1 at eswincomputing dot com
2023-07-20 9:10 ` [Bug target/110751] " juzhe.zhong at rivai dot ai
2023-07-20 9:30 ` rguenth at gcc dot gnu.org
2023-07-20 9:37 ` rguenth at gcc dot gnu.org
2023-07-20 9:58 ` kito at gcc dot gnu.org
2023-07-20 11:28 ` rguenther at suse dot de
2023-07-20 11:43 ` juzhe.zhong at rivai dot ai
2023-07-20 12:00 ` juzhe.zhong at rivai dot ai
2023-07-20 12:35 ` rguenther at suse dot de
2023-07-20 12:42 ` juzhe.zhong at rivai dot ai
2023-07-20 12:45 ` rguenther at suse dot de
2023-07-20 12:50 ` juzhe.zhong at rivai dot ai
2023-07-20 12:56 ` rguenther at suse dot de
2023-07-20 13:29 ` rsandifo at gcc dot gnu.org
2023-07-20 13:32 ` rguenther at suse dot de
2023-07-20 22:03 ` juzhe.zhong at rivai dot ai
2023-07-21 1:53 ` xuli1 at eswincomputing dot com
2023-07-21 6:17 ` rguenth at gcc dot gnu.org
2023-07-21 12:47 ` rsandifo at gcc dot gnu.org
2023-07-21 12:53 ` rguenth at gcc dot gnu.org
2023-07-21 13:23 ` rsandifo at gcc dot gnu.org
2023-07-24 6:20 ` rguenther at suse dot de
2023-07-25 7:05 ` juzhe.zhong at rivai dot ai
2023-09-12 11:44 ` juzhe.zhong at rivai dot ai
2023-09-12 14:24 ` rsandifo at gcc dot gnu.org
2023-09-12 14:53 ` juzhe.zhong at rivai dot ai
2023-09-12 15:59 ` rsandifo at gcc dot gnu.org
2023-09-12 16:21 ` juzhe.zhong at rivai dot ai
2023-09-12 16:27 ` juzhe.zhong at rivai dot ai
2023-09-12 16:31 ` juzhe.zhong at rivai dot ai
2023-09-12 22:44 ` juzhe.zhong at rivai dot ai
2023-09-13 7:56 ` rguenth at gcc dot gnu.org
2023-09-13 8:34 ` juzhe.zhong at rivai dot ai
2023-09-13 8:39 ` juzhe.zhong at rivai dot ai
2023-09-13 9:38 ` rguenth at gcc dot gnu.org
2023-09-13 9:39 ` rguenth at gcc dot gnu.org
2023-09-13 9:48 ` juzhe.zhong at rivai dot ai [this message]
2023-09-13 9:48 ` juzhe.zhong at rivai dot ai
2023-09-13 10:15 ` rguenther at suse dot de
2023-09-13 22:39 ` rsandifo at gcc dot gnu.org
2023-09-14 8:53 ` juzhe.zhong at rivai dot ai
2023-09-14 9:15 ` richard.sandiford at arm dot com
2023-09-20 16:27 ` cvs-commit at gcc dot gnu.org
2023-09-21 9:13 ` cvs-commit at gcc dot gnu.org
2023-09-21 9:28 ` juzhe.zhong at rivai dot ai
2023-09-22 7:31 ` xuli1 at eswincomputing dot com
2023-09-22 7:33 ` xuli1 at eswincomputing dot com
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