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* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-29 1:47 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-29 1:47 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:2ae699c011a3a3a6c58b546d4844b94f53b07df6
commit 2ae699c011a3a3a6c58b546d4844b94f53b07df6
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jul 28 21:47:30 2022 -0400
Update ChangeLog.meissner.
2022-07-28 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 91 ++++++++++----------------------------------------
1 file changed, 17 insertions(+), 74 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index b791c21e08c..25213466458 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,92 +1,35 @@
-==================== work095, patch #13.
-
-Mangle __ibm128 into u8__ibm128.
-
-2022-07-28 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs600.cc (rs6000_mangle_type): Mangle __ibm128 into
- "u8__ibm128".
-
-==================== work095, patch #12.
-
-Enable using overload built-ins for 128-bit floating point.
-
-2022-07-28 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Remove all
- of the code that changed KFmode built-in functions into TFmode, since
- these functions now support overloading between KFmode and TFmode.
- * config/rs6000/rs6000-c.cc (rs6000_builtin_type_compatible):
- Don't consider _Float128 and long double under
- -mabi=ieeelongdouble to be compatible for built-in functions. Use
- overloading instead.
- * config/rs6000/rs6000.md (IFKF): Delete.
- (IFKF_reg): Delete.
- (@extenddf<mode>2_fprs): Remove extra test for
- TARGET_LONG_DOUBLE_128.
- (@extenddf<mode2>_vsx): Likewise.
- (extendiftf2): Allow __ibm128 even if _Float128 is not supported.
- (extendkfif2): New insn.
- (extendtfkf2): Allow __ibm128 even if _Float128 is not supported.
- (extendtfif2): Likewise.
- (trunckfif2): New insn.
- (trunctfif2): Allow __ibm128 even if _Float128 is not supported.
- (extendkftf2_internal): Split extend<mode>tf2_internal and
- extendtf<mode>2_internal into separate insns that handle either
- conversions between IEEE 128-bit types or between IBM 128-bit types.
- Set the type and insn length correctly.
- (extendtfkf2_internal): Likewise.
- (extendiftf2_internal): Likewise.
- (extendtfif2_internal): Likewise.
-
-==================== work095, patch #11.
+==================== work095, patch #14.
Make __float128 and __ibm128 use different types from long double.
+This set of patches goes through to allow the use of __ibm128 if we don't have
+IEEE 128-bit support enabled, but long double uses the IBM 128-bit support.
+
2022-07-28 Michael Meissner <meissner@linux.ibm.com>
gcc/
- * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always
- create a new tree node for __ibm128, even if long double uses the IBM
- 128-bit format. Always create a new tree node for __float128, even if
- long double uses the IEEE 128-bit format.
- * config/rs6000/rs600.cc (init_float128_ibm): Remove checks for
- hardware floating point for the IBM 128-bit comparisons.
- (init_float128_ieee): Do not create __mulkc3 and __divkc3 since
- __float128 always creates these functions.
- (rs6000_init_libfuncs): Create complex multiply and divide for long
- double if long double uses the IEEE 128-bit encoding.
+ * config/rs6000/rs600.cc (init_float128_ibm): Remove checks for hardware
+ floating point for the IBM 128-bit comparisons.
+ (rs6000_init_libfuncs): Create IBM 128-bit floating point support even
+ if we don't support IEEE 128-bit floating point.
(rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't
support _Float128.
- (rs6000_libgcc_floating_mode_supported_p): Allow KFmode if IEEE
- 128-bit floating point is supported. Allow IFmode if either IEEE
- 128-bit floating point is supported or long double is IBM 128-bit.
- (rs6000_floatn_mode): Always return KFmode for IEEE 128-bit. Do not
- return TFmode, even if long double uses the IEEE 128-bit format.
- (rs6000_c_mode_for_suffix): The 'q' suffix always uses KFmode, even if
- long double uses the IEEE 128-bit encoding.
* config/rs6000/rs6000.h (FLOAT128_IBM_P): Remove checks for
-mhard-float.
(TARGET_IBM128): New macro.
+ * config/rs6000/rs6000.md (@extenddf<mode>2_fprs): Allow IFmode to be
+ converted even if long double is not 128-bits.
+ (extenddf<mode>2_vsx): Likewise.
+ (extendtfif2): Allow conversion if we have __ibm128 but not IEEE 128-bit
+ floating point.
+ (trunckftf2): Likewise.
-gcc/testsuite/
-
- * gcc.target/powerpc/mulkd3-2.c: Update test.
- * gcc.target/powerpc/divkd3-2.c: Likewise.
+==================== work095, patch #13 was reverted.
-libgcc/
+==================== work095, patch #12 was reverted.
- * config/rs6000/float128-ifunc.c (__multc3_ieee128): Add ifunc
- support.
- (__divtc3_ieee128): Likewise.
- * config/rs6000/quad-float128.h (__multc3_ieee128): Add
- Declaration.
- (__divtc3_ieee128): Likewise.
+==================== work095, patch #11 was reverted.
==================== work095, patch #10.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-30 2:18 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-30 2:18 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:54bd5f493b28f7da4b2d7746d78bb53ce9a52750
commit 54bd5f493b28f7da4b2d7746d78bb53ce9a52750
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 29 22:18:25 2022 -0400
Update ChangeLog.meissner.
2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 100 +++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 100 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 838adb2229f..fb910a369ce 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,103 @@
+==================== work095, patch #19 was reverted.
+
+Make __float128 use a different type from long double.
+
+This patch changes GCC so that __float128 use different types internally than
+long double. In the past, GCC would use the long double type for __float128 if
+-mabi=ieeelongdouble was used.
+
+Currently we are not changing __ibm128 to have a separate type. There are some
+complications that need to be addressed (such as C++ mangling) before we can
+make the change for __ibm128.
+
+The rs6000 internal ieee128_float_type_node is deleted in favor of using the
+standard float128_type_node.
+
+I deleted the code in rs6000_expand_builtin which used to convert some built-in
+functions that used KFmode arguments to the equivalent built-in functions that
+used TFmode arguments if -mabi=ieeelongdouble. I also deleted the code that
+converted the built-ins that used IFmode arguments to the equivalant functions
+that used TFmode arguments if -mabi=ibmlongdouble.
+
+I deleted the code in rs6000_builtin_type_compatible that said two 128-bit
+floating point types are compatible if they have the same encoding. With
+overloading support we don't need this any longer.
+
+I deleted the translate mode attribute hook which is no longer need with these
+changes.
+
+I changed how complex 128-bit long double multiply and divide are done. The
+previous code indrectly depended on the type mode for __float128 being long
+double, and it no longer works when __float128 always has a unique type. To do
+this, I had to create two new functions (__multc3_ieee128 and divtc3_ieee128)
+which are called in this case. I added support in libgcc to make the ifunc
+support for these functions use the __mulkc3 and __divkc3 functions.
+
+I split the define_insn_and_splits for converting between two IEEE 128-bit types
+or two IBM 128-bit types into separate insns, one for converting between IEEE
+128-bit types, and the other for converting between IBM 128-bit types. One
+benefit of doing this is that we can get the type and length attributes correct
+for each move.
+
+2022-07-29 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-builtin.cc (rs6000_type_string): Replace
+ ieee128_float_type_node with float128_type_node.
+ (rs6000_init_builtins): Use the float128_type_node for __float128 even
+ if long double uses the IEEE 128-bit encoding. The type node for
+ __ibm128 is a unqiue type node even if long double uses the IBM 128-bit
+ encoding.
+ (rs6000_expand_builtin): Delete code that converted built-in functions
+ using KFmode to the equivalant built-in function using TFmode if
+ -mabi=ieeelongdouble. Delete code that coverted built-in functions
+ using IFmode to the equivalent built-in function using TFmode if
+ -mabi=ibmlongdouble.
+ * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Delete
+ reference to ieee128_float_type_node.
+ (rs6000_cpu_cpp_builtins): Delete reference to ieee128_float_type_node.
+ Use TARGET_IBM128 for checking if __ibm128 is supported.
+ (is_float128_p): Delete.
+ (rs6000_builtin_type_compatible): For 128-bit floating point, check if
+ both types have the same encoding.
+ * config/rs6000/rs6000.cc (TARGET_TRANSLATE_MODE_ATTRIBUTE): Delete.
+ (init_float128_ieee): Delete creation of complex long double multiply
+ and divide here and move the implemention to rs6000_init_libfuncs.
+ (rs6000_init_libfuncs): Rework complex long double multiply and divide
+ support here if long double uses IEEE 128-bit encoding.
+ (rs6000_translate_mode_attribute): Delete.
+ (rs6000_libgcc_floating_mode_supported_p): Remove code that used TFmode
+ if long double used the IEEE 128-bit encoding.
+ (rs6000_floatn_mode): Likewise.
+ (rs6000_c_mode_for_suffix): Likewise.
+ * config/rs6000/rs6000.h (RS6000_BTI_ieee128_float): Delete.
+ (ieee128_float_type_node): Delete.
+ * config/rs6000/rs6000.md (IFKF): Delete.
+ (IFKF_reg): Delete.
+ (extendkfif2): New insn.
+ (trunckfif2): New insn.
+ (extend<mode>tf2_internal): Delete combined extend mode, and split it
+ into separate insns that either just handle IEEE 128-bit to IEEE 128-bit
+ conversions or IBM 128-bit to IBM 128-bit conversions.
+ (extendtf<mode>2_internal): Likewise.
+ (extendkftf2_internal): New insn.
+ (extendtfkf2_internal): New insn.
+ (extendiftf2_internal): New insn.
+ (extendtfif2_internal): New insn.
+
+gcc/testsuite/
+
+ * gcc.target/powerpc/divkc3-2: Update test to track compiler changes.
+ * gcc.target/powerpc/mulkc3-2: Likewise.
+
+libgcc/
+
+ * config/rs6000/float128-ifunc.c (__multc3_ieee128): New ifunc handler.
+ (__divtc3_ieee128): Likewise.
+ * config/rs6000/quad-float128.h (__multc3_ieee128): Add declaration.
+ (__divtc3_ieee128): Likewise.
+
==================== work095, patch #18 was reverted.
==================== work095, patch #17 was reverted.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-30 1:34 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-30 1:34 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:dd6f750133ca1f3f8aa39f02f03f2bd09c43f790
commit dd6f750133ca1f3f8aa39f02f03f2bd09c43f790
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 29 21:33:41 2022 -0400
Update ChangeLog.meissner.
2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 34 +++++++++++++++++++++++++++++++++-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index a61c52210e7..838adb2229f 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -2,7 +2,39 @@
==================== work095, patch #17 was reverted.
-==================== work095, patch #16 was reverted.
+==================== work095, patch #16
+
+Allow __ibm128 even if IEEE 128-bit floating point is not supported.
+
+This set of patches changes the GCC compiler to allow the use of the __ibm128
+keyword if we have IEEE 128-bit floating point support enabled or if long double
+is 128-bits.
+
+In addition, checks for requiring hardware floating point to use __ibm128 have
+been removed. This fixes PR target/105534.
+
+2022-07-29 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ PR target/105534
+ * config/rs6000/rs6000-builtins.cc (rs6000_init_builtins): Create
+ __ibm128 on older machines without IEEE 128-bit support.
+ * config/rs6000/rs600.cc (init_float128_ibm): Remove checks for hardware
+ floating point for the IBM 128-bit comparisons.
+ (rs6000_init_libfuncs): Create IBM 128-bit floating point support even
+ if we don't support IEEE 128-bit floating point.
+ (rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't
+ support _Float128.
+ * config/rs6000/rs6000.h (FLOAT128_IBM_P): Remove checks for
+ -mhard-float.
+ (TARGET_IBM128): New macro.
+ * config/rs6000/rs6000.md (@extenddf<mode>2_fprs): Allow IFmode to be
+ converted even if long double is not 128-bits.
+ (extenddf<mode>2_vsx): Likewise.
+ (extendtfif2): Allow conversion if we have __ibm128 but not IEEE 128-bit
+ floating point.
+ (trunckftf2): Likewise.
==================== work095, patch #15 was reverted.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-30 1:30 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-30 1:30 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f091d4ce004b153540470a4a5a4e98742a666bea
commit f091d4ce004b153540470a4a5a4e98742a666bea
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 29 21:30:06 2022 -0400
Update ChangeLog.meissner.
2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 143 ++-----------------------------------------------
1 file changed, 3 insertions(+), 140 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 48b29eafbee..a61c52210e7 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,145 +1,8 @@
-==================== work095, patch #18
+==================== work095, patch #18 was reverted.
-Mangle __ibm128 into u8__ibm128.
+==================== work095, patch #17 was reverted.
-This patch changes the mangling of __ibm128 when long double uses the IBM
-128-bit encoding. This change is necessary due to the change where __ibm128 and
-long double no longer share the same internal type node.
-
-2022-07-29 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- PR target/85657
- * config/rs6000/rs600.cc (rs6000_mangle_type): Mangle __ibm128 into
- "u8__ibm128".
-
-==================== work095, patch #17
-
-Make __ibm128 and __float128 separate types from long double.
-
-This patch changes GCC so that __float128 and __ibm128 use different types
-internally than long double. In the past, GCC would use the long double type
-for __float128 if -mabi=ieeelongdouble was used, and it would use the long
-double type for __ibm128 if -mabi=ibmlongdouble was used.
-
-The rs6000 internal ieee128_float_type_node is deleted in favor of using the
-standard float128_type_node.
-
-I deleted the code in rs6000_expand_builtin which used to convert some built-in
-functions that used KFmode arguments to the equivalent built-in functions that
-used TFmode arguments if -mabi=ieeelongdouble. I also deleted the code that
-converted the built-ins that used IFmode arguments to the equivalant functions
-that used TFmode arguments if -mabi=ibmlongdouble.
-
-I changed rs6000_builtin_type_compatible so that if the types are both IEEE
-128-bit floating point or both IBM 128-bit floating point have compatible
-types.
-
-I deleted the translate mode attribute hook which is no longer need with these
-changes.
-
-I changed how complex 128-bit long double multiply and divide are done. The
-previous code indrectly depended on the type mode for __float128 being long
-double, and it no longer works when __float128 always has a unique type. To do
-this, I had to create two new functions (__multc3_ieee128 and divtc3_ieee128)
-which are called in this case. I added support in libgcc to make the ifunc
-support for these functions use the __mulkc3 and __divkc3 functions.
-
-I split the define_insn_and_splits for converting between two IEEE 128-bit types
-or two IBM 128-bit types into separate insns, one for converting between IEEE
-128-bit types, and the other for converting between IBM 128-bit types. One
-benefit of doing this is that we can get the type and length attributes correct
-for each move.
-
-2022-07-29 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000-builtin.cc (rs6000_type_string): Replace
- ieee128_float_type_node with float128_type_node.
- (rs6000_init_builtins): Use the float128_type_node for __float128 even
- if long double uses the IEEE 128-bit encoding. The type node for
- __ibm128 is a unqiue type node even if long double uses the IBM 128-bit
- encoding.
- (rs6000_expand_builtin): Delete code that converted built-in functions
- using KFmode to the equivalant built-in function using TFmode if
- -mabi=ieeelongdouble. Delete code that coverted built-in functions
- using IFmode to the equivalent built-in function using TFmode if
- -mabi=ibmlongdouble.
- * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Delete
- reference to ieee128_float_type_node.
- (rs6000_cpu_cpp_builtins): Delete reference to ieee128_float_type_node.
- Use TARGET_IBM128 for checking if __ibm128 is supported.
- (is_float128_p): Delete.
- (rs6000_builtin_type_compatible): For 128-bit floating point, check if
- both types have the same encoding.
- * config/rs6000/rs6000.cc (TARGET_TRANSLATE_MODE_ATTRIBUTE): Delete.
- (init_float128_ieee): Delete creation of complex long double multiply
- and divide here and move the implemention to rs6000_init_libfuncs.
- (rs6000_init_libfuncs): Rework complex long double multiply and divide
- support here if long double uses IEEE 128-bit encoding.
- (rs6000_translate_mode_attribute): Delete.
- (rs6000_libgcc_floating_mode_supported_p): Remove code that used TFmode
- if long double used the IEEE 128-bit encoding.
- (rs6000_floatn_mode): Likewise.
- (rs6000_c_mode_for_suffix): Likewise.
- * config/rs6000/rs6000.h (RS6000_BTI_ieee128_float): Delete.
- (ieee128_float_type_node): Delete.
- * config/rs6000/rs6000.md (IFKF): Delete.
- (IFKF_reg): Delete.
- (extendkfif2): New insn.
- (trunckfif2): New insn.
- (extend<mode>tf2_internal): Delete combined extend mode, and split it
- into separate insns that either just handle IEEE 128-bit to IEEE 128-bit
- conversions or IBM 128-bit to IBM 128-bit conversions.
- (extendtf<mode>2_internal): Likewise.
- (extendkftf2_internal): New insn.
- (extendtfkf2_internal): New insn.
- (extendiftf2_internal): New insn.
- (extendtfif2_internal): New insn.
-
-gcc/testsuite/
-
- * gcc.target/powerpc/divkc3-2: Update test to track compiler changes.
- * gcc.target/powerpc/mulkc3-2: Likewise.
-
-libgcc/
-
- * config/rs6000/float128-ifunc.c (__multc3_ieee128): New ifunc handler.
- (__divtc3_ieee128): Likewise.
- * config/rs6000/quad-float128.h (__multc3_ieee128): Add declaration.
- (__divtc3_ieee128): Likewise.
-
-==================== work095, patch #16
-
-Allow __ibm128 even if IEEE 128-bit floating point is not supported.
-
-This set of patches changes the GCC compiler to allow the use of the __ibm128
-keyword if we have IEEE 128-bit floating point support enabled or if long double
-is 128-bits.
-
-2022-07-29 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000-builtins.cc (rs6000_init_builtins): Create
- __ibm128 on older machines without IEEE 128-bit support.
- * config/rs6000/rs600.cc (init_float128_ibm): Remove checks for hardware
- floating point for the IBM 128-bit comparisons.
- (rs6000_init_libfuncs): Create IBM 128-bit floating point support even
- if we don't support IEEE 128-bit floating point.
- (rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't
- support _Float128.
- * config/rs6000/rs6000.h (FLOAT128_IBM_P): Remove checks for
- -mhard-float.
- (TARGET_IBM128): New macro.
- * config/rs6000/rs6000.md (@extenddf<mode>2_fprs): Allow IFmode to be
- converted even if long double is not 128-bits.
- (extenddf<mode>2_vsx): Likewise.
- (extendtfif2): Allow conversion if we have __ibm128 but not IEEE 128-bit
- floating point.
- (trunckftf2): Likewise.
+==================== work095, patch #16 was reverted.
==================== work095, patch #15 was reverted.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-29 19:30 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-29 19:30 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b2e8f00dd880f756d57c9d04a2c0d78a7fbf3e78
commit b2e8f00dd880f756d57c9d04a2c0d78a7fbf3e78
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 29 15:30:25 2022 -0400
Update ChangeLog.meissner.
2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 8c6331b5855..48b29eafbee 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,19 @@
+==================== work095, patch #18
+
+Mangle __ibm128 into u8__ibm128.
+
+This patch changes the mangling of __ibm128 when long double uses the IBM
+128-bit encoding. This change is necessary due to the change where __ibm128 and
+long double no longer share the same internal type node.
+
+2022-07-29 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ PR target/85657
+ * config/rs6000/rs600.cc (rs6000_mangle_type): Mangle __ibm128 into
+ "u8__ibm128".
+
==================== work095, patch #17
Make __ibm128 and __float128 separate types from long double.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-29 17:57 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-29 17:57 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:21b1a8d79bcedd7dccc7957be2a831d8c60fd6f4
commit 21b1a8d79bcedd7dccc7957be2a831d8c60fd6f4
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 29 13:57:24 2022 -0400
Update ChangeLog.meissner.
2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 135 +++++++++++++++++++++++++++++++++----------------
1 file changed, 91 insertions(+), 44 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 70efe3d3163..8c6331b5855 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,71 +1,114 @@
-==================== work095, patch #14.
+==================== work095, patch #17
-Make __float128 and __ibm128 use different types from long double.
+Make __ibm128 and __float128 separate types from long double.
+
+This patch changes GCC so that __float128 and __ibm128 use different types
+internally than long double. In the past, GCC would use the long double type
+for __float128 if -mabi=ieeelongdouble was used, and it would use the long
+double type for __ibm128 if -mabi=ibmlongdouble was used.
+
+The rs6000 internal ieee128_float_type_node is deleted in favor of using the
+standard float128_type_node.
+
+I deleted the code in rs6000_expand_builtin which used to convert some built-in
+functions that used KFmode arguments to the equivalent built-in functions that
+used TFmode arguments if -mabi=ieeelongdouble. I also deleted the code that
+converted the built-ins that used IFmode arguments to the equivalant functions
+that used TFmode arguments if -mabi=ibmlongdouble.
+
+I changed rs6000_builtin_type_compatible so that if the types are both IEEE
+128-bit floating point or both IBM 128-bit floating point have compatible
+types.
+
+I deleted the translate mode attribute hook which is no longer need with these
+changes.
+
+I changed how complex 128-bit long double multiply and divide are done. The
+previous code indrectly depended on the type mode for __float128 being long
+double, and it no longer works when __float128 always has a unique type. To do
+this, I had to create two new functions (__multc3_ieee128 and divtc3_ieee128)
+which are called in this case. I added support in libgcc to make the ifunc
+support for these functions use the __mulkc3 and __divkc3 functions.
+
+I split the define_insn_and_splits for converting between two IEEE 128-bit types
+or two IBM 128-bit types into separate insns, one for converting between IEEE
+128-bit types, and the other for converting between IBM 128-bit types. One
+benefit of doing this is that we can get the type and length attributes correct
+for each move.
2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
- * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always
- create a new tree node for __ibm128, even if long double uses the IBM
- 128-bit format. Always create a new tree node for __float128, even if
- long double uses the IEEE 128-bit format.
- * config/rs6000/rs600.cc (rs6000_expand_builtin): Remove code that
- converted the KFmode and IFmode built-in functions to TFmode depending
- on what the long double format is, and use built-in overloading
- instead.
- (init_float128_ieee): Remove setting up KFmode complex multiply and
- divide here.
- (rs6000_init_libfuncs): Rewrite the setup for complex multiply and
- divide for long double if long double uses the IEEE 128-bit encoding.
- (rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't
- support _Float128.
- (rs6000_libgcc_floating_mode_supported_p): Allow KFmode if IEEE
- 128-bit floating point is supported. Allow IFmode if either IEEE
- 128-bit floating point is supported or long double is IBM 128-bit.
- (rs6000_floatn_mode): Always return KFmode for IEEE 128-bit. Do not
- return TFmode, even if long double uses the IEEE 128-bit format.
- (rs6000_c_mode_for_suffix): The 'q' suffix always uses KFmode, even if
- long double uses the IEEE 128-bit encoding.
+ * config/rs6000/rs6000-builtin.cc (rs6000_type_string): Replace
+ ieee128_float_type_node with float128_type_node.
+ (rs6000_init_builtins): Use the float128_type_node for __float128 even
+ if long double uses the IEEE 128-bit encoding. The type node for
+ __ibm128 is a unqiue type node even if long double uses the IBM 128-bit
+ encoding.
+ (rs6000_expand_builtin): Delete code that converted built-in functions
+ using KFmode to the equivalant built-in function using TFmode if
+ -mabi=ieeelongdouble. Delete code that coverted built-in functions
+ using IFmode to the equivalent built-in function using TFmode if
+ -mabi=ibmlongdouble.
+ * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Delete
+ reference to ieee128_float_type_node.
+ (rs6000_cpu_cpp_builtins): Delete reference to ieee128_float_type_node.
+ Use TARGET_IBM128 for checking if __ibm128 is supported.
+ (is_float128_p): Delete.
+ (rs6000_builtin_type_compatible): For 128-bit floating point, check if
+ both types have the same encoding.
+ * config/rs6000/rs6000.cc (TARGET_TRANSLATE_MODE_ATTRIBUTE): Delete.
+ (init_float128_ieee): Delete creation of complex long double multiply
+ and divide here and move the implemention to rs6000_init_libfuncs.
+ (rs6000_init_libfuncs): Rework complex long double multiply and divide
+ support here if long double uses IEEE 128-bit encoding.
+ (rs6000_translate_mode_attribute): Delete.
+ (rs6000_libgcc_floating_mode_supported_p): Remove code that used TFmode
+ if long double used the IEEE 128-bit encoding.
+ (rs6000_floatn_mode): Likewise.
+ (rs6000_c_mode_for_suffix): Likewise.
+ * config/rs6000/rs6000.h (RS6000_BTI_ieee128_float): Delete.
+ (ieee128_float_type_node): Delete.
* config/rs6000/rs6000.md (IFKF): Delete.
(IFKF_reg): Delete.
+ (extendkfif2): New insn.
(trunckfif2): New insn.
- (trunctfif2): Likewise.
- (extendkftf2_internal): Split extend<mode>tf2_internal and
- extendtf<mode>2_internal into separate insns that handle either
- conversions between IEEE 128-bit types or between IBM 128-bit types.
- Set the type and insn length correctly.
- (extendtfkf2_internal): Likewise.
- (extendiftf2_internal): Likewise.
- (extendtfif2_internal): Likewise.
+ (extend<mode>tf2_internal): Delete combined extend mode, and split it
+ into separate insns that either just handle IEEE 128-bit to IEEE 128-bit
+ conversions or IBM 128-bit to IBM 128-bit conversions.
+ (extendtf<mode>2_internal): Likewise.
+ (extendkftf2_internal): New insn.
+ (extendtfkf2_internal): New insn.
+ (extendiftf2_internal): New insn.
+ (extendtfif2_internal): New insn.
gcc/testsuite/
- * gcc.target/powerpc/mulkc3-2.c: Update test.
- * gcc.target/powerpc/divkc3-2.c: Likewise.
+ * gcc.target/powerpc/divkc3-2: Update test to track compiler changes.
+ * gcc.target/powerpc/mulkc3-2: Likewise.
libgcc/
- * config/rs6000/float128-ifunc.c (__multc3_ieee128): Add ifunc
- support.
+ * config/rs6000/float128-ifunc.c (__multc3_ieee128): New ifunc handler.
+ (__divtc3_ieee128): Likewise.
+ * config/rs6000/quad-float128.h (__multc3_ieee128): Add declaration.
(__divtc3_ieee128): Likewise.
- * config/rs6000/quad-float128.h (__multc3_ieee128): Add
- declaration.
- (__divtc3_ieee128): Likewise.
-==================== work095, patch #14.
+==================== work095, patch #16
Allow __ibm128 even if IEEE 128-bit floating point is not supported.
-This set of patches fixes places in the compiler where it was assumed to use
-__ibm128 we needed to have IEEE 128-bit support enabled. A future patch will
-implement the change to create the __ibm128 type if either we have IEEE 128-bit
-floating point enabled, or the long double type is IBM 128-bit floating point.
+This set of patches changes the GCC compiler to allow the use of the __ibm128
+keyword if we have IEEE 128-bit floating point support enabled or if long double
+is 128-bits.
-2022-07-28 Michael Meissner <meissner@linux.ibm.com>
+2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
+ * config/rs6000/rs6000-builtins.cc (rs6000_init_builtins): Create
+ __ibm128 on older machines without IEEE 128-bit support.
* config/rs6000/rs600.cc (init_float128_ibm): Remove checks for hardware
floating point for the IBM 128-bit comparisons.
(rs6000_init_libfuncs): Create IBM 128-bit floating point support even
@@ -82,6 +125,10 @@ gcc/
floating point.
(trunckftf2): Likewise.
+==================== work095, patch #15 was reverted.
+
+==================== work095, patch #14 was reverted.
+
==================== work095, patch #13 was reverted.
==================== work095, patch #12 was reverted.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-29 5:58 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-29 5:58 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:c5e2fff182fe86c0fa19985e1b1998b3447b988c
commit c5e2fff182fe86c0fa19985e1b1998b3447b988c
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 29 01:57:43 2022 -0400
Update ChangeLog.meissner.
2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 55 ++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 6a6baccb60f..70efe3d3163 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,5 +1,60 @@
==================== work095, patch #14.
+Make __float128 and __ibm128 use different types from long double.
+
+2022-07-29 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always
+ create a new tree node for __ibm128, even if long double uses the IBM
+ 128-bit format. Always create a new tree node for __float128, even if
+ long double uses the IEEE 128-bit format.
+ * config/rs6000/rs600.cc (rs6000_expand_builtin): Remove code that
+ converted the KFmode and IFmode built-in functions to TFmode depending
+ on what the long double format is, and use built-in overloading
+ instead.
+ (init_float128_ieee): Remove setting up KFmode complex multiply and
+ divide here.
+ (rs6000_init_libfuncs): Rewrite the setup for complex multiply and
+ divide for long double if long double uses the IEEE 128-bit encoding.
+ (rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't
+ support _Float128.
+ (rs6000_libgcc_floating_mode_supported_p): Allow KFmode if IEEE
+ 128-bit floating point is supported. Allow IFmode if either IEEE
+ 128-bit floating point is supported or long double is IBM 128-bit.
+ (rs6000_floatn_mode): Always return KFmode for IEEE 128-bit. Do not
+ return TFmode, even if long double uses the IEEE 128-bit format.
+ (rs6000_c_mode_for_suffix): The 'q' suffix always uses KFmode, even if
+ long double uses the IEEE 128-bit encoding.
+ * config/rs6000/rs6000.md (IFKF): Delete.
+ (IFKF_reg): Delete.
+ (trunckfif2): New insn.
+ (trunctfif2): Likewise.
+ (extendkftf2_internal): Split extend<mode>tf2_internal and
+ extendtf<mode>2_internal into separate insns that handle either
+ conversions between IEEE 128-bit types or between IBM 128-bit types.
+ Set the type and insn length correctly.
+ (extendtfkf2_internal): Likewise.
+ (extendiftf2_internal): Likewise.
+ (extendtfif2_internal): Likewise.
+
+gcc/testsuite/
+
+ * gcc.target/powerpc/mulkc3-2.c: Update test.
+ * gcc.target/powerpc/divkc3-2.c: Likewise.
+
+libgcc/
+
+ * config/rs6000/float128-ifunc.c (__multc3_ieee128): Add ifunc
+ support.
+ (__divtc3_ieee128): Likewise.
+ * config/rs6000/quad-float128.h (__multc3_ieee128): Add
+ declaration.
+ (__divtc3_ieee128): Likewise.
+
+==================== work095, patch #14.
+
Allow __ibm128 even if IEEE 128-bit floating point is not supported.
This set of patches fixes places in the compiler where it was assumed to use
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-29 1:57 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-29 1:57 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f515799a03ac3a93e8a8a8b2b5e9f896c9b22378
commit f515799a03ac3a93e8a8a8b2b5e9f896c9b22378
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jul 28 21:57:02 2022 -0400
Update ChangeLog.meissner.
2022-07-28 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 25213466458..6a6baccb60f 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,9 +1,11 @@
==================== work095, patch #14.
-Make __float128 and __ibm128 use different types from long double.
+Allow __ibm128 even if IEEE 128-bit floating point is not supported.
-This set of patches goes through to allow the use of __ibm128 if we don't have
-IEEE 128-bit support enabled, but long double uses the IBM 128-bit support.
+This set of patches fixes places in the compiler where it was assumed to use
+__ibm128 we needed to have IEEE 128-bit support enabled. A future patch will
+implement the change to create the __ibm128 type if either we have IEEE 128-bit
+floating point enabled, or the long double type is IBM 128-bit floating point.
2022-07-28 Michael Meissner <meissner@linux.ibm.com>
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-28 22:58 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-28 22:58 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:04e33e87cb7754a8130e6b4a58e23b988b2982ae
commit 04e33e87cb7754a8130e6b4a58e23b988b2982ae
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jul 28 18:58:39 2022 -0400
Update ChangeLog.meissner.
2022-07-28 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index e559837a29f..b791c21e08c 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,14 @@
+==================== work095, patch #13.
+
+Mangle __ibm128 into u8__ibm128.
+
+2022-07-28 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs600.cc (rs6000_mangle_type): Mangle __ibm128 into
+ "u8__ibm128".
+
==================== work095, patch #12.
Enable using overload built-ins for 128-bit floating point.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-28 22:31 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-28 22:31 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:0b82940fb9e538c650d7905562637a42b6688743
commit 0b82940fb9e538c650d7905562637a42b6688743
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jul 28 18:31:22 2022 -0400
Update ChangeLog.meissner.
2022-07-28 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 4983749b0a5..e559837a29f 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,37 @@
+==================== work095, patch #12.
+
+Enable using overload built-ins for 128-bit floating point.
+
+2022-07-28 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Remove all
+ of the code that changed KFmode built-in functions into TFmode, since
+ these functions now support overloading between KFmode and TFmode.
+ * config/rs6000/rs6000-c.cc (rs6000_builtin_type_compatible):
+ Don't consider _Float128 and long double under
+ -mabi=ieeelongdouble to be compatible for built-in functions. Use
+ overloading instead.
+ * config/rs6000/rs6000.md (IFKF): Delete.
+ (IFKF_reg): Delete.
+ (@extenddf<mode>2_fprs): Remove extra test for
+ TARGET_LONG_DOUBLE_128.
+ (@extenddf<mode2>_vsx): Likewise.
+ (extendiftf2): Allow __ibm128 even if _Float128 is not supported.
+ (extendkfif2): New insn.
+ (extendtfkf2): Allow __ibm128 even if _Float128 is not supported.
+ (extendtfif2): Likewise.
+ (trunckfif2): New insn.
+ (trunctfif2): Allow __ibm128 even if _Float128 is not supported.
+ (extendkftf2_internal): Split extend<mode>tf2_internal and
+ extendtf<mode>2_internal into separate insns that handle either
+ conversions between IEEE 128-bit types or between IBM 128-bit types.
+ Set the type and insn length correctly.
+ (extendtfkf2_internal): Likewise.
+ (extendiftf2_internal): Likewise.
+ (extendtfif2_internal): Likewise.
+
==================== work095, patch #11.
Make __float128 and __ibm128 use different types from long double.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-28 20:59 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-28 20:59 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:967e62846a6b0e8d8e4c66b6f583377851b4906f
commit 967e62846a6b0e8d8e4c66b6f583377851b4906f
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jul 28 16:59:12 2022 -0400
Update ChangeLog.meissner.
2022-07-28 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 45 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 26b36179b16..4983749b0a5 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,48 @@
+==================== work095, patch #11.
+
+Make __float128 and __ibm128 use different types from long double.
+
+2022-07-28 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always
+ create a new tree node for __ibm128, even if long double uses the IBM
+ 128-bit format. Always create a new tree node for __float128, even if
+ long double uses the IEEE 128-bit format.
+ * config/rs6000/rs600.cc (init_float128_ibm): Remove checks for
+ hardware floating point for the IBM 128-bit comparisons.
+ (init_float128_ieee): Do not create __mulkc3 and __divkc3 since
+ __float128 always creates these functions.
+ (rs6000_init_libfuncs): Create complex multiply and divide for long
+ double if long double uses the IEEE 128-bit encoding.
+ (rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't
+ support _Float128.
+ (rs6000_libgcc_floating_mode_supported_p): Allow KFmode if IEEE
+ 128-bit floating point is supported. Allow IFmode if either IEEE
+ 128-bit floating point is supported or long double is IBM 128-bit.
+ (rs6000_floatn_mode): Always return KFmode for IEEE 128-bit. Do not
+ return TFmode, even if long double uses the IEEE 128-bit format.
+ (rs6000_c_mode_for_suffix): The 'q' suffix always uses KFmode, even if
+ long double uses the IEEE 128-bit encoding.
+ * config/rs6000/rs6000.h (FLOAT128_IBM_P): Remove checks for
+ -mhard-float.
+ (TARGET_IBM128): New macro.
+
+gcc/testsuite/
+
+ * gcc.target/powerpc/mulkd3-2.c: Update test.
+ * gcc.target/powerpc/divkd3-2.c: Likewise.
+
+libgcc/
+
+ * config/rs6000/float128-ifunc.c (__multc3_ieee128): Add ifunc
+ support.
+ (__divtc3_ieee128): Likewise.
+ * config/rs6000/quad-float128.h (__multc3_ieee128): Add
+ Declaration.
+ (__divtc3_ieee128): Likewise.
+
==================== work095, patch #10.
Allow IBM 128-bit to do offset addressing.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-23 0:12 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-23 0:12 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:14ec43b65235d073a465c6396a55917d5d11859f
commit 14ec43b65235d073a465c6396a55917d5d11859f
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 22 20:12:42 2022 -0400
Update ChangeLog.meissner.
2022-07-22 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index bd2990bce93..26b36179b16 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,19 @@
+==================== work095, patch #10.
+
+Allow IBM 128-bit to do offset addressing.
+
+I noticed that we didn't enable offset addressing for IBM 128-bit floating
+point.
+
+2022-07-22 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000.cc (rs6000_setup_reg_addr_masks): Allow
+ IFmode and possibly TFmode to use offset addressing.
+ (reg_offset_addressing_ok_p): IBM 128-bit floating point modes can do
+ offset addressing.
+
==================== work095, patch #9.
Do not enable -mblock-ops-vector-pair.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-22 18:57 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-22 18:57 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:764ddb919d8ccdb6a01d9bbacaea15508f8d0187
commit 764ddb919d8ccdb6a01d9bbacaea15508f8d0187
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 22 14:57:00 2022 -0400
Update ChangeLog.meissner.
2022-07-22 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 62 +++++++++++++++++++++-----------------------------
1 file changed, 26 insertions(+), 36 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 61d24a87eae..bd2990bce93 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,26 @@
+==================== work095, patch #9.
+
+Do not enable -mblock-ops-vector-pair.
+
+Testing has shown that using the load vector pair and store vector pair
+instructions for block moves has some performance issues on power10.
+
+A patch on June 11th modified the code so that GCC would not set
+-mblock-ops-vector-pair by default if we are tuning for power10, but it
+would set the option if we were tuning for a different machine and have
+load and store vector pair instructions enabled.
+
+This patch just eliminates the code setting -mblock-ops-vector-pair at
+all.
+
+
+2022-07-22 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000.cc (rs6000_option_override_internal):
+ Do not enable -mblock-ops-vector-pair by default on power10.
+
==================== work095, patch #8.
Support IEEE 128-bit overload test data built-in functions.
@@ -168,44 +191,11 @@ gcc/
attribute.
(write_bif_static_init): Add support for ieeeld attribute.
-==================== work095, patch #3.
-
-Make -mblock-ops-vector-pair option valid as an ISA option.
-
-I needed to turn off using load vector pair and store vector pair
-instructions on the power10 for performance reasons. It is likely that in
-future machines, we will want to enable these instructions for block moves
-and copies. This patch adds the -mblock-ops-vector-pair option mask to
-POWERPC_MASKS so that it is automatically set and cleared as we change the
-target cpu.
+==================== work095, patch #3 was reverted.
-2022-07-19 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add
- OPTION_MASK_BLOCK_OPS_VECTOR_PAIR.
- * config/rs6000/rs6000.opt (-mblock-ops-vector-pair): Add a
- comment.
-
-==================== work095, patch #2.
-
-Remove setting -mblock-ops-vector-pair on power10.
-
-Testing has shown that using the load vector pair and store vector pair
-instructions for block moves has some performance issues on power10. This
-patch does not set this option by default. If it is a win in other
-machines, this flag can be set in the ISA options.
-
-2022-07-18 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000.cc (rs6000_option_override_internal):
- Remove code setting -mblock-ops-vector-pair by default on
- power10.
+==================== work095, patch #2 was reverted.
-==================== work095, patch #1 (reverted)
+==================== work095, patch #1 was reverted.
==================== work095, branch setup.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-21 21:50 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-21 21:50 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:7ebd59ea32f840ded6022bb0acefe6dbb381b674
commit 7ebd59ea32f840ded6022bb0acefe6dbb381b674
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jul 21 17:49:05 2022 -0400
Update ChangeLog.meissner.
2022-07-21 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 39 +++++++++++++++++++++------------------
1 file changed, 21 insertions(+), 18 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index e8ee95fdc9e..d36ddebdef0 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,23 @@
+==================== work095, patch #3.
+
+Make -mblock-ops-vector-pair option valid as an ISA option.
+
+I needed to turn off using load vector pair and store vector pair
+instructions on the power10 for performance reasons. It is likely that in
+future machines, we will want to enable these instructions for block moves
+and copies. This patch adds the -mblock-ops-vector-pair option mask to
+POWERPC_MASKS so that it is automatically set and cleared as we change the
+target cpu.
+
+2022-07-19 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add
+ OPTION_MASK_BLOCK_OPS_VECTOR_PAIR.
+ * config/rs6000/rs6000.opt (-mblock-ops-vector-pair): Add a
+ comment.
+
==================== work095, patch #2.
Remove setting -mblock-ops-vector-pair on power10.
@@ -15,24 +35,7 @@ gcc/
Remove code setting -mblock-ops-vector-pair by default on
power10.
-==================== work095, patch #2.
-
-Make BLOCK_OPTS options settable with ISA flags.
-
-In wanting to turn off block moves from generating load and store vector
-pair operations on the power10, I noticed that the options for controlling
-the code block moves generate (OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX and
-OPTION_MASK_BLOCK_OPS_VECTOR_PAIR) were not set in POWERPC_MASKS. It is
-possible in future CPUs we might want to enable these options
-automatically. This code moves these options to POWERPC_MASKS.
-
-2022-07-18 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add
- OPTION_MASK_BLOCK_OPS_VECTOR_PAIR and
- OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX.
+==================== work095, patch #1 (reverted)
==================== work095, branch setup.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner.
@ 2022-07-18 19:41 Michael Meissner
0 siblings, 0 replies; 15+ messages in thread
From: Michael Meissner @ 2022-07-18 19:41 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:8f3d146c0445dde1aa39bbe536a9bc0a19ab1c85
commit 8f3d146c0445dde1aa39bbe536a9bc0a19ab1c85
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Mon Jul 18 15:40:58 2022 -0400
Update ChangeLog.meissner.
2022-07-18 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 6e19866402e..e8ee95fdc9e 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,41 @@
+==================== work095, patch #2.
+
+Remove setting -mblock-ops-vector-pair on power10.
+
+Testing has shown that using the load vector pair and store vector pair
+instructions for block moves has some performance issues on power10. This
+patch does not set this option by default. If it is a win in other
+machines, this flag can be set in the ISA options.
+
+2022-07-18 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000.cc (rs6000_option_override_internal):
+ Remove code setting -mblock-ops-vector-pair by default on
+ power10.
+
+==================== work095, patch #2.
+
+Make BLOCK_OPTS options settable with ISA flags.
+
+In wanting to turn off block moves from generating load and store vector
+pair operations on the power10, I noticed that the options for controlling
+the code block moves generate (OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX and
+OPTION_MASK_BLOCK_OPS_VECTOR_PAIR) were not set in POWERPC_MASKS. It is
+possible in future CPUs we might want to enable these options
+automatically. This code moves these options to POWERPC_MASKS.
+
+2022-07-18 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add
+ OPTION_MASK_BLOCK_OPS_VECTOR_PAIR and
+ OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX.
+
+==================== work095, branch setup.
+
2022-07-18 Michael Meissner <meissner@linux.ibm.com>
Clone branch
^ permalink raw reply [flat|nested] 15+ messages in thread
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