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* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-07 20:01 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-07 20:01 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b8ebc9386a08c492f557e893cf6489d089ecc32a
commit b8ebc9386a08c492f557e893cf6489d089ecc32a
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Jun 7 16:01:37 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 44 ++++++++++++++---------------
gcc/config/rs6000/genfusion.pl | 36 ++++++-----------------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 -----------------
4 files changed, 30 insertions(+), 78 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 4444e3315dd..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -104,17 +104,17 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is clobber compare mode is CC extend is none
-(define_insn_and_split "*lwz_cmpsi_cr0_SI_clobber_CC_none"
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
- "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
+ "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- SImode, NON_PREFIXED_D))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
@@ -125,7 +125,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is clobber compare mode is CCUNS extend is none
-(define_insn_and_split "*lwz_cmplsi_cr0_SI_clobber_CCUNS_none"
+(define_insn_and_split "*lwz_cmpldi_cr0_SI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:SI 1 "non_update_memory_operand" "m")
(match_operand:SI 3 "const_0_to_1_operand" "n")))
@@ -146,9 +146,9 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is SI compare mode is CC extend is none
-(define_insn_and_split "*lwa_cmpsi_cr0_SI_SI_CC_none"
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -163,12 +163,11 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is SI compare mode is CCUNS extend is none
-(define_insn_and_split "*lwz_cmplsi_cr0_SI_SI_CCUNS_none"
+(define_insn_and_split "*lwz_cmpldi_cr0_SI_SI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:SI 1 "non_update_memory_operand" "m")
(match_operand:SI 3 "const_0_to_1_operand" "n")))
@@ -189,9 +188,9 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
-(define_insn_and_split "*lwa_cmp<mode>_cr0_SI_EXTSI_CC_sign"
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -206,12 +205,11 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is EXTSI compare mode is CCUNS extend is zero
-(define_insn_and_split "*lwz_cmpl<mode>_cr0_SI_EXTSI_CCUNS_zero"
+(define_insn_and_split "*lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:SI 1 "non_update_memory_operand" "m")
(match_operand:SI 3 "const_0_to_1_operand" "n")))
@@ -232,7 +230,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is HI result mode is clobber compare mode is CC extend is sign
-(define_insn_and_split "*lha_cmp<mode>_cr0_HI_clobber_CC_sign"
+(define_insn_and_split "*lha_cmpdi_cr0_HI_clobber_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
(compare:CC (match_operand:HI 1 "non_update_memory_operand" "m")
(match_operand:HI 3 "const_m1_to_1_operand" "n")))
@@ -253,7 +251,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is HI result mode is clobber compare mode is CCUNS extend is zero
-(define_insn_and_split "*lhz_cmpl<mode>_cr0_HI_clobber_CCUNS_zero"
+(define_insn_and_split "*lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:HI 1 "non_update_memory_operand" "m")
(match_operand:HI 3 "const_0_to_1_operand" "n")))
@@ -274,7 +272,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is HI result mode is EXTHI compare mode is CC extend is sign
-(define_insn_and_split "*lha_cmp<mode>_cr0_HI_EXTHI_CC_sign"
+(define_insn_and_split "*lha_cmpdi_cr0_HI_EXTHI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
(compare:CC (match_operand:HI 1 "non_update_memory_operand" "m")
(match_operand:HI 3 "const_m1_to_1_operand" "n")))
@@ -295,7 +293,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is HI result mode is EXTHI compare mode is CCUNS extend is zero
-(define_insn_and_split "*lhz_cmpl<mode>_cr0_HI_EXTHI_CCUNS_zero"
+(define_insn_and_split "*lhz_cmpldi_cr0_HI_EXTHI_CCUNS_zero"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:HI 1 "non_update_memory_operand" "m")
(match_operand:HI 3 "const_0_to_1_operand" "n")))
@@ -316,7 +314,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is QI result mode is clobber compare mode is CCUNS extend is zero
-(define_insn_and_split "*lbz_cmpl<mode>_cr0_QI_clobber_CCUNS_zero"
+(define_insn_and_split "*lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:QI 1 "non_update_memory_operand" "m")
(match_operand:QI 3 "const_0_to_1_operand" "n")))
@@ -337,7 +335,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is QI result mode is GPR compare mode is CCUNS extend is zero
-(define_insn_and_split "*lbz_cmpl<mode>_cr0_QI_GPR_CCUNS_zero"
+(define_insn_and_split "*lbz_cmpldi_cr0_QI_GPR_CCUNS_zero"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:QI 1 "non_update_memory_operand" "m")
(match_operand:QI 3 "const_0_to_1_operand" "n")))
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 42517b3bce7..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -57,26 +57,14 @@ sub gen_ld_cmpi_p10_one
{
my ($lmode, $result, $ccmode) = @_;
- my $cmp_size = "d";
- my $echr = ($ccmode eq "CC") ? "a" : "z";
- if ($lmode eq "DI") { $echr = ""; }
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
my $extend;
if ($ccmode eq "CC") {
- # if we would generate lwa and just want the CC value, generate lwz instead
- # and use cmpwi. This allows us to avoid the ds-form restrictions on lwa.
- if ($lmode eq "SI" && $result eq "clobber") {
- $echr = "z";
- $cmp_size = "w";
-
- } else {
- # ld and lwa are both DS-FORM, use LWA_OPERAND for LWA
- ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
- ($lmode eq "DI") and $mempred = "ds_form_mem_operand";
- ($lmode eq "SI") and $mempred = "lwa_operand";
- }
+ # ld and lwa are both DS-FORM.
+ ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -86,6 +74,8 @@ sub gen_ld_cmpi_p10_one
}
my $cmpl = ($ccmode eq "CC") ? "" : "l";
+ my $echr = ($ccmode eq "CC") ? "a" : "z";
+ if ($lmode eq "DI") { $echr = ""; }
my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand"
: "const_0_to_1_operand";
@@ -100,17 +90,13 @@ sub gen_ld_cmpi_p10_one
$extend = "none";
}
- my $load_mode = (($clobbermode eq "GPR" || $result =~ /^EXT/)
- ? "<mode>"
- : lc ($clobbermode));
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
-(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}${load_mode}_cr0_${lmode}_${result}_${ccmode}_${extend}"
+(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -133,7 +119,7 @@ HERE
print <<HERE;
"(TARGET_P10_FUSION)"
- "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}${cmp_size}i %2,%0,%3"
+ "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
@@ -154,12 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
- # prefixed_load_p looks at sign_extend to deal with lwa.
- if ($mempred eq "lwa_operand") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
- print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ed2f06e56ac..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-13 18:00 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-13 18:00 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:e5efbdc991534f471b5de41559764bb98922f9b5
commit e5efbdc991534f471b5de41559764bb98922f9b5
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Tue Jun 13 14:00:14 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 23 ++++++--------
gcc/config/rs6000/genfusion.pl | 37 +++-------------------
gcc/config/rs6000/predicates.md | 14 ++++++++
gcc/config/rs6000/rs6000.md | 4 +--
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 ---------------
.../gcc.target/powerpc/fusion-p10-ldcmpi.c | 14 ++++----
6 files changed, 37 insertions(+), 81 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 9eefae22a1a..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -106,22 +106,21 @@
;; load mode is SI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "non_update_memory_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
- (clobber (match_scratch:DI 0 "=r"))]
+ (clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
"lwa%X1 %0,%1\;cmpdi %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
SImode, NON_PREFIXED_DS))"
- [(set (match_dup 0) (sign_extend:DI (match_dup 1)))
+ [(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -149,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "non_update_memory_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -158,13 +157,12 @@
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
SImode, NON_PREFIXED_DS))"
- [(set (match_dup 0) (sign_extend:DI (match_dup 1)))
+ [(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -192,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "non_update_memory_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -207,7 +205,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 31ee54aea93..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -61,23 +61,15 @@ sub gen_ld_cmpi_p10_one
my $mempred = "non_update_memory_operand";
my $extend;
- # We need to special case lwa. The prefixed_load_p function in rs6000.cc
- # (which determines if a load instruction is prefixed) uses the fact that the
- # register mode is different from the memory mode, and that the sign_extend
- # attribute is set to use DS-form rules for the address instead of D-form.
- # If the register size is the same, prefixed_load_p assumes we are doing a
- # lwz.
- my $lwa_insn = ($lmode eq "SI" && $ccmode eq "CC");
-
if ($ccmode eq "CC") {
# ld and lwa are both DS-FORM.
($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
-# ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
$np = "NON_PREFIXED_DS";
- # $mempred = "ds_form_mem_operand";
+ $mempred = "ds_form_mem_operand";
}
}
@@ -89,9 +81,7 @@ sub gen_ld_cmpi_p10_one
# For clobber, we need a SI/DI reg in case we
# split because we have to sign/zero extend.
- my $clobbermode = (($lmode =~ /^[QH]I$/)
- ? "GPR"
- : ($lwa_insn ? "DI" : $lmode));
+ my $clobbermode = ($lmode =~ /^[QH]I$/) ? "GPR" : $lmode;
if ($result =~ /^EXT/ || $result eq "GPR" || $clobbermode eq "GPR") {
# We always need extension if result > lmode.
$extend = ($ccmode eq "CC") ? "sign" : "zero";
@@ -101,15 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
-
- # DS-form addresses need YZ, and not m.
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -139,12 +126,7 @@ HERE
${lmode}mode, ${np}))"
HERE
- # prefixed_load_p needs to see the register mode being different than the
- # memory insn in order to validate lwa as a DS-form instruction and not a
- # D-form instruction.
- if ($lwa_insn && $extend eq "none") {
- print " [(set (match_dup 0) (sign_extend:${clobbermode} (match_dup 1)))\n";
- } elsif ($extend eq "none") {
+ if ($extend eq "none") {
print " [(set (match_dup 0) (match_dup 1))\n";
} elsif ($result eq "clobber") {
print " [(set (match_dup 0) (${extend}_extend:${clobbermode} (match_dup 1)))\n";
@@ -158,15 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
-
- if ($lwa_insn) {
- # prefixed_load_p needs the sign_extend attribute to validate lwa as a
- # DS-form instruction instead of D-form.
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
-
- print <<HERE
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 6b564837c6e..a16ee30f0c0 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -1125,6 +1125,20 @@
return INTVAL (offset) % 4 == 0;
})
+;; Return 1 if the operand is a memory operand that has a valid address for
+;; a DS-form instruction. I.e. the address has to be either just a register,
+;; or register + const where the two low order bits of const are zero.
+(define_predicate "ds_form_mem_operand"
+ (match_code "subreg,mem")
+{
+ if (!any_memory_operand (op, mode))
+ return false;
+
+ rtx addr = XEXP (op, 0);
+
+ return address_to_insn_form (addr, mode, NON_PREFIXED_DS) == INSN_FORM_DS;
+})
+
;; Return 1 if the operand, used inside a MEM, is a SYMBOL_REF.
(define_predicate "symbol_ref_operand"
(and (match_code "symbol_ref")
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 75c5e5fc93d..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -287,7 +287,7 @@
;; Whether this insn has a prefixed form and a non-prefixed form.
(define_attr "maybe_prefixed" "no,yes"
(if_then_else (eq_attr "type" "load,fpload,vecload,store,fpstore,vecstore,
- integer,add,fused_load_cmpi")
+ integer,add")
(const_string "yes")
(const_string "no")))
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index 3efbb34f2b4..526a026d874 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -54,14 +54,14 @@ TEST(uint8_t)
TEST(int8_t)
/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 24 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 1 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 16 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 4 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 4 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 2 { target lp64 } } } */
@@ -73,8 +73,6 @@ TEST(int8_t)
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 8 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 36 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 9 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 0 { target ilp32 } } } */
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-13 16:21 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-13 16:21 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:936b5b082e70feb8ad2fb99023348490b003df38
commit 936b5b082e70feb8ad2fb99023348490b003df38
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Tue Jun 13 12:21:38 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 21 +++++++++------------
gcc/config/rs6000/genfusion.pl | 29 ++---------------------------
gcc/config/rs6000/rs6000.md | 4 ++--
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 --------------------------
4 files changed, 13 insertions(+), 67 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index fdf710bdfc7..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -106,7 +106,7 @@
;; load mode is SI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -115,13 +115,12 @@
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
SImode, NON_PREFIXED_DS))"
- [(set (match_dup 0) (sign_extend:SI (match_dup 1)))
+ [(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -149,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -158,13 +157,12 @@
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
SImode, NON_PREFIXED_DS))"
- [(set (match_dup 0) (sign_extend:SI (match_dup 1)))
+ [(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -192,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -207,7 +205,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 1a8419d41ef..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -61,14 +61,6 @@ sub gen_ld_cmpi_p10_one
my $mempred = "non_update_memory_operand";
my $extend;
- # We need to special case lwa. The prefixed_load_p function in rs6000.cc
- # (which determines if a load instruction is prefixed) uses the fact that the
- # register mode is different from the memory mode, and that the sign_extend
- # attribute is set to use DS-form rules for the address instead of D-form.
- # If the register size is the same, prefixed_load_p assumes we are doing a
- # lwz.
- my $lwa_insn = ($lmode eq "SI" && $ccmode eq "CC");
-
if ($ccmode eq "CC") {
# ld and lwa are both DS-FORM.
($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
@@ -99,15 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
-
- # DS-form addresses need YZ, and not m.
- my $constraint = ($mempred eq "ds_form_mem_operand") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -137,12 +126,7 @@ HERE
${lmode}mode, ${np}))"
HERE
- # prefixed_load_p needs to see the register mode being different than the
- # memory insn in order to validate lwa as a DS-form instruction and not a
- # D-form instruction.
- if ($lwa_insn && $extend eq "none") {
- print " [(set (match_dup 0) (sign_extend:${clobbermode} (match_dup 1)))\n";
- } elsif ($extend eq "none") {
+ if ($extend eq "none") {
print " [(set (match_dup 0) (match_dup 1))\n";
} elsif ($result eq "clobber") {
print " [(set (match_dup 0) (${extend}_extend:${clobbermode} (match_dup 1)))\n";
@@ -156,15 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
-
- if ($lwa_insn) {
- # prefixed_load_p needs the sign_extend attribute to validate lwa as a
- # DS-form instruction instead of D-form.
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
-
- print <<HERE
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 75c5e5fc93d..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -287,7 +287,7 @@
;; Whether this insn has a prefixed form and a non-prefixed form.
(define_attr "maybe_prefixed" "no,yes"
(if_then_else (eq_attr "type" "load,fpload,vecload,store,fpstore,vecstore,
- integer,add,fused_load_cmpi")
+ integer,add")
(const_string "yes")
(const_string "no")))
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-09 22:07 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-09 22:07 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:c65e758acd515db117a7bc53f14588d4c8df5a2d
commit c65e758acd515db117a7bc53f14588d4c8df5a2d
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jun 9 18:07:54 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 39 +++++++++++++----------------
gcc/config/rs6000/genfusion.pl | 26 +++----------------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 -------------------
4 files changed, 22 insertions(+), 71 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index be1f6384c5d..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -103,25 +103,24 @@
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
-;; load mode is SI result mode is clobber compare mode is CC extend is sign
-(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_sign"
+;; load mode is SI result mode is clobber compare mode is CC extend is none
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
- (clobber (match_scratch:DI 0 "=r"))]
+ (clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
"lwa%X1 %0,%1\;cmpdi %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
- [(set (match_dup 0) (sign_extend:DI (match_dup 1)))
+ SImode, NON_PREFIXED_DS))"
+ [(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -146,10 +145,10 @@
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
-;; load mode is SI result mode is SI compare mode is CC extend is sign
-(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_sign"
+;; load mode is SI result mode is SI compare mode is CC extend is none
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -157,14 +156,13 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
- [(set (match_dup 0) (sign_extend:SI (match_dup 1)))
+ SImode, NON_PREFIXED_DS))"
+ [(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -192,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -200,14 +198,13 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (sign_extend:EXTSI (match_dup 1)))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -250,7 +247,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -293,7 +289,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 7016f9c7512..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -59,17 +59,12 @@ sub gen_ld_cmpi_p10_one
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
- my $lmode_prefix_call = $lmode;
my $extend;
if ($ccmode eq "CC") {
- # ld and lwa are both DS-FORM. lwa needs to pass DImode to
- # address_is_non_pfx_d_or_x so that it is properly treated as a DS mode
- # instruction.
+ # ld and lwa are both DS-FORM.
($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
- ($lmode eq "DI") and $mempred = "ds_form_mem_operand";
- ($lmode eq "SI") and $mempred = "lwa_operand";
- ($lmode eq "SI") and $lmode_prefix_call = "DI";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -86,28 +81,22 @@ sub gen_ld_cmpi_p10_one
# For clobber, we need a SI/DI reg in case we
# split because we have to sign/zero extend.
- # for lwa, we need a DImode temporary to properly signal that
- # lwa is a ds-form instruction.
my $clobbermode = ($lmode =~ /^[QH]I$/) ? "GPR" : $lmode;
if ($result =~ /^EXT/ || $result eq "GPR" || $clobbermode eq "GPR") {
# We always need extension if result > lmode.
$extend = ($ccmode eq "CC") ? "sign" : "zero";
- } elsif ($ccmode eq "CC" && $lmode eq "SI") {
- $clobbermode = "DI";
- $extend = "sign";
} else {
# Result of SI/DI does not need sign extension.
$extend = "none";
}
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -134,7 +123,7 @@ HERE
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- ${lmode_prefix_call}mode, ${np}))"
+ ${lmode}mode, ${np}))"
HERE
if ($extend eq "none") {
@@ -151,13 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
-
- if ($ccmode eq "CC" && $lmode ne "DI") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
-
- print <<HERE
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ed2f06e56ac..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-09 16:53 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-09 16:53 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:7fdfc5e617b0cd5b1524b4783b6ec1cba8842a7c
commit 7fdfc5e617b0cd5b1524b4783b6ec1cba8842a7c
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jun 9 12:53:10 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 25 ++++++++++---------------
gcc/config/rs6000/genfusion.pl | 17 +++--------------
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 --------------------------
3 files changed, 13 insertions(+), 55 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 20af9b66fcf..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -106,7 +106,7 @@
;; load mode is SI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -114,14 +114,13 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -149,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -157,14 +156,13 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -192,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -200,14 +198,13 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (sign_extend:EXTSI (match_dup 1)))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -250,7 +247,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -293,7 +289,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 622ef211b4c..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -59,15 +59,12 @@ sub gen_ld_cmpi_p10_one
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
- my $lmode_prefix_call = $lmode;
my $extend;
if ($ccmode eq "CC") {
- # ld and lwa are both DS-FORM. lwa needs to use lwa_operand to properly
- # reject prefixed addresses.
+ # ld and lwa are both DS-FORM.
($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
- ($lmode eq "SI") and $lmode_prefix_call = "DI";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -94,13 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -127,7 +123,7 @@ HERE
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- ${lmode_prefix_call}mode, ${np}))"
+ ${lmode}mode, ${np}))"
HERE
if ($extend eq "none") {
@@ -144,13 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
-
- if ($ccmode eq "CC" && $lmode ne "DI") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
-
- print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-09 5:47 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-09 5:47 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f0bbe68fac986be3d19079204eff36d411196d13
commit f0bbe68fac986be3d19079204eff36d411196d13
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jun 9 01:47:09 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 19 +++++++------------
gcc/config/rs6000/genfusion.pl | 16 +++-------------
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 --------------------------
3 files changed, 10 insertions(+), 51 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index bdcb2aba4fe..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -106,7 +106,7 @@
;; load mode is SI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -121,7 +121,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -149,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -164,7 +163,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -192,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -207,7 +205,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -250,7 +247,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -293,7 +289,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 44a2e2ab4c3..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -62,11 +62,9 @@ sub gen_ld_cmpi_p10_one
my $extend;
if ($ccmode eq "CC") {
- # ld and lwa are both DS-FORM. lwa needs to use lwa_operand to properly
- # reject prefixed addresses.
+ # ld and lwa are both DS-FORM.
($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
- ($lmode eq "DI") and $mempred = "ds_form_mem_operand";
- ($lmode eq "SI") and $mempred = "lwa_operand";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -93,13 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -143,13 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
-
- if ($ccmode eq "CC" && $lmode ne "DI") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
-
- print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-09 3:18 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-09 3:18 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:58c44f326ff9a73311bf10622154296ef9e5b8f5
commit 58c44f326ff9a73311bf10622154296ef9e5b8f5
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 8 23:18:40 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 25 ++++++++++---------------
gcc/config/rs6000/genfusion.pl | 27 +++++----------------------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 --------------------------
4 files changed, 16 insertions(+), 64 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index b7c9035e882..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -106,7 +106,7 @@
;; load mode is SI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -114,14 +114,13 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -149,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -157,14 +156,13 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -192,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -200,14 +198,13 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (sign_extend:EXTSI (match_dup 1)))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -250,7 +247,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -293,7 +289,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 599bd3ad19b..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -57,23 +57,14 @@ sub gen_ld_cmpi_p10_one
{
my ($lmode, $result, $ccmode) = @_;
- my $lmode_prefix_call = $lmode;
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
my $extend;
if ($ccmode eq "CC") {
- # ld and lwa are both DS-FORM. lwa needs to use lwa_operand and also
- # call address_is_non_pfx_d_or_x with DImode, not SImode to properly
- # handle recognizing whether the address is prefixed.
- if ($lmode eq "DI") {
- $np = "NON_PREFIXED_DS";
- $mempred = "ds_form_mem_operand";
- } elsif ($lmode eq "SI") {
- $np = "NON_PREFIXED_DS";
- $mempred = "lwa_operand";
- $lmode_prefix_call = "DI";
- }
+ # ld and lwa are both DS-FORM.
+ ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -100,13 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -133,7 +123,7 @@ HERE
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- ${lmode_prefix_call}mode, ${np}))"
+ ${lmode}mode, ${np}))"
HERE
if ($extend eq "none") {
@@ -150,13 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
-
- if ($ccmode eq "CC" && $lmode ne "DI") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
-
- print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ed2f06e56ac..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-09 1:27 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-09 1:27 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:e4476bf79a8ae731bb98a6bb2c1d208048289bf1
commit e4476bf79a8ae731bb98a6bb2c1d208048289bf1
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 8 21:27:34 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 25 ++++++++++---------------
gcc/config/rs6000/genfusion.pl | 27 +++++----------------------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 --------------------------
4 files changed, 16 insertions(+), 64 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index b7c9035e882..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -106,7 +106,7 @@
;; load mode is SI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -114,14 +114,13 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -149,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -157,14 +156,13 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -192,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -200,14 +198,13 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- DImode, NON_PREFIXED_DS))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (sign_extend:EXTSI (match_dup 1)))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -250,7 +247,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -293,7 +289,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 599bd3ad19b..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -57,23 +57,14 @@ sub gen_ld_cmpi_p10_one
{
my ($lmode, $result, $ccmode) = @_;
- my $lmode_prefix_call = $lmode;
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
my $extend;
if ($ccmode eq "CC") {
- # ld and lwa are both DS-FORM. lwa needs to use lwa_operand and also
- # call address_is_non_pfx_d_or_x with DImode, not SImode to properly
- # handle recognizing whether the address is prefixed.
- if ($lmode eq "DI") {
- $np = "NON_PREFIXED_DS";
- $mempred = "ds_form_mem_operand";
- } elsif ($lmode eq "SI") {
- $np = "NON_PREFIXED_DS";
- $mempred = "lwa_operand";
- $lmode_prefix_call = "DI";
- }
+ # ld and lwa are both DS-FORM.
+ ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -100,13 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -133,7 +123,7 @@ HERE
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- ${lmode_prefix_call}mode, ${np}))"
+ ${lmode}mode, ${np}))"
HERE
if ($extend eq "none") {
@@ -150,13 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
-
- if ($ccmode eq "CC" && $lmode ne "DI") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
-
- print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ed2f06e56ac..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-09 1:26 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-09 1:26 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:e2e005c467989870e0cb2321cf076499998db176
commit e2e005c467989870e0cb2321cf076499998db176
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 8 21:26:36 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 25 +++++++++++++++----------
gcc/config/rs6000/genfusion.pl | 27 ++++++++++++++++++++++-----
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 ++++++++++++++++++++++++++
4 files changed, 64 insertions(+), 16 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index d45fb138a70..b7c9035e882 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -106,7 +106,7 @@
;; load mode is SI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
+ (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -114,13 +114,14 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- SImode, NON_PREFIXED_DS))"
+ DImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
+ (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -148,7 +149,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
+ (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -156,13 +157,14 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- SImode, NON_PREFIXED_DS))"
+ DImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
+ (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -190,7 +192,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
+ (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -198,13 +200,14 @@
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- SImode, NON_PREFIXED_DS))"
+ DImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (sign_extend:EXTSI (match_dup 1)))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
+ (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -247,6 +250,7 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
+ (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -289,6 +293,7 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
+ (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 82e8f863b02..599bd3ad19b 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -57,14 +57,23 @@ sub gen_ld_cmpi_p10_one
{
my ($lmode, $result, $ccmode) = @_;
+ my $lmode_prefix_call = $lmode;
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
my $extend;
if ($ccmode eq "CC") {
- # ld and lwa are both DS-FORM.
- ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
- ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
+ # ld and lwa are both DS-FORM. lwa needs to use lwa_operand and also
+ # call address_is_non_pfx_d_or_x with DImode, not SImode to properly
+ # handle recognizing whether the address is prefixed.
+ if ($lmode eq "DI") {
+ $np = "NON_PREFIXED_DS";
+ $mempred = "ds_form_mem_operand";
+ } elsif ($lmode eq "SI") {
+ $np = "NON_PREFIXED_DS";
+ $mempred = "lwa_operand";
+ $lmode_prefix_call = "DI";
+ }
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -91,12 +100,13 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
+ my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -123,7 +133,7 @@ HERE
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- ${lmode}mode, ${np}))"
+ ${lmode_prefix_call}mode, ${np}))"
HERE
if ($extend eq "none") {
@@ -140,6 +150,13 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
+HERE
+
+ if ($ccmode eq "CC" && $lmode ne "DI") {
+ print " (set_attr \"sign_extend\" \"yes\")\n";
+ }
+
+ print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index b0db8ae508d..ed2f06e56ac 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload")
+ (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
new file mode 100644
index 00000000000..d0e66a0b897
--- /dev/null
+++ b/gcc/testsuite/g++.target/powerpc/pr105325.C
@@ -0,0 +1,26 @@
+/* { dg-do assemble } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
+
+/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
+ instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
+ load + compare -1/0/1 patterns did not handle the possibility that the load
+ might be prefixed. The -fstack-protector option is needed to show the
+ bug. */
+
+struct Ath__array1D {
+ int _current;
+ int getCnt() { return _current; }
+};
+struct extMeasure {
+ int _mapTable[10000];
+ Ath__array1D _metRCTable;
+};
+void measureRC() {
+ extMeasure m;
+ for (; m._metRCTable.getCnt();)
+ for (;;)
+ ;
+}
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-09 0:36 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-09 0:36 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:5ac8986bbc4445b5c10db381c9ceca65da794be1
commit 5ac8986bbc4445b5c10db381c9ceca65da794be1
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 8 20:36:14 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 22 +++++++--------
gcc/config/rs6000/genfusion.pl | 33 ++++++----------------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 -----------------
.../gcc.target/powerpc/fusion-p10-ldcmpi.c | 15 ++++------
5 files changed, 25 insertions(+), 73 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 5b82c61e959..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -104,17 +104,17 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is clobber compare mode is CC extend is none
-(define_insn_and_split "*lwz_cmpwi_cr0_SI_clobber_CC_none"
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
- "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
+ "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- SImode, NON_PREFIXED_D))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
@@ -148,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -163,7 +163,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -191,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -206,7 +205,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 310ac5f359a..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -57,26 +57,14 @@ sub gen_ld_cmpi_p10_one
{
my ($lmode, $result, $ccmode) = @_;
- my $cmp_size = "d";
- my $echr = ($ccmode eq "CC") ? "a" : "z";
- if ($lmode eq "DI") { $echr = ""; }
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
my $extend;
if ($ccmode eq "CC") {
- # if we would generate lwa and just want the CC value, generate lwz instead
- # and use cmpwi. This allows us to avoid the ds-form restrictions on lwa.
- if ($lmode eq "SI" && $result eq "clobber") {
- $echr = "z";
- $cmp_size = "w";
-
- } else {
- # ld and lwa are both DS-FORM, use LWA_OPERAND for LWA
- ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
- ($lmode eq "DI") and $mempred = "ds_form_mem_operand";
- ($lmode eq "SI") and $mempred = "lwa_operand";
- }
+ # ld and lwa are both DS-FORM.
+ ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -86,6 +74,8 @@ sub gen_ld_cmpi_p10_one
}
my $cmpl = ($ccmode eq "CC") ? "" : "l";
+ my $echr = ($ccmode eq "CC") ? "a" : "z";
+ if ($lmode eq "DI") { $echr = ""; }
my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand"
: "const_0_to_1_operand";
@@ -101,13 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
-(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}${cmp_size}i_cr0_${lmode}_${result}_${ccmode}_${extend}"
+(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -130,7 +119,7 @@ HERE
print <<HERE;
"(TARGET_P10_FUSION)"
- "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}${cmp_size}i %2,%0,%3"
+ "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
@@ -151,12 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
- # prefixed_load_p looks at sign_extend to deal with lwa.
- if ($mempred eq "lwa_operand") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
- print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ed2f06e56ac..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index 9902a340e0f..526a026d874 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -60,22 +60,19 @@ TEST(int8_t)
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 1 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 16 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none" 8 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_GPR_CCUNS_zero" 2 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_EXTHI_CC_sign" 4 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_EXTHI_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 36 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none" 16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 9 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target ilp32 } } } */
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-08 21:18 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-08 21:18 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f2cac6245ef61cb97010eba3270b3535ca139650
commit f2cac6245ef61cb97010eba3270b3535ca139650
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 8 17:18:42 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 22 +++++++--------
gcc/config/rs6000/genfusion.pl | 33 ++++++----------------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 -----------------
.../gcc.target/powerpc/fusion-p10-ldcmpi.c | 15 ++++------
5 files changed, 25 insertions(+), 73 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 5b82c61e959..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -104,17 +104,17 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is clobber compare mode is CC extend is none
-(define_insn_and_split "*lwz_cmpwi_cr0_SI_clobber_CC_none"
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
- "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
+ "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- SImode, NON_PREFIXED_D))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
@@ -148,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -163,7 +163,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -191,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -206,7 +205,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 310ac5f359a..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -57,26 +57,14 @@ sub gen_ld_cmpi_p10_one
{
my ($lmode, $result, $ccmode) = @_;
- my $cmp_size = "d";
- my $echr = ($ccmode eq "CC") ? "a" : "z";
- if ($lmode eq "DI") { $echr = ""; }
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
my $extend;
if ($ccmode eq "CC") {
- # if we would generate lwa and just want the CC value, generate lwz instead
- # and use cmpwi. This allows us to avoid the ds-form restrictions on lwa.
- if ($lmode eq "SI" && $result eq "clobber") {
- $echr = "z";
- $cmp_size = "w";
-
- } else {
- # ld and lwa are both DS-FORM, use LWA_OPERAND for LWA
- ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
- ($lmode eq "DI") and $mempred = "ds_form_mem_operand";
- ($lmode eq "SI") and $mempred = "lwa_operand";
- }
+ # ld and lwa are both DS-FORM.
+ ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -86,6 +74,8 @@ sub gen_ld_cmpi_p10_one
}
my $cmpl = ($ccmode eq "CC") ? "" : "l";
+ my $echr = ($ccmode eq "CC") ? "a" : "z";
+ if ($lmode eq "DI") { $echr = ""; }
my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand"
: "const_0_to_1_operand";
@@ -101,13 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
-(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}${cmp_size}i_cr0_${lmode}_${result}_${ccmode}_${extend}"
+(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -130,7 +119,7 @@ HERE
print <<HERE;
"(TARGET_P10_FUSION)"
- "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}${cmp_size}i %2,%0,%3"
+ "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
@@ -151,12 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
- # prefixed_load_p looks at sign_extend to deal with lwa.
- if ($mempred eq "lwa_operand") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
- print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ed2f06e56ac..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index 29762ba3a47..526a026d874 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -60,22 +60,19 @@ TEST(int8_t)
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 1 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 16 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none" 8 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_GPR_CCUNS_zero" 2 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_EXTHI_CC_sign" 4 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_EXTHI_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 36 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none" 8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 9 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target ilp32 } } } */
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-08 20:22 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-08 20:22 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:a0ba7e571dfb64d08d6b141697c5165306e00d73
commit a0ba7e571dfb64d08d6b141697c5165306e00d73
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 8 16:22:20 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 22 +++++++--------
gcc/config/rs6000/genfusion.pl | 33 ++++++----------------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 -----------------
.../gcc.target/powerpc/fusion-p10-ldcmpi.c | 15 ++++------
5 files changed, 25 insertions(+), 73 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 5b82c61e959..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -104,17 +104,17 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is clobber compare mode is CC extend is none
-(define_insn_and_split "*lwz_cmpwi_cr0_SI_clobber_CC_none"
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
- "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
+ "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- SImode, NON_PREFIXED_D))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
@@ -148,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -163,7 +163,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -191,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -206,7 +205,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 310ac5f359a..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -57,26 +57,14 @@ sub gen_ld_cmpi_p10_one
{
my ($lmode, $result, $ccmode) = @_;
- my $cmp_size = "d";
- my $echr = ($ccmode eq "CC") ? "a" : "z";
- if ($lmode eq "DI") { $echr = ""; }
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
my $extend;
if ($ccmode eq "CC") {
- # if we would generate lwa and just want the CC value, generate lwz instead
- # and use cmpwi. This allows us to avoid the ds-form restrictions on lwa.
- if ($lmode eq "SI" && $result eq "clobber") {
- $echr = "z";
- $cmp_size = "w";
-
- } else {
- # ld and lwa are both DS-FORM, use LWA_OPERAND for LWA
- ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
- ($lmode eq "DI") and $mempred = "ds_form_mem_operand";
- ($lmode eq "SI") and $mempred = "lwa_operand";
- }
+ # ld and lwa are both DS-FORM.
+ ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -86,6 +74,8 @@ sub gen_ld_cmpi_p10_one
}
my $cmpl = ($ccmode eq "CC") ? "" : "l";
+ my $echr = ($ccmode eq "CC") ? "a" : "z";
+ if ($lmode eq "DI") { $echr = ""; }
my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand"
: "const_0_to_1_operand";
@@ -101,13 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
-(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}${cmp_size}i_cr0_${lmode}_${result}_${ccmode}_${extend}"
+(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -130,7 +119,7 @@ HERE
print <<HERE;
"(TARGET_P10_FUSION)"
- "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}${cmp_size}i %2,%0,%3"
+ "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
@@ -151,12 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
- # prefixed_load_p looks at sign_extend to deal with lwa.
- if ($mempred eq "lwa_operand") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
- print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ed2f06e56ac..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index 29762ba3a47..526a026d874 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -60,22 +60,19 @@ TEST(int8_t)
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 1 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 16 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none" 8 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_GPR_CCUNS_zero" 2 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_EXTHI_CC_sign" 4 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_EXTHI_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 36 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none" 8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 9 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target ilp32 } } } */
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-08 20:20 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-08 20:20 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:06c3d3a7900b91f06a1933c71bf51bb0b5540a06
commit 06c3d3a7900b91f06a1933c71bf51bb0b5540a06
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 8 16:20:06 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 22 ++++++++-------
gcc/config/rs6000/genfusion.pl | 33 ++++++++++++++++------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 +++++++++++++++++
.../gcc.target/powerpc/fusion-p10-ldcmpi.c | 15 ++++++----
5 files changed, 73 insertions(+), 25 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index d45fb138a70..5b82c61e959 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -104,17 +104,17 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is clobber compare mode is CC extend is none
-(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
+(define_insn_and_split "*lwz_cmpwi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
+ (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
- "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
+ "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- SImode, NON_PREFIXED_DS))"
+ SImode, NON_PREFIXED_D))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
@@ -148,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
+ (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -163,6 +163,7 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
+ (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -190,7 +191,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
+ (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -205,6 +206,7 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
+ (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 82e8f863b02..310ac5f359a 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -57,14 +57,26 @@ sub gen_ld_cmpi_p10_one
{
my ($lmode, $result, $ccmode) = @_;
+ my $cmp_size = "d";
+ my $echr = ($ccmode eq "CC") ? "a" : "z";
+ if ($lmode eq "DI") { $echr = ""; }
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
my $extend;
if ($ccmode eq "CC") {
- # ld and lwa are both DS-FORM.
- ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
- ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
+ # if we would generate lwa and just want the CC value, generate lwz instead
+ # and use cmpwi. This allows us to avoid the ds-form restrictions on lwa.
+ if ($lmode eq "SI" && $result eq "clobber") {
+ $echr = "z";
+ $cmp_size = "w";
+
+ } else {
+ # ld and lwa are both DS-FORM, use LWA_OPERAND for LWA
+ ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
+ ($lmode eq "DI") and $mempred = "ds_form_mem_operand";
+ ($lmode eq "SI") and $mempred = "lwa_operand";
+ }
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -74,8 +86,6 @@ sub gen_ld_cmpi_p10_one
}
my $cmpl = ($ccmode eq "CC") ? "" : "l";
- my $echr = ($ccmode eq "CC") ? "a" : "z";
- if ($lmode eq "DI") { $echr = ""; }
my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand"
: "const_0_to_1_operand";
@@ -91,12 +101,13 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
+ my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
-(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
+(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}${cmp_size}i_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -119,7 +130,7 @@ HERE
print <<HERE;
"(TARGET_P10_FUSION)"
- "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3"
+ "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}${cmp_size}i %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
@@ -140,6 +151,12 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
+HERE
+ # prefixed_load_p looks at sign_extend to deal with lwa.
+ if ($mempred eq "lwa_operand") {
+ print " (set_attr \"sign_extend\" \"yes\")\n";
+ }
+ print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index b0db8ae508d..ed2f06e56ac 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload")
+ (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
new file mode 100644
index 00000000000..d0e66a0b897
--- /dev/null
+++ b/gcc/testsuite/g++.target/powerpc/pr105325.C
@@ -0,0 +1,26 @@
+/* { dg-do assemble } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
+
+/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
+ instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
+ load + compare -1/0/1 patterns did not handle the possibility that the load
+ might be prefixed. The -fstack-protector option is needed to show the
+ bug. */
+
+struct Ath__array1D {
+ int _current;
+ int getCnt() { return _current; }
+};
+struct extMeasure {
+ int _mapTable[10000];
+ Ath__array1D _metRCTable;
+};
+void measureRC() {
+ extMeasure m;
+ for (; m._metRCTable.getCnt();)
+ for (;;)
+ ;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index 526a026d874..29762ba3a47 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -60,19 +60,22 @@ TEST(int8_t)
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 1 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 16 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none" 8 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_GPR_CCUNS_zero" 2 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_EXTHI_CC_sign" 4 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 9 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_EXTHI_CCUNS_zero" 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 36 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none" 8 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 6 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target ilp32 } } } */
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-08 20:16 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-08 20:16 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:2325693f80967d5b6424f0103b56b95d2ab0c53d
commit 2325693f80967d5b6424f0103b56b95d2ab0c53d
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 8 16:16:09 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 22 +++++++--------
gcc/config/rs6000/genfusion.pl | 33 ++++++----------------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 -----------------
.../gcc.target/powerpc/fusion-p10-ldcmpi.c | 15 ++++------
5 files changed, 25 insertions(+), 73 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 5b82c61e959..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -104,17 +104,17 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is clobber compare mode is CC extend is none
-(define_insn_and_split "*lwz_cmpwi_cr0_SI_clobber_CC_none"
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
- "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
+ "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- SImode, NON_PREFIXED_D))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
@@ -148,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -163,7 +163,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -191,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -206,7 +205,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 310ac5f359a..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -57,26 +57,14 @@ sub gen_ld_cmpi_p10_one
{
my ($lmode, $result, $ccmode) = @_;
- my $cmp_size = "d";
- my $echr = ($ccmode eq "CC") ? "a" : "z";
- if ($lmode eq "DI") { $echr = ""; }
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
my $extend;
if ($ccmode eq "CC") {
- # if we would generate lwa and just want the CC value, generate lwz instead
- # and use cmpwi. This allows us to avoid the ds-form restrictions on lwa.
- if ($lmode eq "SI" && $result eq "clobber") {
- $echr = "z";
- $cmp_size = "w";
-
- } else {
- # ld and lwa are both DS-FORM, use LWA_OPERAND for LWA
- ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
- ($lmode eq "DI") and $mempred = "ds_form_mem_operand";
- ($lmode eq "SI") and $mempred = "lwa_operand";
- }
+ # ld and lwa are both DS-FORM.
+ ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -86,6 +74,8 @@ sub gen_ld_cmpi_p10_one
}
my $cmpl = ($ccmode eq "CC") ? "" : "l";
+ my $echr = ($ccmode eq "CC") ? "a" : "z";
+ if ($lmode eq "DI") { $echr = ""; }
my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand"
: "const_0_to_1_operand";
@@ -101,13 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
-(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}${cmp_size}i_cr0_${lmode}_${result}_${ccmode}_${extend}"
+(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -130,7 +119,7 @@ HERE
print <<HERE;
"(TARGET_P10_FUSION)"
- "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}${cmp_size}i %2,%0,%3"
+ "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
@@ -151,12 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
- # prefixed_load_p looks at sign_extend to deal with lwa.
- if ($mempred eq "lwa_operand") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
- print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ed2f06e56ac..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index 4f655f0b90c..526a026d874 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -60,22 +60,19 @@ TEST(int8_t)
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 1 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 16 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none" 8 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_GPR_CCUNS_zero" 2 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_EXTHI_CC_sign" 4 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_EXTHI_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 36 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpdi_cr0_SI_clobber_CC_none" 16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 9 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target ilp32 } } } */
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-08 15:56 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-08 15:56 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:43135fbe6d8d165ba26a61ae68e6b8c56590e008
commit 43135fbe6d8d165ba26a61ae68e6b8c56590e008
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 8 11:56:24 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 22 +++++++--------
gcc/config/rs6000/genfusion.pl | 33 ++++++----------------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 -----------------
.../gcc.target/powerpc/fusion-p10-ldcmpi.c | 15 ++++------
5 files changed, 25 insertions(+), 73 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 5b82c61e959..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -104,17 +104,17 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is clobber compare mode is CC extend is none
-(define_insn_and_split "*lwz_cmpwi_cr0_SI_clobber_CC_none"
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
- "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
+ "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- SImode, NON_PREFIXED_D))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
@@ -148,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -163,7 +163,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -191,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -206,7 +205,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 310ac5f359a..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -57,26 +57,14 @@ sub gen_ld_cmpi_p10_one
{
my ($lmode, $result, $ccmode) = @_;
- my $cmp_size = "d";
- my $echr = ($ccmode eq "CC") ? "a" : "z";
- if ($lmode eq "DI") { $echr = ""; }
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
my $extend;
if ($ccmode eq "CC") {
- # if we would generate lwa and just want the CC value, generate lwz instead
- # and use cmpwi. This allows us to avoid the ds-form restrictions on lwa.
- if ($lmode eq "SI" && $result eq "clobber") {
- $echr = "z";
- $cmp_size = "w";
-
- } else {
- # ld and lwa are both DS-FORM, use LWA_OPERAND for LWA
- ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
- ($lmode eq "DI") and $mempred = "ds_form_mem_operand";
- ($lmode eq "SI") and $mempred = "lwa_operand";
- }
+ # ld and lwa are both DS-FORM.
+ ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -86,6 +74,8 @@ sub gen_ld_cmpi_p10_one
}
my $cmpl = ($ccmode eq "CC") ? "" : "l";
+ my $echr = ($ccmode eq "CC") ? "a" : "z";
+ if ($lmode eq "DI") { $echr = ""; }
my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand"
: "const_0_to_1_operand";
@@ -101,13 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
-(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}${cmp_size}i_cr0_${lmode}_${result}_${ccmode}_${extend}"
+(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -130,7 +119,7 @@ HERE
print <<HERE;
"(TARGET_P10_FUSION)"
- "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}${cmp_size}i %2,%0,%3"
+ "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
@@ -151,12 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
- # prefixed_load_p looks at sign_extend to deal with lwa.
- if ($mempred eq "lwa_operand") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
- print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ed2f06e56ac..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index 3a7a16be5d0..526a026d874 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -60,22 +60,19 @@ TEST(int8_t)
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 1 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 16 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpdi_cr0_SI_clobber_CC_none" 8 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_GPR_CCUNS_zero" 2 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_EXTHI_CC_sign" 4 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_EXTHI_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_SI_CC_none" 36 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpdi_cr0_SI_clobber_CC_none" 16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 9 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target ilp32 } } } */
^ permalink raw reply [flat|nested] 16+ messages in thread
* [gcc(refs/users/meissner/heads/work122)] Revert patches
@ 2023-06-08 14:20 Michael Meissner
0 siblings, 0 replies; 16+ messages in thread
From: Michael Meissner @ 2023-06-08 14:20 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:616916bc6702ea2f1e447010f4e6c15474d23f09
commit 616916bc6702ea2f1e447010f4e6c15474d23f09
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 8 10:20:38 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 44 +++++++++++-----------
gcc/config/rs6000/genfusion.pl | 36 ++++--------------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 -------------
.../gcc.target/powerpc/fusion-p10-ldcmpi.c | 31 +++++++--------
5 files changed, 44 insertions(+), 95 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 4444e3315dd..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -104,17 +104,17 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is clobber compare mode is CC extend is none
-(define_insn_and_split "*lwz_cmpsi_cr0_SI_clobber_CC_none"
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
- "lwz%X1 %0,%1\;cmpwi %2,%0,%3"
+ "lwa%X1 %0,%1\;cmpdi %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
- SImode, NON_PREFIXED_D))"
+ SImode, NON_PREFIXED_DS))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
@@ -125,7 +125,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is clobber compare mode is CCUNS extend is none
-(define_insn_and_split "*lwz_cmplsi_cr0_SI_clobber_CCUNS_none"
+(define_insn_and_split "*lwz_cmpldi_cr0_SI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:SI 1 "non_update_memory_operand" "m")
(match_operand:SI 3 "const_0_to_1_operand" "n")))
@@ -146,9 +146,9 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is SI compare mode is CC extend is none
-(define_insn_and_split "*lwa_cmpsi_cr0_SI_SI_CC_none"
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -163,12 +163,11 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is SI compare mode is CCUNS extend is none
-(define_insn_and_split "*lwz_cmplsi_cr0_SI_SI_CCUNS_none"
+(define_insn_and_split "*lwz_cmpldi_cr0_SI_SI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:SI 1 "non_update_memory_operand" "m")
(match_operand:SI 3 "const_0_to_1_operand" "n")))
@@ -189,9 +188,9 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
-(define_insn_and_split "*lwa_cmp<mode>_cr0_SI_EXTSI_CC_sign"
+(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -206,12 +205,11 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is SI result mode is EXTSI compare mode is CCUNS extend is zero
-(define_insn_and_split "*lwz_cmpl<mode>_cr0_SI_EXTSI_CCUNS_zero"
+(define_insn_and_split "*lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:SI 1 "non_update_memory_operand" "m")
(match_operand:SI 3 "const_0_to_1_operand" "n")))
@@ -232,7 +230,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is HI result mode is clobber compare mode is CC extend is sign
-(define_insn_and_split "*lha_cmp<mode>_cr0_HI_clobber_CC_sign"
+(define_insn_and_split "*lha_cmpdi_cr0_HI_clobber_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
(compare:CC (match_operand:HI 1 "non_update_memory_operand" "m")
(match_operand:HI 3 "const_m1_to_1_operand" "n")))
@@ -253,7 +251,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is HI result mode is clobber compare mode is CCUNS extend is zero
-(define_insn_and_split "*lhz_cmpl<mode>_cr0_HI_clobber_CCUNS_zero"
+(define_insn_and_split "*lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:HI 1 "non_update_memory_operand" "m")
(match_operand:HI 3 "const_0_to_1_operand" "n")))
@@ -274,7 +272,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is HI result mode is EXTHI compare mode is CC extend is sign
-(define_insn_and_split "*lha_cmp<mode>_cr0_HI_EXTHI_CC_sign"
+(define_insn_and_split "*lha_cmpdi_cr0_HI_EXTHI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
(compare:CC (match_operand:HI 1 "non_update_memory_operand" "m")
(match_operand:HI 3 "const_m1_to_1_operand" "n")))
@@ -295,7 +293,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is HI result mode is EXTHI compare mode is CCUNS extend is zero
-(define_insn_and_split "*lhz_cmpl<mode>_cr0_HI_EXTHI_CCUNS_zero"
+(define_insn_and_split "*lhz_cmpldi_cr0_HI_EXTHI_CCUNS_zero"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:HI 1 "non_update_memory_operand" "m")
(match_operand:HI 3 "const_0_to_1_operand" "n")))
@@ -316,7 +314,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is QI result mode is clobber compare mode is CCUNS extend is zero
-(define_insn_and_split "*lbz_cmpl<mode>_cr0_QI_clobber_CCUNS_zero"
+(define_insn_and_split "*lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:QI 1 "non_update_memory_operand" "m")
(match_operand:QI 3 "const_0_to_1_operand" "n")))
@@ -337,7 +335,7 @@
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is QI result mode is GPR compare mode is CCUNS extend is zero
-(define_insn_and_split "*lbz_cmpl<mode>_cr0_QI_GPR_CCUNS_zero"
+(define_insn_and_split "*lbz_cmpldi_cr0_QI_GPR_CCUNS_zero"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
(compare:CCUNS (match_operand:QI 1 "non_update_memory_operand" "m")
(match_operand:QI 3 "const_0_to_1_operand" "n")))
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 42517b3bce7..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -57,26 +57,14 @@ sub gen_ld_cmpi_p10_one
{
my ($lmode, $result, $ccmode) = @_;
- my $cmp_size = "d";
- my $echr = ($ccmode eq "CC") ? "a" : "z";
- if ($lmode eq "DI") { $echr = ""; }
my $np = "NON_PREFIXED_D";
my $mempred = "non_update_memory_operand";
my $extend;
if ($ccmode eq "CC") {
- # if we would generate lwa and just want the CC value, generate lwz instead
- # and use cmpwi. This allows us to avoid the ds-form restrictions on lwa.
- if ($lmode eq "SI" && $result eq "clobber") {
- $echr = "z";
- $cmp_size = "w";
-
- } else {
- # ld and lwa are both DS-FORM, use LWA_OPERAND for LWA
- ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
- ($lmode eq "DI") and $mempred = "ds_form_mem_operand";
- ($lmode eq "SI") and $mempred = "lwa_operand";
- }
+ # ld and lwa are both DS-FORM.
+ ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
+ ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand";
} else {
if ($lmode eq "DI") {
# ld is DS-form, but lwz is not.
@@ -86,6 +74,8 @@ sub gen_ld_cmpi_p10_one
}
my $cmpl = ($ccmode eq "CC") ? "" : "l";
+ my $echr = ($ccmode eq "CC") ? "a" : "z";
+ if ($lmode eq "DI") { $echr = ""; }
my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand"
: "const_0_to_1_operand";
@@ -100,17 +90,13 @@ sub gen_ld_cmpi_p10_one
$extend = "none";
}
- my $load_mode = (($clobbermode eq "GPR" || $result =~ /^EXT/)
- ? "<mode>"
- : lc ($clobbermode));
my $ldst = mode_to_ldst_char($lmode);
- my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
-(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}${load_mode}_cr0_${lmode}_${result}_${ccmode}_${extend}"
+(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -133,7 +119,7 @@ HERE
print <<HERE;
"(TARGET_P10_FUSION)"
- "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}${cmp_size}i %2,%0,%3"
+ "l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3"
"&& reload_completed
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
@@ -154,12 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
- # prefixed_load_p looks at sign_extend to deal with lwa.
- if ($mempred eq "lwa_operand") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
- print <<HERE;
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ed2f06e56ac..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index 0dad2c10c2f..526a026d874 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -53,29 +53,26 @@ TEST(int16_t)
TEST(uint8_t)
TEST(int8_t)
-/* { dg-final { scan-assembler-times "lbz_cmplsi_cr0_QI_clobber_CCUNS_zero" 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" 4 { target lp64 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 4 { target lp64 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 4 { target lp64 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 1 { target lp64 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lha_cmpsi_cr0_HI_clobber_CC_sign" 16 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lhz_cmplsi_cr0_HI_clobber_CCUNS_zero" 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpsi_cr0_SI_SI_CC_none" 8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmplsi_cr0_SI_SI_CCUNS_none" 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmplsi_cr0_SI_clobber_CCUNS_none" 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpsi_cr0_SI_clobber_CC_none" 8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 16 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lbz_cmplsi_cr0_QI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lbz_cmplsi_cr0_QI_GPR_CCUNS_zero" 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 0 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lha_cmpsi_cr0_HI_clobber_CC_sign" 8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lha_cmpsi_cr0_HI_EXTHI_CC_sign" 4 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lhz_cmplsi_cr0_HI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lhz_cmplsi_cr0_HI_EXTHI_CCUNS_zero" 2 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpsi_cr0_SI_SI_CC_none" 36 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmpsi_cr0_SI_clobber_CC_none" 16 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmplsi_cr0_SI_clobber_CCUNS_none" 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwz_cmplsi_cr0_SI_SI_CCUNS_none" 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 8 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 9 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 6 { target ilp32 } } } */
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