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From: Christoph Muellner <cmuellner@gcc.gnu.org>
To: gcc-patches@gcc.gnu.org
Cc: Jim Wilson <jimw@sifive.com>, Kito Cheng <kito.cheng@sifive.com>,
	Christoph Muellner <cmuellner@gcc.gnu.org>
Subject: [PATCH 02/10] RISC-V: Emit proper memory ordering suffixes for AMOs [PR 100265]
Date: Mon, 26 Apr 2021 14:45:44 +0200	[thread overview]
Message-ID: <20210426124552.3316789-3-cmuellner@gcc.gnu.org> (raw)
In-Reply-To: <20210426124552.3316789-1-cmuellner@gcc.gnu.org>

The ratified A extension supports '.aq', '.rl' and '.aqrl' as
memory ordering suffixes. Let's emit them in case we get a '%A'
conversion specifier for riscv_print_operand().

As '%A' was already used for a similar, but restricted, purpose
(only '.aq' was emitted so far), this does not require any other
changes.

    gcc/
        PR 100265
        * config/riscv/riscv.c (riscv_memmodel_needs_amo_acquire):
          Remove function.
        * config/riscv/riscv.c (riscv_print_amo_memory_ordering_suffix):
          Add function to emit AMO memory ordering suffixes.
        * config/riscv/riscv.c (riscv_print_operand): Call
          riscv_print_amo_memory_ordering_suffix() instead of
          riscv_memmodel_needs_amo_acquire().
---
 gcc/config/riscv/riscv.c | 29 +++++++++++++++--------------
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index 9b5aedc77131..881eab66a481 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -3341,24 +3341,26 @@ riscv_print_operand_reloc (FILE *file, rtx op, bool hi_reloc)
   fputc (')', file);
 }
 
-/* Return true if the .AQ suffix should be added to an AMO to implement the
-   acquire portion of memory model MODEL.  */
+/* Print the memory ordering suffix for AMOs.  */
 
-static bool
-riscv_memmodel_needs_amo_acquire (const enum memmodel model)
+static void
+riscv_print_amo_memory_ordering_suffix (FILE *file, const enum memmodel model)
 {
   switch (model)
     {
-      case MEMMODEL_ACQ_REL:
-      case MEMMODEL_SEQ_CST:
-      case MEMMODEL_ACQUIRE:
+      case MEMMODEL_RELAXED:
+	break;
       case MEMMODEL_CONSUME:
-	return true;
-
+      case MEMMODEL_ACQUIRE:
+	fputs (".aq", file);
+	break;
       case MEMMODEL_RELEASE:
-      case MEMMODEL_RELAXED:
-	return false;
-
+	fputs (".rl", file);
+	break;
+      case MEMMODEL_ACQ_REL:
+      case MEMMODEL_SEQ_CST:
+	fputs (".aqrl", file);
+	break;
       default:
 	gcc_unreachable ();
     }
@@ -3423,8 +3425,7 @@ riscv_print_operand (FILE *file, rtx op, int letter)
       break;
 
     case 'A':
-      if (riscv_memmodel_needs_amo_acquire (model))
-	fputs (".aq", file);
+      riscv_print_amo_memory_ordering_suffix (file, model);
       break;
 
     case 'F':
-- 
2.31.1


  parent reply	other threads:[~2021-04-26 12:46 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-26 12:45 [PATCH 00/10] [RISC-V] Atomics improvements [PR100265/PR100266] Christoph Muellner
2021-04-26 12:45 ` [PATCH 01/10] RISC-V: Simplify memory model code [PR 100265] Christoph Muellner
2021-04-26 12:45 ` Christoph Muellner [this message]
2021-04-26 12:45 ` [PATCH 03/10] RISC-V: Eliminate %F specifier from riscv_print_operand() " Christoph Muellner
2021-04-26 12:45 ` [PATCH 04/10] RISC-V: Don't use amoswap for atomic stores " Christoph Muellner
2021-04-26 12:45 ` [PATCH 05/10] RISC-V: Emit fences according to chosen memory model " Christoph Muellner
2021-04-26 12:45 ` [PATCH 06/10] RISC-V: Implement atomic_{load,store} " Christoph Muellner
2021-04-26 12:45 ` [PATCH 07/10] RISC-V: Model INSNs for LR and SC [PR 100266] Christoph Muellner
2021-04-26 12:45 ` [PATCH 08/10] RISC-V: Add s.ext-consuming " Christoph Muellner
2021-04-26 12:45 ` [PATCH 09/10] RISC-V: Generate helpers for cbranch4 " Christoph Muellner
2021-04-26 14:39   ` Kito Cheng
2021-05-05 19:26     ` Christoph Müllner
2021-04-26 12:45 ` [PATCH 10/10] RISC-V: Provide programmatic implementation of CAS " Christoph Muellner
2021-04-27 15:17   ` Jim Wilson
2021-04-28 22:40 ` [PATCH 00/10] [RISC-V] Atomics improvements [PR100265/PR100266] Jim Wilson

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