From: Jeff Law <jeffreyalaw@gmail.com>
To: Jakub Jelinek <jakub@redhat.com>
Cc: Eric Botcazou <botcazou@adacore.com>,
gcc-patches@gcc.gnu.org, Richard Biener <rguenther@suse.de>,
Richard Sandiford <richard.sandiford@arm.com>
Subject: Re: [PATCH] combine: Fix simplify_comparison AND handling for WORD_REGISTER_OPERATIONS targets [PR109040]
Date: Tue, 11 Apr 2023 19:26:07 -0600 [thread overview]
Message-ID: <965831db-ac9e-cc5e-3459-08b6b70fd577@gmail.com> (raw)
In-Reply-To: <ZDO2g7hYvMCJlIn4@tucnak>
[-- Attachment #1: Type: text/plain, Size: 1400 bytes --]
On 4/10/23 01:10, Jakub Jelinek wrote:
> On Sat, Apr 08, 2023 at 06:25:32PM -0600, Jeff Law wrote:
>>
>>
>> On 4/6/23 08:21, Eric Botcazou wrote:
>>
>>>> So, perhaps just in the return op0; case add further code for
>>>> WORD_REGISTER_OPERATIONS and sub-word modes which will call nonzero_bits
>>>> again for the word mode and decide if it is still safe.
>>>
>>> Does it work to just replace mode by word_mode in the calls to nonzero_bits?
>> It helps marginally -- basically we defer mucking up the code a bit. We
>> then hit this in simplify_and_const_int_1:
>>
>>
>> /* See what bits may be nonzero in VAROP. Unlike the general case of
>> a call to nonzero_bits, here we don't care about bits outside
>> MODE. */
>>
>> nonzero = nonzero_bits (varop, mode) & GET_MODE_MASK (mode);
>>
>> That just seems wrong for WORD_REGISTER_OPERATIONS targets.
>>
>>
>> Hacking both locations in a similar manner fixes the test.
>
> If so, can you post that in patch form and can we go with that version
> plus the testcase (e.g. from the first patch I've posted where I've changed
> dse)?
So as I mentioned in IRC, I haven't really looked closely at
simplify_and_const_int_1. I don't have a high degree of confidence this
patch is complete, even though it does fix the test for 108947 and 109040.
I did bootstrap on riscv, but not a regression test, that's spinning
right now.
Jeff
[-- Attachment #2: P --]
[-- Type: text/plain, Size: 1419 bytes --]
diff --git a/gcc/combine.cc b/gcc/combine.cc
index 22bf8e1ec89..c41d8a09b3b 100644
--- a/gcc/combine.cc
+++ b/gcc/combine.cc
@@ -10055,9 +10055,10 @@ simplify_and_const_int_1 (scalar_int_mode mode, rtx varop,
/* See what bits may be nonzero in VAROP. Unlike the general case of
a call to nonzero_bits, here we don't care about bits outside
- MODE. */
+ MODE unless WORD_REGISTER_OPERATIONS is true. */
- nonzero = nonzero_bits (varop, mode) & GET_MODE_MASK (mode);
+ enum machine_mode tmode = WORD_REGISTER_OPERATIONS ? word_mode : mode;
+ nonzero = nonzero_bits (varop, tmode) & GET_MODE_MASK (tmode);
/* Turn off all bits in the constant that are known to already be zero.
Thus, if the AND isn't needed at all, we will have CONSTOP == NONZERO_BITS
diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index 3b33afa2461..5f6f70491d8 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -3752,7 +3752,10 @@ simplify_context::simplify_binary_operation_1 (rtx_code code,
return op0;
if (HWI_COMPUTABLE_MODE_P (mode))
{
- HOST_WIDE_INT nzop0 = nonzero_bits (trueop0, mode);
+ /* When WORD_REGISTER_OPERATIONS is true, we need to know the
+ nonzero bits in WORD_MODE rather than MODE. */
+ HOST_WIDE_INT nzop0
+ = nonzero_bits (trueop0, WORD_REGISTER_OPERATIONS ? word_mode : mode);
HOST_WIDE_INT nzop1;
if (CONST_INT_P (trueop1))
{
next prev parent reply other threads:[~2023-04-12 1:26 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-05 9:16 [PATCH] dse: Handle SUBREGs of word REGs differently " Jakub Jelinek
2023-04-05 13:14 ` Jeff Law
2023-04-05 14:51 ` Jakub Jelinek
2023-04-05 16:17 ` Jeff Law
2023-04-05 16:48 ` Jakub Jelinek
2023-04-05 17:31 ` Jeff Law
2023-04-06 9:31 ` Richard Sandiford
2023-04-06 9:37 ` Li, Pan2
2023-04-06 14:49 ` Jeff Law
2023-04-06 14:45 ` Jeff Law
2023-04-06 10:15 ` Eric Botcazou
2023-04-06 10:31 ` [PATCH] combine: Fix simplify_comparison AND handling " Jakub Jelinek
2023-04-06 10:51 ` Eric Botcazou
2023-04-06 11:37 ` Jakub Jelinek
2023-04-06 14:21 ` Eric Botcazou
2023-04-09 0:25 ` Jeff Law
2023-04-10 7:10 ` Jakub Jelinek
2023-04-12 1:26 ` Jeff Law [this message]
2023-04-12 6:21 ` Jakub Jelinek
2023-04-12 10:02 ` [PATCH] combine, v3: Fix " Jakub Jelinek
2023-04-12 14:17 ` Jeff Law
2023-04-12 14:30 ` Jakub Jelinek
2023-04-12 15:24 ` Segher Boessenkool
2023-04-12 16:58 ` [PATCH] combine, v4: " Jakub Jelinek
2023-04-13 4:05 ` Jeff Law
2023-04-13 10:57 ` Segher Boessenkool
2023-04-13 12:35 ` Jeff Law
2023-04-13 13:45 ` [PATCH] loop-iv: Fix up bounds computation Jakub Jelinek
2023-04-13 15:07 ` Jeff Law
2023-04-13 19:37 ` Jeff Law
2023-04-12 13:29 ` [PATCH] combine: Fix simplify_comparison AND handling for WORD_REGISTER_OPERATIONS targets [PR109040] Jeff Law
2023-04-09 1:15 ` Jeff Law
2023-04-10 5:13 ` Hongtao Liu
2023-04-10 5:15 ` Hongtao Liu
2023-04-06 14:35 ` Jeff Law
2023-04-06 15:06 ` Jeff Law
2023-04-06 14:53 ` [PATCH] dse: Handle SUBREGs of word REGs differently " Jeff Law
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=965831db-ac9e-cc5e-3459-08b6b70fd577@gmail.com \
--to=jeffreyalaw@gmail.com \
--cc=botcazou@adacore.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=jakub@redhat.com \
--cc=rguenther@suse.de \
--cc=richard.sandiford@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).