From: Eric Botcazou <botcazou@adacore.com>
To: Jakub Jelinek <jakub@redhat.com>
Cc: gcc-patches@gcc.gnu.org, Jeff Law <jeffreyalaw@gmail.com>,
Richard Biener <rguenther@suse.de>,
Richard Sandiford <richard.sandiford@arm.com>,
gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] combine: Fix simplify_comparison AND handling for WORD_REGISTER_OPERATIONS targets [PR109040]
Date: Thu, 06 Apr 2023 16:21:56 +0200 [thread overview]
Message-ID: <3412470.QJadu78ljV@fomalhaut> (raw)
In-Reply-To: <ZC6u6ZUxaFlFvx16@tucnak>
> If the
> (and:SI (subreg:SI (reg:HI xxx) 0) (const_int 0x84c))
> to
> (subreg:SI (and:HI (reg:HI xxx) (const_int 0x84c)) 0)
> transformation is kosher for WORD_REGISTER_OPERATIONS, then I guess the
> invalid operation is then in
> simplify_context::simplify_binary_operation_1
> case AND:
> ...
> if (HWI_COMPUTABLE_MODE_P (mode))
> {
> HOST_WIDE_INT nzop0 = nonzero_bits (trueop0, mode);
> HOST_WIDE_INT nzop1;
> if (CONST_INT_P (trueop1))
> {
> HOST_WIDE_INT val1 = INTVAL (trueop1);
> /* If we are turning off bits already known off in OP0, we
> need not do an AND. */
> if ((nzop0 & ~val1) == 0)
> return op0;
> }
> We have there op0==trueop0 (reg:HI 175) and op1==trueop1 (const_int 2124
> [0x84c]).
> We then for integral? modes smaller than word_mode would then need to
> actually check nonzero_bits in the word_mode (on paradoxical subreg of
> trueop0?). If INTVAL (trueop1) is >= 0, then I think just doing
> nonzero_bits in the wider mode would be all we need (although the
> subsequent (nzop1 & nzop0) == 0 case probably wants to have the current
> nonzero_bits calls), not really sure what for WORD_REGISTER_OPERATIONS
> means AND with a constant which has the most significant bit set for the
> upper bits.
Yes, I agree that there is a tension between this AND case and the swapping
done in the combiner for WORD_REGISTER_OPERATIONS. I also agree that it would
make sense do call nonzero_bits on word_mode instead of mode here in this case
because AND is a word_register_operation_p.
> So, perhaps just in the return op0; case add further code for
> WORD_REGISTER_OPERATIONS and sub-word modes which will call nonzero_bits
> again for the word mode and decide if it is still safe.
Does it work to just replace mode by word_mode in the calls to nonzero_bits?
> That patch doesn't change anything at all on the testcase, it is still
> miscompiled.
OK, too bad, thanks for trying it!
--
Eric Botcazou
next prev parent reply other threads:[~2023-04-06 14:21 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-05 9:16 [PATCH] dse: Handle SUBREGs of word REGs differently " Jakub Jelinek
2023-04-05 13:14 ` Jeff Law
2023-04-05 14:51 ` Jakub Jelinek
2023-04-05 16:17 ` Jeff Law
2023-04-05 16:48 ` Jakub Jelinek
2023-04-05 17:31 ` Jeff Law
2023-04-06 9:31 ` Richard Sandiford
2023-04-06 9:37 ` Li, Pan2
2023-04-06 14:49 ` Jeff Law
2023-04-06 14:45 ` Jeff Law
2023-04-06 10:15 ` Eric Botcazou
2023-04-06 10:31 ` [PATCH] combine: Fix simplify_comparison AND handling " Jakub Jelinek
2023-04-06 10:51 ` Eric Botcazou
2023-04-06 11:37 ` Jakub Jelinek
2023-04-06 14:21 ` Eric Botcazou [this message]
2023-04-09 0:25 ` Jeff Law
2023-04-10 7:10 ` Jakub Jelinek
2023-04-12 1:26 ` Jeff Law
2023-04-12 6:21 ` Jakub Jelinek
2023-04-12 10:02 ` [PATCH] combine, v3: Fix " Jakub Jelinek
2023-04-12 14:17 ` Jeff Law
2023-04-12 14:30 ` Jakub Jelinek
2023-04-12 15:24 ` Segher Boessenkool
2023-04-12 16:58 ` [PATCH] combine, v4: " Jakub Jelinek
2023-04-13 4:05 ` Jeff Law
2023-04-13 10:57 ` Segher Boessenkool
2023-04-13 12:35 ` Jeff Law
2023-04-13 13:45 ` [PATCH] loop-iv: Fix up bounds computation Jakub Jelinek
2023-04-13 15:07 ` Jeff Law
2023-04-13 19:37 ` Jeff Law
2023-04-12 13:29 ` [PATCH] combine: Fix simplify_comparison AND handling for WORD_REGISTER_OPERATIONS targets [PR109040] Jeff Law
2023-04-09 1:15 ` Jeff Law
2023-04-10 5:13 ` Hongtao Liu
2023-04-10 5:15 ` Hongtao Liu
2023-04-06 14:35 ` Jeff Law
2023-04-06 15:06 ` Jeff Law
2023-04-06 14:53 ` [PATCH] dse: Handle SUBREGs of word REGs differently " Jeff Law
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