From: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
To: juzhe.zhong@rivai.ai, Jeff Law <jeffreyalaw@gmail.com>,
gcc-patches <gcc-patches@gcc.gnu.org>,
"kito.cheng" <kito.cheng@gmail.com>, palmer <palmer@dabbelt.com>,
jakub <jakub@redhat.com>, rguenther <rguenther@suse.de>,
richard.sandiford@arm.com
Subject: Re: [PATCH] machine_mode type size: Extend enum size from 8-bit to 16-bit
Date: Tue, 11 Apr 2023 11:05:25 +0100 [thread overview]
Message-ID: <9b3d5058-1110-8201-396a-84e18a6c038f@foss.arm.com> (raw)
In-Reply-To: <mpto7nulpji.fsf@arm.com>
On 11/04/2023 10:46, Richard Sandiford via Gcc-patches wrote:
> <juzhe.zhong@rivai.ai> writes:
>> ARM SVE has:svint8_t, svint8x2_t, svint8x3_t, svint8x4_t
>> As far as I known, they don't have tuple type for partial vector.
>
> Yeah, there are no separate types for partial vectors, but there
> are separate modes. E.g. VNx2QI is a partial vector of QIs,
> with each QI stored in a 64-bit container.
>
> I agree with all the comments about the danger of growing the number of
> modes too much. But it looks like rtx_def should be easy to rearrange.
> Unless I'm missing something, there are less than 256 rtx codes at
> present. So one simple option would be to make the code 8 bits and
> the machine_mode 16 bits (and swap them, so that they stay well-aligned
> wrt their size).
>
> That of course would create new problem if we want more than 256 codes
> in future. But then there would be the option of a non-power-of-2
> split (12/12 or whatever). Also, it's possible to multiplex operations
> into a single code by adding an extra operand, whereas it's harder to
> multiplex modes.
>
> Thanks,
> Richard
The rtx code and mode are both accessed quite frequently, making them
non-native machine sizes might have impact on the performance of
accessing the fields.
next prev parent reply other threads:[~2023-04-11 10:05 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-10 14:48 juzhe.zhong
2023-04-10 14:54 ` Jeff Law
2023-04-10 15:02 ` juzhe.zhong
2023-04-10 15:14 ` juzhe.zhong
2023-04-11 9:16 ` Jakub Jelinek
2023-04-11 9:46 ` juzhe.zhong
2023-04-11 10:11 ` Jakub Jelinek
2023-04-11 10:25 ` juzhe.zhong
2023-04-11 10:52 ` Jakub Jelinek
2023-04-11 9:46 ` Richard Sandiford
2023-04-11 9:59 ` Jakub Jelinek
2023-04-11 10:11 ` juzhe.zhong
2023-04-11 10:05 ` Richard Earnshaw [this message]
2023-04-11 10:15 ` Richard Sandiford
2023-04-11 10:59 ` Richard Biener
2023-04-11 11:11 ` Richard Sandiford
2023-04-11 11:19 ` juzhe.zhong
2023-04-11 13:50 ` Kito Cheng
2023-04-12 7:53 ` Richard Biener
2023-04-12 9:06 ` Kito Cheng
2023-04-12 9:21 ` Richard Biener
2023-04-12 9:31 ` Kito Cheng
2023-04-12 23:22 ` 钟居哲
2023-04-13 13:06 ` Richard Sandiford
2023-04-13 14:02 ` Richard Biener
2023-04-15 2:58 ` Hans-Peter Nilsson
2023-04-17 6:38 ` Richard Biener
2023-04-20 5:37 ` Hans-Peter Nilsson
2023-05-05 1:43 ` Li, Pan2
2023-05-05 6:25 ` Richard Biener
2023-05-06 1:10 ` Li, Pan2
2023-05-06 1:53 ` Kito Cheng
2023-05-06 1:59 ` juzhe.zhong
2023-05-06 2:12 ` Li, Pan2
2023-05-06 2:18 ` Kito Cheng
2023-05-06 2:20 ` Li, Pan2
2023-05-06 2:48 ` Li, Pan2
2023-05-07 1:55 ` Li, Pan2
2023-05-07 15:23 ` Jeff Law
2023-05-08 1:07 ` Li, Pan2
2023-05-08 6:29 ` Richard Biener
2023-05-08 6:41 ` Li, Pan2
2023-05-08 6:59 ` Li, Pan2
2023-05-08 7:37 ` Richard Biener
2023-05-08 8:05 ` Li, Pan2
2023-05-09 6:13 ` Li, Pan2
2023-05-09 7:04 ` Richard Biener
2023-05-09 10:16 ` Richard Sandiford
2023-05-09 10:26 ` Richard Biener
2023-05-09 11:50 ` Li, Pan2
2023-05-10 5:09 ` Li, Pan2
2023-05-10 7:22 ` Li, Pan2
2023-05-08 1:35 ` Li, Pan2
2023-04-10 15:18 ` Jakub Jelinek
2023-04-10 15:22 ` juzhe.zhong
2023-04-10 20:42 ` Jeff Law
2023-04-10 23:03 ` juzhe.zhong
2023-04-11 1:36 ` juzhe.zhong
[not found] ` <20230410232205400970205@rivai.ai>
2023-04-10 15:33 ` juzhe.zhong
2023-04-10 20:39 ` Jeff Law
2023-04-10 20:36 ` Jeff Law
2023-04-10 22:53 ` juzhe.zhong
2023-04-10 15:10 ` Jakub Jelinek
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