Re: [PATCH v4 01/10] RISC-V: Add new predicates and function prototypes

[Kito Cheng <kito.cheng@gmail.com>]

Could you please move the new function declarations and new code to
the patch where they are being used?

> +/* RVV vector register sizes.  */
> +enum riscv_vector_bits_enum
> +{
> +  RVV_SCALABLE,
> +  RVV_NOT_IMPLEMENTED = RVV_SCALABLE,
> +  RVV_64 = 64,
> +  RVV_128 = 128,
> +  RVV_256 = 256,
> +  RVV_512 = 512,
> +  RVV_1024 = 1024,
> +  RVV_2048 = 2048,
> +  RVV_4096 = 4096,
> +  RVV_8192 = 8192,
> +  RVV_16384 = 16384,
> +  RVV_32768 = 32768,
> +  RVV_65536 = 65536
> +};

I think this is not necessary for the VLA vectorizer?

> +Enum
> +Name(riscv_vector_lmul) Type(enum riscv_vector_lmul_enum)
> +The possible vectorization factor:
> +
> +EnumValue
> +Enum(riscv_vector_lmul) String(1) Value(RVV_LMUL1)
> +
> +EnumValue
> +Enum(riscv_vector_lmul) String(2) Value(RVV_LMUL2)
> +
> +EnumValue
> +Enum(riscv_vector_lmul) String(4) Value(RVV_LMUL4)
> +
> +EnumValue
> +Enum(riscv_vector_lmul) String(8) Value(RVV_LMUL8)

I would like to introduce this option later, it's used for fine tuning,
VLA vectorizer should be able to work without this tuning option.

> +mriscv-vector-lmul=
> +Target RejectNegative Joined Enum(riscv_vector_lmul) Var(riscv_vector_lmul) Init(RVV_LMUL1)
> +-mriscv-vector-lmul=<lmul>     Set the vf using lmul in auto-vectorization.
> +

Same question for this