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From: Mike Frysinger <vapier@gentoo.org>
To: gdb-patches@sourceware.org
Subject: [PATCH 19/20] sim: bfin: move arch-specific settings to internal header
Date: Fri, 23 Dec 2022 01:07:12 -0500	[thread overview]
Message-ID: <20221223060713.28821-20-vapier@gentoo.org> (raw)
In-Reply-To: <20221223060713.28821-1-vapier@gentoo.org>

There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so drop the bfin.h include and move the remaining
bfin-specific settings into it.
---
 sim/bfin/bfin-sim.c    |  2 ++
 sim/bfin/bfin-sim.h    | 29 +++++++++++++++++++++++++++++
 sim/bfin/devices.h     |  2 ++
 sim/bfin/dv-bfin_pll.c |  1 -
 sim/bfin/interp.c      |  3 +++
 sim/bfin/machs.c       |  3 +++
 sim/bfin/sim-main.h    | 36 ------------------------------------
 7 files changed, 39 insertions(+), 37 deletions(-)

diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index 37ac5ce5d6f0..75c6e7c9f1b2 100644
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -29,6 +29,8 @@
 #include "ansidecl.h"
 #include "opcode/bfin.h"
 #include "sim-main.h"
+#include "arch.h"
+#include "bfin-sim.h"
 #include "dv-bfin_cec.h"
 #include "dv-bfin_mmu.h"
 
diff --git a/sim/bfin/bfin-sim.h b/sim/bfin/bfin-sim.h
index 36b9e0235b64..b6573c946dac 100644
--- a/sim/bfin/bfin-sim.h
+++ b/sim/bfin/bfin-sim.h
@@ -35,6 +35,8 @@ typedef int32_t bs32;
 typedef int64_t bs40;
 typedef int64_t bs64;
 
+#include "machs.h"
+
 /* For dealing with parallel instructions, we must avoid changing our register
    file until all parallel insns have been simulated.  This queue of stores
    can be used to delay a modification.
@@ -359,4 +361,31 @@ extern bu32 hwloop_get_next_pc (SIM_CPU *, bu32, bu32);
 
 #define BFIN_L1_CACHE_BYTES       32
 
+#define BFIN_CPU_STATE (*(struct bfin_cpu_state *) CPU_ARCH_DATA (cpu))
+#define STATE_BOARD_DATA(sd) ((struct bfin_board_data *) STATE_ARCH_DATA (sd))
+
+#include "dv-bfin_trace.h"
+
+#undef CLAMP
+#define CLAMP(a, b, c) min (max (a, b), c)
+
+/* TODO: Move all this trace logic to the common code.  */
+#define BFIN_TRACE_CORE(cpu, addr, size, map, val) \
+  do { \
+    TRACE_CORE (cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
+		map == exec_map ? 'I' : 'D', \
+		map == write_map ? "STORE" : "FETCH", \
+		size, addr, size * 2, val); \
+    PROFILE_COUNT_CORE (cpu, addr, size, map); \
+  } while (0)
+#define BFIN_TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
+  do { \
+    TRACE_BRANCH (cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
+    if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \
+      bfin_trace_queue (cpu, oldpc, newpc, hwloop); \
+  } while (0)
+
+/* Default memory size.  */
+#define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024)
+
 #endif
diff --git a/sim/bfin/devices.h b/sim/bfin/devices.h
index b772aa2e2583..348df3ce148c 100644
--- a/sim/bfin/devices.h
+++ b/sim/bfin/devices.h
@@ -26,6 +26,8 @@
 #include "hw-device.h"
 #include "hw-tree.h"
 
+#include "bfin-sim.h"
+
 /* We keep the same inital structure layout with DMA enabled devices.  */
 struct dv_bfin {
   bu32 base;
diff --git a/sim/bfin/dv-bfin_pll.c b/sim/bfin/dv-bfin_pll.c
index 97b9dc1e259f..dc6627ae77ba 100644
--- a/sim/bfin/dv-bfin_pll.c
+++ b/sim/bfin/dv-bfin_pll.c
@@ -22,7 +22,6 @@
 #include "defs.h"
 
 #include "sim-main.h"
-#include "machs.h"
 #include "devices.h"
 #include "dv-bfin_pll.h"
 
diff --git a/sim/bfin/interp.c b/sim/bfin/interp.c
index 493c3b62ffb8..04c1773eaf42 100644
--- a/sim/bfin/interp.c
+++ b/sim/bfin/interp.c
@@ -34,9 +34,12 @@
 #include "sim/callback.h"
 #include "gdb/signals.h"
 #include "sim-main.h"
+#include "sim-options.h"
 #include "sim-syscall.h"
 #include "sim-hw.h"
 
+#include "bfin-sim.h"
+
 /* The numbers here do not matter.  They just need to be unique.  They also
    need not be static across releases -- they're used internally only.  The
    mapping from the Linux ABI to the CB values is in linux-targ-map.h.  */
diff --git a/sim/bfin/machs.c b/sim/bfin/machs.c
index adc0eb355319..acb2613b4e5e 100644
--- a/sim/bfin/machs.c
+++ b/sim/bfin/machs.c
@@ -28,7 +28,10 @@
 #include "bfd.h"
 
 #include "sim-hw.h"
+#include "sim-options.h"
+
 #include "devices.h"
+#include "arch.h"
 #include "dv-bfin_cec.h"
 #include "dv-bfin_dmac.h"
 
diff --git a/sim/bfin/sim-main.h b/sim/bfin/sim-main.h
index a3855f3ded63..65ba92582c3f 100644
--- a/sim/bfin/sim-main.h
+++ b/sim/bfin/sim-main.h
@@ -22,42 +22,6 @@
 #define _BFIN_MAIN_SIM_H_
 
 #include "sim-basics.h"
-#include "arch.h"
 #include "sim-base.h"
 
-#include "bfin-sim.h"
-
-#include "machs.h"
-
-#define BFIN_CPU_STATE (*(struct bfin_cpu_state *) CPU_ARCH_DATA (cpu))
-#define STATE_BOARD_DATA(sd) ((struct bfin_board_data *) STATE_ARCH_DATA (sd))
-
-#include "sim-config.h"
-#include "sim-types.h"
-#include "sim-engine.h"
-#include "sim-options.h"
-#include "dv-bfin_trace.h"
-
-#undef CLAMP
-#define CLAMP(a, b, c) min (max (a, b), c)
-
-/* TODO: Move all this trace logic to the common code.  */
-#define BFIN_TRACE_CORE(cpu, addr, size, map, val) \
-  do { \
-    TRACE_CORE (cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
-		map == exec_map ? 'I' : 'D', \
-		map == write_map ? "STORE" : "FETCH", \
-		size, addr, size * 2, val); \
-    PROFILE_COUNT_CORE (cpu, addr, size, map); \
-  } while (0)
-#define BFIN_TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
-  do { \
-    TRACE_BRANCH (cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
-    if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \
-      bfin_trace_queue (cpu, oldpc, newpc, hwloop); \
-  } while (0)
-
-/* Default memory size.  */
-#define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024)
-
 #endif
-- 
2.39.0


  parent reply	other threads:[~2022-12-23  6:07 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-23  6:06 [PATCH 00/20] sim: reduce sim-main.h pollution Mike Frysinger
2022-12-23  6:06 ` [PATCH 01/20] sim: avr: move arch-specific settings to internal header Mike Frysinger
2022-12-23  6:06 ` [PATCH 02/20] sim: aarch64: " Mike Frysinger
2022-12-23  6:06 ` [PATCH 03/20] sim: arm: " Mike Frysinger
2022-12-23  6:06 ` [PATCH 04/20] sim: cr16: " Mike Frysinger
2022-12-23  6:06 ` [PATCH 05/20] sim: d10v: " Mike Frysinger
2022-12-23  6:06 ` [PATCH 06/20] sim: ft32: " Mike Frysinger
2022-12-23  6:07 ` [PATCH 07/20] sim: msp430: " Mike Frysinger
2022-12-23  6:07 ` [PATCH 08/20] sim: v850: standardize the arch-specific settings a little Mike Frysinger
2022-12-23  6:07 ` [PATCH 09/20] sim: riscv: move arch-specific settings to internal header Mike Frysinger
2022-12-23  6:07 ` [PATCH 10/20] sim: moxie: " Mike Frysinger
2022-12-23  6:07 ` [PATCH 11/20] sim: example-synacor: " Mike Frysinger
2022-12-23  6:07 ` [PATCH 12/20] sim: microblaze: " Mike Frysinger
2022-12-23  6:07 ` [PATCH 13/20] sim: mn10300: standardize the arch-specific settings a little Mike Frysinger
2022-12-23  6:07 ` [PATCH 14/20] sim: pru: move arch-specific settings to internal header Mike Frysinger
2022-12-23  6:07 ` [PATCH 15/20] sim: h8300: " Mike Frysinger
2022-12-23  6:07 ` [PATCH 16/20] sim: mcore: " Mike Frysinger
2022-12-23  6:07 ` [PATCH 17/20] sim: sh: " Mike Frysinger
2022-12-23  6:07 ` [PATCH 18/20] sim: m68hc11: " Mike Frysinger
2022-12-23  6:07 ` Mike Frysinger [this message]
2022-12-23  6:07 ` [PATCH 20/20] sim: m32r: " Mike Frysinger
2022-12-24  1:55 ` [PATCH] sim: or1k: " Mike Frysinger
2022-12-24 10:18   ` Stafford Horne

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