From: Mike Frysinger <vapier@gentoo.org>
To: gdb-patches@sourceware.org
Subject: [PATCH 05/20] sim: d10v: move arch-specific settings to internal header
Date: Fri, 23 Dec 2022 01:06:58 -0500 [thread overview]
Message-ID: <20221223060713.28821-6-vapier@gentoo.org> (raw)
In-Reply-To: <20221223060713.28821-1-vapier@gentoo.org>
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so drop the d10v_sim.h include and move it to
the few files that actually need it.
Also rename the file to standardize it a bit better with other ports.
---
sim/d10v/{d10v_sim.h => d10v-sim.h} | 5 +++++
sim/d10v/endian.c | 4 +++-
sim/d10v/gencode.c | 3 ++-
sim/d10v/interp.c | 2 ++
sim/d10v/sim-main.h | 2 --
sim/d10v/simops.c | 2 ++
6 files changed, 14 insertions(+), 4 deletions(-)
rename sim/d10v/{d10v_sim.h => d10v-sim.h} (99%)
diff --git a/sim/d10v/d10v_sim.h b/sim/d10v/d10v-sim.h
similarity index 99%
rename from sim/d10v/d10v_sim.h
rename to sim/d10v/d10v-sim.h
index e78ea2fe9df8..df12fe2757e6 100644
--- a/sim/d10v/d10v_sim.h
+++ b/sim/d10v/d10v-sim.h
@@ -1,3 +1,6 @@
+#ifndef D10V_SIM_H
+#define D10V_SIM_H
+
#include <stdio.h>
#include <ctype.h>
#include <limits.h>
@@ -476,3 +479,5 @@ extern void write_longlong (uint8_t *addr, int64_t data);
PSW is masked for zero bits. */
extern reg_t move_to_cr (SIM_DESC, SIM_CPU *, int cr, reg_t mask, reg_t val, int psw_hw_p);
+
+#endif
diff --git a/sim/d10v/endian.c b/sim/d10v/endian.c
index 44e80e6d6530..e6212babdaa9 100644
--- a/sim/d10v/endian.c
+++ b/sim/d10v/endian.c
@@ -1,5 +1,5 @@
/* If we're being compiled as a .c file, rather than being included in
- d10v_sim.h, then ENDIAN_INLINE won't be defined yet. */
+ d10v-sim.h, then ENDIAN_INLINE won't be defined yet. */
/* This must come before any other includes. */
#include "defs.h"
@@ -10,6 +10,8 @@
#define ENDIAN_INLINE
#endif
+#include "d10v-sim.h"
+
ENDIAN_INLINE uint16_t
get_word (const uint8_t *x)
{
diff --git a/sim/d10v/gencode.c b/sim/d10v/gencode.c
index 6e006d089a67..3a37bac62563 100644
--- a/sim/d10v/gencode.c
+++ b/sim/d10v/gencode.c
@@ -42,7 +42,7 @@ write_template (void)
struct d10v_opcode *opcode;
int i,j;
- printf ("#include \"sim-main.h\"\n");
+ printf ("#include \"d10v-sim.h\"\n");
printf ("#include \"simops.h\"\n");
for (opcode = (struct d10v_opcode *)d10v_opcodes; opcode->name; opcode++)
@@ -103,6 +103,7 @@ write_opcodes (void)
/* write out opcode table */
printf ("#include \"sim-main.h\"\n");
+ printf ("#include \"d10v-sim.h\"\n");
printf ("#include \"simops.h\"\n\n");
printf ("struct simops Simops[] = {\n");
diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c
index ae8b6707ed4b..9beedf8f445e 100644
--- a/sim/d10v/interp.c
+++ b/sim/d10v/interp.c
@@ -18,6 +18,8 @@
#include <stdlib.h>
#include <assert.h>
+#include "d10v-sim.h"
+
#include "target-newlib-syscall.h"
enum _leftright { LEFT_FIRST, RIGHT_FIRST };
diff --git a/sim/d10v/sim-main.h b/sim/d10v/sim-main.h
index 4e6771af70fc..3e0b74c63a40 100644
--- a/sim/d10v/sim-main.h
+++ b/sim/d10v/sim-main.h
@@ -22,6 +22,4 @@
#include "sim-basics.h"
#include "sim-base.h"
-#include "d10v_sim.h"
-
#endif
diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c
index a2eb3677e7e2..96ed29f6abe1 100644
--- a/sim/d10v/simops.c
+++ b/sim/d10v/simops.c
@@ -17,6 +17,8 @@
#include "simops.h"
#include "target-newlib-syscall.h"
+#include "d10v-sim.h"
+
#define EXCEPTION(sig) sim_engine_halt (sd, cpu, NULL, PC, sim_stopped, sig)
enum op_types {
--
2.39.0
next prev parent reply other threads:[~2022-12-23 6:07 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-23 6:06 [PATCH 00/20] sim: reduce sim-main.h pollution Mike Frysinger
2022-12-23 6:06 ` [PATCH 01/20] sim: avr: move arch-specific settings to internal header Mike Frysinger
2022-12-23 6:06 ` [PATCH 02/20] sim: aarch64: " Mike Frysinger
2022-12-23 6:06 ` [PATCH 03/20] sim: arm: " Mike Frysinger
2022-12-23 6:06 ` [PATCH 04/20] sim: cr16: " Mike Frysinger
2022-12-23 6:06 ` Mike Frysinger [this message]
2022-12-23 6:06 ` [PATCH 06/20] sim: ft32: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 07/20] sim: msp430: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 08/20] sim: v850: standardize the arch-specific settings a little Mike Frysinger
2022-12-23 6:07 ` [PATCH 09/20] sim: riscv: move arch-specific settings to internal header Mike Frysinger
2022-12-23 6:07 ` [PATCH 10/20] sim: moxie: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 11/20] sim: example-synacor: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 12/20] sim: microblaze: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 13/20] sim: mn10300: standardize the arch-specific settings a little Mike Frysinger
2022-12-23 6:07 ` [PATCH 14/20] sim: pru: move arch-specific settings to internal header Mike Frysinger
2022-12-23 6:07 ` [PATCH 15/20] sim: h8300: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 16/20] sim: mcore: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 17/20] sim: sh: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 18/20] sim: m68hc11: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 19/20] sim: bfin: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 20/20] sim: m32r: " Mike Frysinger
2022-12-24 1:55 ` [PATCH] sim: or1k: " Mike Frysinger
2022-12-24 10:18 ` Stafford Horne
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