From: Mike Frysinger <vapier@gentoo.org>
To: gdb-patches@sourceware.org
Subject: [PATCH 20/20] sim: m32r: move arch-specific settings to internal header
Date: Fri, 23 Dec 2022 01:07:13 -0500 [thread overview]
Message-ID: <20221223060713.28821-21-vapier@gentoo.org> (raw)
In-Reply-To: <20221223060713.28821-1-vapier@gentoo.org>
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to the existing m32r-sim.h.
Unfortunately, we can't yet drop the m32r-sim.h include from sim-main.h
as many of the generated CGEN files refer only to sim-main.h. We'll
have to improve the CGEN interface before we can make more progress,
but this is at least a minor improvement.
---
sim/m32r/m32r-sim.h | 22 ++++++++++++++++++++++
sim/m32r/m32r.c | 2 ++
sim/m32r/m32r2.c | 2 ++
sim/m32r/m32rx.c | 2 ++
sim/m32r/sim-if.c | 1 +
sim/m32r/sim-main.h | 24 ++----------------------
sim/m32r/traps.c | 2 ++
7 files changed, 33 insertions(+), 22 deletions(-)
diff --git a/sim/m32r/m32r-sim.h b/sim/m32r/m32r-sim.h
index fc41c2146f75..3586f3297880 100644
--- a/sim/m32r/m32r-sim.h
+++ b/sim/m32r/m32r-sim.h
@@ -166,5 +166,27 @@ do { \
/* Handle the trap insn. */
USI m32r_trap (SIM_CPU *, PCADDR, int);
+\f
+struct m32r_sim_cpu {
+ M32R_MISC_PROFILE m32r_misc_profile;
+#define CPU_M32R_MISC_PROFILE(cpu) (& M32R_SIM_CPU (cpu)->m32r_misc_profile)
+
+ /* CPU specific parts go here.
+ Note that in files that don't need to access these pieces WANT_CPU_FOO
+ won't be defined and thus these parts won't appear. This is ok in the
+ sense that things work. It is a source of bugs though.
+ One has to of course be careful to not take the size of this
+ struct and no structure members accessed in non-cpu specific files can
+ go after here. Oh for a better language. */
+#if defined (WANT_CPU_M32RBF)
+ M32RBF_CPU_DATA cpu_data;
+#endif
+#if defined (WANT_CPU_M32RXF)
+ M32RXF_CPU_DATA cpu_data;
+#elif defined (WANT_CPU_M32R2F)
+ M32R2F_CPU_DATA cpu_data;
+#endif
+};
+#define M32R_SIM_CPU(cpu) ((struct m32r_sim_cpu *) CPU_ARCH_DATA (cpu))
#endif /* M32R_SIM_H */
diff --git a/sim/m32r/m32r.c b/sim/m32r/m32r.c
index 478a45c25869..014aa712c160 100644
--- a/sim/m32r/m32r.c
+++ b/sim/m32r/m32r.c
@@ -28,6 +28,8 @@
#include "cgen-ops.h"
#include <stdlib.h>
+#include "m32r-sim.h"
+
/* Return the size of REGNO in bytes. */
static int
diff --git a/sim/m32r/m32r2.c b/sim/m32r/m32r2.c
index 8881bc68081f..b95e509a41aa 100644
--- a/sim/m32r/m32r2.c
+++ b/sim/m32r/m32r2.c
@@ -27,6 +27,8 @@
#include "cgen-mem.h"
#include "cgen-ops.h"
+#include "m32r-sim.h"
+
/* The contents of BUF are in target byte order. */
int
diff --git a/sim/m32r/m32rx.c b/sim/m32r/m32rx.c
index e5724c5410d6..52073e1344a0 100644
--- a/sim/m32r/m32rx.c
+++ b/sim/m32r/m32rx.c
@@ -27,6 +27,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "cgen-mem.h"
#include "cgen-ops.h"
+#include "m32r-sim.h"
+
/* The contents of BUF are in target byte order. */
int
diff --git a/sim/m32r/sim-if.c b/sim/m32r/sim-if.c
index e11545461c5d..c8c04b38b68a 100644
--- a/sim/m32r/sim-if.c
+++ b/sim/m32r/sim-if.c
@@ -30,6 +30,7 @@
#include "libiberty.h"
#include "bfd.h"
+#include "m32r-sim.h"
#include "dv-m32r_uart.h"
#define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */
diff --git a/sim/m32r/sim-main.h b/sim/m32r/sim-main.h
index 70962320dfc7..9a52563f25a2 100644
--- a/sim/m32r/sim-main.h
+++ b/sim/m32r/sim-main.h
@@ -14,29 +14,9 @@
#include "arch.h"
#include "sim-base.h"
#include "cgen-sim.h"
-#include "m32r-sim.h"
-\f
-struct m32r_sim_cpu {
- M32R_MISC_PROFILE m32r_misc_profile;
-#define CPU_M32R_MISC_PROFILE(cpu) (& M32R_SIM_CPU (cpu)->m32r_misc_profile)
- /* CPU specific parts go here.
- Note that in files that don't need to access these pieces WANT_CPU_FOO
- won't be defined and thus these parts won't appear. This is ok in the
- sense that things work. It is a source of bugs though.
- One has to of course be careful to not take the size of this
- struct and no structure members accessed in non-cpu specific files can
- go after here. Oh for a better language. */
-#if defined (WANT_CPU_M32RBF)
- M32RBF_CPU_DATA cpu_data;
-#endif
-#if defined (WANT_CPU_M32RXF)
- M32RXF_CPU_DATA cpu_data;
-#elif defined (WANT_CPU_M32R2F)
- M32R2F_CPU_DATA cpu_data;
-#endif
-};
-#define M32R_SIM_CPU(cpu) ((struct m32r_sim_cpu *) CPU_ARCH_DATA (cpu))
+/* TODO: Move this to the CGEN generated files instead. */
+#include "m32r-sim.h"
\f
/* Misc. */
diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c
index 12a87b4a6978..b82f974dc534 100644
--- a/sim/m32r/traps.c
+++ b/sim/m32r/traps.c
@@ -55,6 +55,8 @@
#include <linux/unistd.h>
#endif
+#include "m32r-sim.h"
+
#define TRAP_LINUX_SYSCALL 2
#define TRAP_FLUSH_CACHE 12
/* The semantic code invokes this for invalid (unrecognized) instructions. */
--
2.39.0
next prev parent reply other threads:[~2022-12-23 6:08 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-23 6:06 [PATCH 00/20] sim: reduce sim-main.h pollution Mike Frysinger
2022-12-23 6:06 ` [PATCH 01/20] sim: avr: move arch-specific settings to internal header Mike Frysinger
2022-12-23 6:06 ` [PATCH 02/20] sim: aarch64: " Mike Frysinger
2022-12-23 6:06 ` [PATCH 03/20] sim: arm: " Mike Frysinger
2022-12-23 6:06 ` [PATCH 04/20] sim: cr16: " Mike Frysinger
2022-12-23 6:06 ` [PATCH 05/20] sim: d10v: " Mike Frysinger
2022-12-23 6:06 ` [PATCH 06/20] sim: ft32: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 07/20] sim: msp430: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 08/20] sim: v850: standardize the arch-specific settings a little Mike Frysinger
2022-12-23 6:07 ` [PATCH 09/20] sim: riscv: move arch-specific settings to internal header Mike Frysinger
2022-12-23 6:07 ` [PATCH 10/20] sim: moxie: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 11/20] sim: example-synacor: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 12/20] sim: microblaze: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 13/20] sim: mn10300: standardize the arch-specific settings a little Mike Frysinger
2022-12-23 6:07 ` [PATCH 14/20] sim: pru: move arch-specific settings to internal header Mike Frysinger
2022-12-23 6:07 ` [PATCH 15/20] sim: h8300: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 16/20] sim: mcore: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 17/20] sim: sh: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 18/20] sim: m68hc11: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 19/20] sim: bfin: " Mike Frysinger
2022-12-23 6:07 ` Mike Frysinger [this message]
2022-12-24 1:55 ` [PATCH] sim: or1k: " Mike Frysinger
2022-12-24 10:18 ` Stafford Horne
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