From: Stafford Horne <shorne@gmail.com>
To: Mike Frysinger <vapier@gentoo.org>
Cc: gdb-patches@sourceware.org
Subject: Re: [PATCH] sim: or1k: move arch-specific settings to internal header
Date: Sat, 24 Dec 2022 10:18:20 +0000 [thread overview]
Message-ID: <Y6bR7PLOnaISV6Ok@oscomms1> (raw)
In-Reply-To: <20221224015539.8804-1-vapier@gentoo.org>
On Fri, Dec 23, 2022 at 08:55:39PM -0500, Mike Frysinger via Gdb-patches wrote:
> There's no need for these settings to be in sim-main.h which is shared
> with common/ sim code, so move it all out to the existing or1k-sim.h.
> Unfortunately, we can't yet drop the or1k-sim.h include from sim-main.h
> as many of the generated CGEN files refer only to sim-main.h. We'll
> have to improve the CGEN interface before we can make more progress,
> but this is at least a minor improvement.
> ---
> sim/or1k/or1k-sim.h | 27 +++++++++++++++++++++++++++
> sim/or1k/sim-main.h | 32 ++------------------------------
> sim/or1k/traps.c | 1 +
> 3 files changed, 30 insertions(+), 30 deletions(-)
>
> diff --git a/sim/or1k/or1k-sim.h b/sim/or1k/or1k-sim.h
> index 417272033cd1..61d542fcf7c8 100644
> --- a/sim/or1k/or1k-sim.h
> +++ b/sim/or1k/or1k-sim.h
> @@ -89,4 +89,31 @@ USI or1k32bf_make_load_store_addr (sim_cpu *current_cpu, USI base, SI offset,
> USI or1k32bf_ff1 (sim_cpu *current_cpu, USI val);
> USI or1k32bf_fl1 (sim_cpu *current_cpu, USI val);
>
> +#define OR1K_DEFAULT_MEM_SIZE 0x800000 /* 8M */
> +
> +struct or1k_sim_cpu
> +{
> + OR1K_MISC_PROFILE or1k_misc_profile;
> +#define CPU_OR1K_MISC_PROFILE(cpu) (& OR1K_SIM_CPU (cpu)->or1k_misc_profile)
> +
> + /* CPU specific parts go here.
> + Note that in files that don't need to access these pieces WANT_CPU_FOO
> + won't be defined and thus these parts won't appear. This is ok in the
> + sense that things work. It is a source of bugs though.
> + One has to of course be careful to not take the size of this
> + struct and no structure members accessed in non-cpu specific files can
> + go after here. Oh for a better language. */
> + UWI spr[NUM_SPR];
> +
> + /* Next instruction will be in delay slot. */
> + BI next_delay_slot;
> + /* Currently in delay slot. */
> + BI delay_slot;
> +
> +#ifdef WANT_CPU_OR1K32BF
> + OR1K32BF_CPU_DATA cpu_data;
> +#endif
> +};
> +#define OR1K_SIM_CPU(cpu) ((struct or1k_sim_cpu *) CPU_ARCH_DATA (cpu))
> +
> #endif /* OR1K_SIM_H */
> diff --git a/sim/or1k/sim-main.h b/sim/or1k/sim-main.h
> index 24c8ddb0e31a..7dd3e9a66550 100644
> --- a/sim/or1k/sim-main.h
> +++ b/sim/or1k/sim-main.h
> @@ -21,42 +21,14 @@
>
> #define WITH_SCACHE_PBB 1
>
> -#include "ansidecl.h"
> #include "or1k-desc.h"
> #include "or1k-opc.h"
> #include "sim-basics.h"
> #include "arch.h"
> #include "sim-base.h"
> -#include "sim-fpu.h"
> -
> #include "cgen-sim.h"
> -#include "or1k-sim.h"
>
> -#define OR1K_DEFAULT_MEM_SIZE 0x800000 /* 8M */
> -
> -struct or1k_sim_cpu
> -{
> - OR1K_MISC_PROFILE or1k_misc_profile;
> -#define CPU_OR1K_MISC_PROFILE(cpu) (& OR1K_SIM_CPU (cpu)->or1k_misc_profile)
> -
> - /* CPU specific parts go here.
> - Note that in files that don't need to access these pieces WANT_CPU_FOO
> - won't be defined and thus these parts won't appear. This is ok in the
> - sense that things work. It is a source of bugs though.
> - One has to of course be careful to not take the size of this
> - struct and no structure members accessed in non-cpu specific files can
> - go after here. Oh for a better language. */
> - UWI spr[NUM_SPR];
> -
> - /* Next instruction will be in delay slot. */
> - BI next_delay_slot;
> - /* Currently in delay slot. */
> - BI delay_slot;
> -
> -#ifdef WANT_CPU_OR1K32BF
> - OR1K32BF_CPU_DATA cpu_data;
> -#endif
> -};
> -#define OR1K_SIM_CPU(cpu) ((struct or1k_sim_cpu *) CPU_ARCH_DATA (cpu))
> +/* TODO: Move this to the CGEN generated files instead. */
> +#include "or1k-sim.h"
>
> #endif /* SIM_MAIN_H */
> diff --git a/sim/or1k/traps.c b/sim/or1k/traps.c
> index 97e81f41e7da..6fe94d88abd6 100644
> --- a/sim/or1k/traps.c
> +++ b/sim/or1k/traps.c
> @@ -23,6 +23,7 @@
> #define WANT_CPU
>
> #include "sim-main.h"
> +#include "sim-fpu.h"
> #include "sim-signal.h"
> #include "cgen-ops.h"
>
> --
> 2.39.0
This all looks good to me.
Please commit,
-Stafford
prev parent reply other threads:[~2022-12-24 10:18 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-23 6:06 [PATCH 00/20] sim: reduce sim-main.h pollution Mike Frysinger
2022-12-23 6:06 ` [PATCH 01/20] sim: avr: move arch-specific settings to internal header Mike Frysinger
2022-12-23 6:06 ` [PATCH 02/20] sim: aarch64: " Mike Frysinger
2022-12-23 6:06 ` [PATCH 03/20] sim: arm: " Mike Frysinger
2022-12-23 6:06 ` [PATCH 04/20] sim: cr16: " Mike Frysinger
2022-12-23 6:06 ` [PATCH 05/20] sim: d10v: " Mike Frysinger
2022-12-23 6:06 ` [PATCH 06/20] sim: ft32: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 07/20] sim: msp430: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 08/20] sim: v850: standardize the arch-specific settings a little Mike Frysinger
2022-12-23 6:07 ` [PATCH 09/20] sim: riscv: move arch-specific settings to internal header Mike Frysinger
2022-12-23 6:07 ` [PATCH 10/20] sim: moxie: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 11/20] sim: example-synacor: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 12/20] sim: microblaze: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 13/20] sim: mn10300: standardize the arch-specific settings a little Mike Frysinger
2022-12-23 6:07 ` [PATCH 14/20] sim: pru: move arch-specific settings to internal header Mike Frysinger
2022-12-23 6:07 ` [PATCH 15/20] sim: h8300: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 16/20] sim: mcore: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 17/20] sim: sh: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 18/20] sim: m68hc11: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 19/20] sim: bfin: " Mike Frysinger
2022-12-23 6:07 ` [PATCH 20/20] sim: m32r: " Mike Frysinger
2022-12-24 1:55 ` [PATCH] sim: or1k: " Mike Frysinger
2022-12-24 10:18 ` Stafford Horne [this message]
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