From: Luis Machado <luis.machado@arm.com>
To: <gdb-patches@sourceware.org>
Subject: [PATCH v3 01/16] [gdb/aarch64] Fix register fetch/store order for native AArch64 Linux
Date: Fri, 30 Jun 2023 14:46:01 +0100 [thread overview]
Message-ID: <20230630134616.1238105-2-luis.machado@arm.com> (raw)
In-Reply-To: <20230630134616.1238105-1-luis.machado@arm.com>
I noticed we don't handle register reads/writes in the best way for native
AArch64 Linux. Some registers are fetched/stored even if upper level code
told us to fetch a particular register number.
Fix this by being more strict about which registers we touch when
reading/writing them in the native AArch64 Linux layer.
There should be no user-visible changes due to this patch.
Regression-tested on aarch64-linux Ubuntu 22.04/20.04.
---
gdb/aarch64-linux-nat.c | 60 ++++++++++++++++++++++-------------------
1 file changed, 33 insertions(+), 27 deletions(-)
diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c
index ecb2eeb9540..62656a7347b 100644
--- a/gdb/aarch64-linux-nat.c
+++ b/gdb/aarch64-linux-nat.c
@@ -504,6 +504,7 @@ aarch64_fetch_registers (struct regcache *regcache, int regno)
aarch64_gdbarch_tdep *tdep
= gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
+ /* Do we need to fetch all registers? */
if (regno == -1)
{
fetch_gregs_from_thread (regcache);
@@ -521,28 +522,28 @@ aarch64_fetch_registers (struct regcache *regcache, int regno)
if (tdep->has_tls ())
fetch_tlsregs_from_thread (regcache);
}
+ /* General purpose register? */
else if (regno < AARCH64_V0_REGNUM)
fetch_gregs_from_thread (regcache);
- else if (tdep->has_sve ())
+ /* SVE register? */
+ else if (tdep->has_sve () && regno <= AARCH64_SVE_VG_REGNUM)
fetch_sveregs_from_thread (regcache);
- else
+ /* FPSIMD register? */
+ else if (regno < AARCH64_FPCR_REGNUM)
fetch_fpregs_from_thread (regcache);
-
- if (tdep->has_pauth ())
- {
- if (regno == AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base)
- || regno == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base))
- fetch_pauth_masks_from_thread (regcache);
- }
-
- /* Fetch individual MTE registers. */
- if (tdep->has_mte ()
- && (regno == tdep->mte_reg_base))
+ /* PAuth register? */
+ else if (tdep->has_pauth ()
+ && (regno == AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base)
+ || regno == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base)))
+ fetch_pauth_masks_from_thread (regcache);
+ /* MTE register? */
+ else if (tdep->has_mte ()
+ && (regno == tdep->mte_reg_base))
fetch_mteregs_from_thread (regcache);
-
- if (tdep->has_tls ()
- && regno >= tdep->tls_regnum_base
- && regno < tdep->tls_regnum_base + tdep->tls_register_count)
+ /* TLS register? */
+ else if (tdep->has_tls ()
+ && regno >= tdep->tls_regnum_base
+ && regno < tdep->tls_regnum_base + tdep->tls_register_count)
fetch_tlsregs_from_thread (regcache);
}
@@ -592,6 +593,7 @@ aarch64_store_registers (struct regcache *regcache, int regno)
aarch64_gdbarch_tdep *tdep
= gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
+ /* Do we need to store all registers? */
if (regno == -1)
{
store_gregs_to_thread (regcache);
@@ -606,22 +608,26 @@ aarch64_store_registers (struct regcache *regcache, int regno)
if (tdep->has_tls ())
store_tlsregs_to_thread (regcache);
}
+ /* General purpose register? */
else if (regno < AARCH64_V0_REGNUM)
store_gregs_to_thread (regcache);
- else if (tdep->has_sve ())
+ /* SVE register? */
+ else if (tdep->has_sve () && regno <= AARCH64_SVE_VG_REGNUM)
store_sveregs_to_thread (regcache);
- else
+ /* FPSIMD register? */
+ else if (regno < AARCH64_FPCR_REGNUM)
store_fpregs_to_thread (regcache);
-
- /* Store MTE registers. */
- if (tdep->has_mte ()
- && (regno == tdep->mte_reg_base))
+ /* MTE register? */
+ else if (tdep->has_mte ()
+ && (regno == tdep->mte_reg_base))
store_mteregs_to_thread (regcache);
-
- if (tdep->has_tls ()
- && regno >= tdep->tls_regnum_base
- && regno < tdep->tls_regnum_base + tdep->tls_register_count)
+ /* TLS register? */
+ else if (tdep->has_tls ()
+ && regno >= tdep->tls_regnum_base
+ && regno < tdep->tls_regnum_base + tdep->tls_register_count)
store_tlsregs_to_thread (regcache);
+
+ /* PAuth registers are read-only. */
}
/* A version of the "store_registers" target_ops method used when running
--
2.25.1
next prev parent reply other threads:[~2023-06-30 13:46 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-30 13:46 [PATCH v3 00/16] SME support for AArch64 gdb/gdbserver on Linux Luis Machado
2023-06-30 13:46 ` Luis Machado [this message]
2023-07-24 15:53 ` [PATCH v3 01/16] [gdb/aarch64] Fix register fetch/store order for native AArch64 Linux Thiago Jung Bauermann
2023-07-24 16:26 ` Luis Machado
2023-06-30 13:46 ` [PATCH v3 02/16] [gdb/aarch64] refactor: Rename SVE-specific files Luis Machado
2023-06-30 13:46 ` [PATCH v3 03/16] [gdb/gdbserver] refactor: Simplify SVE interface to read/write registers Luis Machado
2023-07-24 16:19 ` Thiago Jung Bauermann
2023-07-25 9:28 ` Luis Machado
2023-06-30 13:46 ` [PATCH v3 04/16] [gdb/aarch64] sve: Fix return command when using V registers in a SVE-enabled target Luis Machado
2023-06-30 13:46 ` [PATCH v3 05/16] [gdb/aarch64] sme: Enable SME registers and pseudo-registers Luis Machado
2023-07-26 20:01 ` Thiago Jung Bauermann
2023-07-27 9:01 ` Luis Machado
2023-07-28 1:19 ` Thiago Jung Bauermann
2023-06-30 13:46 ` [PATCH v3 06/16] [gdbserver/aarch64] refactor: Adjust expedited registers dynamically Luis Machado
2023-06-30 13:46 ` [PATCH v3 07/16] [gdbserver/aarch64] sme: Add support for SME Luis Machado
2023-07-27 19:41 ` Thiago Jung Bauermann
2023-06-30 13:46 ` [PATCH v3 08/16] [gdb/aarch64] sve: Fix signal frame z/v register restore Luis Machado
2023-07-27 21:52 ` Thiago Jung Bauermann
2023-07-31 12:22 ` Luis Machado
2023-06-30 13:46 ` [PATCH v3 09/16] [gdb/aarch64] sme: Signal frame support Luis Machado
2023-07-27 22:25 ` Thiago Jung Bauermann
2023-07-31 12:23 ` Luis Machado
2023-06-30 13:46 ` [PATCH v3 10/16] [gdb/aarch64] sme: Fixup sigframe gdbarch when vg/svg changes Luis Machado
2023-07-28 1:01 ` Thiago Jung Bauermann
2023-07-31 12:27 ` Luis Machado
2023-06-30 13:46 ` [PATCH v3 11/16] [gdb/aarch64] sme: Support TPIDR2 signal frame context Luis Machado
2023-06-30 13:46 ` [PATCH v3 12/16] [gdb/generic] corefile/bug: Use thread-specific gdbarch when dumping register state to core files Luis Machado
2023-06-30 13:46 ` [PATCH v3 13/16] [gdb/generic] corefile/bug: Fixup (gcore) core file target description reading order Luis Machado
2023-07-28 3:12 ` Thiago Jung Bauermann
2023-07-31 11:38 ` Luis Machado
2023-09-05 8:28 ` Luis Machado
2023-06-30 13:46 ` [PATCH v3 14/16] [gdb/aarch64] sme: Core file support for Linux Luis Machado
2023-08-03 0:18 ` Thiago Jung Bauermann
2023-08-03 11:37 ` Luis Machado
2023-08-04 20:45 ` Thiago Jung Bauermann
2023-06-30 13:46 ` [PATCH v3 15/16] [gdb/testsuite] sme: Add SVE/SME testcases Luis Machado
2023-08-04 0:59 ` Thiago Jung Bauermann
2023-08-11 15:42 ` Luis Machado
2023-08-12 0:42 ` Thiago Jung Bauermann
2023-06-30 13:46 ` [PATCH v3 16/16] [gdb/docs] sme: Document SME registers and features Luis Machado
2023-07-01 8:58 ` Eli Zaretskii
2023-07-03 9:52 ` Luis Machado
2023-07-03 12:03 ` Eli Zaretskii
2023-07-03 12:06 ` Luis Machado
2023-07-17 11:40 ` [PING][PATCH v3 00/16] SME support for AArch64 gdb/gdbserver on Linux Luis Machado
2023-07-24 8:15 ` Luis Machado
2023-08-04 21:24 ` [PATCH " Thiago Jung Bauermann
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