From: Mike Frysinger <vapier@gentoo.org>
To: Faraz Shahbazker <fshahbazker@wavecomp.com>
Cc: gdb-patches@sourceware.org,
"Maciej W . Rozycki" <macro@orcam.me.uk>,
Chao-ying Fu <cfu@wavecomp.com>
Subject: Re: [PATCH 3/5] sim: Add partial support for IEEE 754-2008
Date: Fri, 21 May 2021 21:34:08 -0400 [thread overview]
Message-ID: <YKhfkNyyg0O9ZVwH@vapier> (raw)
In-Reply-To: <20210520074554.1465327-4-fshahbazker@wavecomp.com>
On 20 May 2021 13:15, Faraz Shahbazker wrote:
just nits
> --- a/sim/common/sim-fpu.c
> +++ b/sim/common/sim-fpu.c
>
> +/* NaN handling specific to min/max operations. */
> +
> +INLINE_SIM_FPU (int)
> +sim_fpu_minmax_nan (sim_fpu *f, const sim_fpu *l, const sim_fpu *r)
> +{
> + if (sim_fpu_is_snan (l)
> + || sim_fpu_is_snan (r)
> + || sim_fpu_is_ieee754_1985 ())
> + return sim_fpu_op_nan (f, l, r);
> + else
> + /* if sim_fpu_is_ieee754_2008()
> + && ((sim_fpu_is_qnan (l) || sim_fpu_is_qnan (r))) */
i know it's a comment, but we want the correct style either way
/* if (sim_fpu_is_ieee754_2008 ()
&& (sim_fpu_is_qnan (l) || sim_fpu_is_qnan (r))) */
> + {
> + /* In IEEE754-2008:
> + * "minNum/maxNum is ... the canonicalized number if one
> + * operand is a number and the other a quiet NaN." */
don't want the leading * in multiline comment blocks.
two spaces before the trailing */.
> + if (sim_fpu_is_qnan (l))
> + *f = *r;
> + else if (sim_fpu_is_qnan (r))
> + *f = *l;
should the else be a comment too ?
> +INLINE_SIM_FPU (int)
> +sim_fpu_is_un (const sim_fpu *l,
> + const sim_fpu *r)
>
> +INLINE_SIM_FPU (int)
> +sim_fpu_is_or (const sim_fpu *l,
> + const sim_fpu *r)
>
> +INLINE_SIM_FPU (int)
> +sim_fpu_un (int *is,
> + const sim_fpu *l,
> + const sim_fpu *r)
bad indentation on these. you could just unwrap them.
> +{
> + if (sim_fpu_is_nan (l) || sim_fpu_is_nan (r))
> + {
> + *is = 1;
> + return 0;
> + }
bad indentation
> + /* Invert result */
period & two spaces at the end
> + *is = (*is) ? 0 : 1;
simpler ?
*is = !*is;
> +INLINE_SIM_FPU(int)
> +sim_fpu_classify(const sim_fpu *f)
space before the (
-mike
next prev parent reply other threads:[~2021-05-22 1:34 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-20 7:45 [PATCH 0/5] Add support for MIPS32/64 revision 6 Faraz Shahbazker
2021-05-20 7:45 ` [PATCH 1/5] sim: Allow toggling of quiet NaN-bit semantics Faraz Shahbazker
2021-05-22 1:16 ` Mike Frysinger
2021-05-20 7:45 ` [PATCH 2/5] sim: Factor out NaN handling in floating point operations Faraz Shahbazker
2021-05-22 1:25 ` Mike Frysinger
2021-05-23 6:32 ` [EXTERNAL]Re: " Faraz Shahbazker
2021-05-24 1:26 ` Mike Frysinger
2021-05-20 7:45 ` [PATCH 3/5] sim: Add partial support for IEEE 754-2008 Faraz Shahbazker
2021-05-22 1:34 ` Mike Frysinger [this message]
2021-05-20 7:45 ` [PATCH 4/5] sim: mips: Add simulator support for mips32r6/mips64r6 Faraz Shahbazker
2021-05-22 1:46 ` Mike Frysinger
2021-05-22 6:20 ` Eli Zaretskii
2021-06-27 19:25 ` [EXTERNAL]Re: " Faraz Shahbazker
2021-06-27 19:33 ` Simon Marchi
2021-06-27 19:44 ` Eli Zaretskii
2021-06-27 20:24 ` Faraz Shahbazker
2021-06-28 12:17 ` Eli Zaretskii
2021-07-02 10:10 ` Faraz Shahbazker
2021-12-24 18:42 ` Mike Frysinger
2021-06-28 1:16 ` Mike Frysinger
2021-05-22 6:44 ` Faraz Shahbazker
2021-05-24 17:57 ` [PATCH v2 0/5] Add support for MIPS32/64 revision 6 Faraz Shahbazker
2021-05-24 17:57 ` [PATCH v2 1/5] sim: Allow toggling of quiet NaN-bit semantics Faraz Shahbazker
2021-05-24 17:57 ` [PATCH v2 2/5] sim: Factor out NaN handling in floating point operations Faraz Shahbazker
2021-05-24 17:58 ` [PATCH v2 3/5] sim: Add partial support for IEEE 754-2008 Faraz Shahbazker
2021-05-24 17:58 ` [PATCH v2 4/5] sim: mips: Add simulator support for mips32r6/mips64r6 Faraz Shahbazker
2021-05-24 17:58 ` [PATCH v2 5/5] gdb: mips: Add MIPSR6 support Faraz Shahbazker
2021-05-29 1:53 ` Simon Marchi
2021-06-27 19:10 ` [PATCH v3 " Faraz Shahbazker
2021-05-20 7:45 ` [PATCH " Faraz Shahbazker
2022-02-02 10:17 ` [PATCH v5 0/4] sim: Add support for MIPS32/64 revision 6 Dragan Mladjenovic
2022-02-02 10:17 ` [PATCH v5 1/4] sim: Allow toggling of quiet NaN-bit semantics Dragan Mladjenovic
2022-02-02 10:17 ` [PATCH v5 2/4] sim: Factor out NaN handling in floating point operations Dragan Mladjenovic
2022-02-02 10:17 ` [PATCH v5 3/4] sim: Add partial support for IEEE 754-2008 Dragan Mladjenovic
2022-02-02 10:17 ` [PATCH v5 4/4] sim: mips: Add simulator support for mips32r6/mips64r6 Dragan Mladjenovic
2022-12-25 0:26 ` Mike Frysinger
2022-12-27 19:35 ` Dragan Mladjenovic
2022-12-28 0:12 ` Mike Frysinger
2023-01-13 14:09 ` Dragan Mladjenovic
2022-02-04 5:48 ` [PATCH v5 0/4] sim: Add support for MIPS32/64 revision 6 Mike Frysinger
2022-02-04 12:29 ` Dragan Mladjenovic
2022-02-06 14:57 ` Joel Brobecker
2022-02-06 15:38 ` Dragan Mladjenovic
2022-02-06 16:28 ` Joel Brobecker
2022-02-06 18:49 ` Mike Frysinger
2022-02-07 11:48 ` Dragan Mladjenovic
2022-02-13 13:43 ` Joel Brobecker
2022-02-14 0:04 ` Mike Frysinger
2022-04-15 7:24 ` Dragan Mladjenovic
2022-04-15 7:35 ` Eli Zaretskii
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