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* [PATCH] [powerpc] fegetenv_and_set_rn now uses the builtins provided by GCC.
@ 2023-09-23 15:49 Manjunath Matti
  2023-09-27 16:56 ` Adhemerval Zanella Netto
  2023-10-19  1:47 ` Peter Bergner
  0 siblings, 2 replies; 8+ messages in thread
From: Manjunath Matti @ 2023-09-23 15:49 UTC (permalink / raw)
  To: libc-alpha; +Cc: rajis, Manjunath Matti, Carl Love

On powerpc, SET_RESTORE_ROUND uses inline assembly to optimize the
prologue get/save/set rounding mode operations for POWER9 and
later by using 'mffscrn' where possible, this was introduced by
commit f1c56cdff09f650ad721fae026eb6a3651631f3d.

GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn
which now returns the FPSCR fields in a double. This feature is
available on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro
is defined.
GCC commit ef3bbc69d15707e4db6e2f198c621effb636cc26 adds
this feature.

Changes are done to use __builtin_set_fpscr_rn instead of mffscrn
or mffscrni in __fe_mffscrn(rn).

Suggested-by: Carl Love <cel@us.ibm.com>
---
 sysdeps/powerpc/fpu/fenv_libc.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
index fa5e1c697e..a2a12d914b 100644
--- a/sysdeps/powerpc/fpu/fenv_libc.h
+++ b/sysdeps/powerpc/fpu/fenv_libc.h
@@ -68,6 +68,14 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
     __fr;								\
   })
 
+/* Starting with GCC 14 __builtin_set_fpscr_rn can be used to return the
+   FPSCR fields as a double.  This support is available
+   on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined.
+   To retain backward compatibility with older GCC, we still retain the
+   old inline assembly implementation.*/
+#ifdef __SET_FPSCR_RN_RETURNS_FPSCR__
+#define __fe_mffscrn(rn)  __builtin_set_fpscr_rn (rn)
+#else
 #define __fe_mffscrn(rn)						\
   ({register fenv_union_t __fr;						\
     if (__builtin_constant_p (rn))					\
@@ -83,6 +91,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
     }									\
     __fr.fenv;								\
   })
+#endif
 
 /* Like fegetenv_control, but also sets the rounding mode.  */
 #ifdef _ARCH_PWR9
-- 
2.39.3


^ permalink raw reply	[flat|nested] 8+ messages in thread
* [PATCH] [powerpc] fegetenv_and_set_rn now uses the builtins provided by GCC.
@ 2023-09-12  8:27 Manjunath Matti
  2023-09-12 13:27 ` Adhemerval Zanella Netto
  0 siblings, 1 reply; 8+ messages in thread
From: Manjunath Matti @ 2023-09-12  8:27 UTC (permalink / raw)
  To: libc-alpha; +Cc: rajis, Manjunath Matti, Carl Love

On powerpc, SET_RESTORE_ROUND uses inline assembly to optimize the
prologue get/save/set rounding mode operations for POWER9 and
later by using 'mffscrn' where possible, this was introduced by
commit f1c56cdff09f650ad721fae026eb6a3651631f3d.

GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn
which now returns the FPSCR fields in a double. This feature is
available on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro
is defined along with __builtin_set_fpscr_rn enabled.
GCC commit ef3bbc69d15707e4db6e2f198c621effb636cc26 adds
this feature.

Changes are done to use __builtin_set_fpscr_rn instead of mffscrn
or mffscrni in __fe_mffscrn(rn).

Suggested-by: Carl Love <cel@us.ibm.com>
---
 sysdeps/powerpc/fpu/fenv_libc.h | 23 ++++++++++++++++++++---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
index fa5e1c697e..55484eb229 100644
--- a/sysdeps/powerpc/fpu/fenv_libc.h
+++ b/sysdeps/powerpc/fpu/fenv_libc.h
@@ -84,8 +84,15 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
     __fr.fenv;								\
   })
 
+/* GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn and
+   now returns the FPSCR fields in a double. This support is available
+   on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined.
+   To retain backward compatibility with older GCC, we still retain the
+   old inline assembly implementation.  */
+#if defined _ARCH_PWR9 && defined __SET_FPSCR_RN_RETURNS_FPSCR__
+#define fegetenv_and_set_rn(rn) __builtin_set_fpscr_rn (rn)
+#elif defined _ARCH_PWR9
 /* Like fegetenv_control, but also sets the rounding mode.  */
-#ifdef _ARCH_PWR9
 #define fegetenv_and_set_rn(rn) __fe_mffscrn (rn)
 #else
 /* 'mffscrn' will decode to 'mffs' on ARCH < 3_00, which is still necessary
@@ -148,7 +155,12 @@ typedef union
 static inline int
 __fesetround_inline (int round)
 {
-#ifdef _ARCH_PWR9
+/* GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn and
+   now returns the FPSCR fields in a double. This support is available
+   on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined.  */
+#if defined _ARCH_PWR9 && defined __SET_FPSCR_RN_RETURNS_FPSCR__
+  __builtin_set_fpscr_rn (round);
+#elif defined _ARCH_PWR9
   __fe_mffscrn (round);
 #else
   if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00))
@@ -178,7 +190,12 @@ __fesetround_inline (int round)
 static inline void
 __fesetround_inline_nocheck (const int round)
 {
-#ifdef _ARCH_PWR9
+/* GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn and
+   now returns the FPSCR fields in a double. This support is available
+   on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined.  */
+#if defined _ARCH_PWR9 && defined __SET_FPSCR_RN_RETURNS_FPSCR__
+  __builtin_set_fpscr_rn (round);
+#elif defined _ARCH_PWR9
   __fe_mffscrn (round);
 #else
   if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00))
-- 
2.39.3


^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2023-10-19  1:47 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-09-23 15:49 [PATCH] [powerpc] fegetenv_and_set_rn now uses the builtins provided by GCC Manjunath Matti
2023-09-27 16:56 ` Adhemerval Zanella Netto
2023-10-19  1:47 ` Peter Bergner
  -- strict thread matches above, loose matches on Subject: below --
2023-09-12  8:27 Manjunath Matti
2023-09-12 13:27 ` Adhemerval Zanella Netto
2023-09-20 11:28   ` Manjunath S Matti
2023-09-20 13:33     ` Adhemerval Zanella Netto
2023-10-19  1:25     ` Peter Bergner

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