From: Steven Munroe <munroesj@us.ibm.com>
To: Jakub Jelinek <jakub@redhat.com>
Cc: Glibc hackers <libc-hacker@sources.redhat.com>,
Ulrich Drepper <drepper@redhat.com>,
Peter Eberlein <eberlein@us.ibm.com>
Subject: Re: [PATCH] PPC fenv fixes.
Date: Wed, 28 Mar 2007 15:29:00 -0000 [thread overview]
Message-ID: <460A8D78.6060303@us.ibm.com> (raw)
In-Reply-To: <46096124.6050504@us.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 1575 bytes --]
Steven Munroe wrote:
> Jakub Jelinek wrote:
>
>> On Tue, Mar 27, 2007 at 11:09:28AM -0500, Steven Munroe wrote:
>>
>>> 2007-03-26 Steven Munroe <sjmunroe@us.ibm.com>
>>>
>>> * sysdeps/powerpc/fpu/feupdateenv.c: Change mask to merge exceptions
>>> from env.
>>>
>> Will that actually raise SIGFPE signals when exceptions are enabled?
>> From my reading of POSIX that's what should happen with the
>> `old' exceptions (and other arches are calling feraiseexcept that will do
>> that). I didn't add a testcase for it because I'm not 100% sure about that.
>>
>>
> hmmm not unless the SIGFPE is eanbled by the MSR FE bits. So we will
> need to call __fe_nomask_env() in feupdateenv similar to what we do in
> feenableexcept(). Probably should add the __fe_mask_env() call for when
> the application remasks FP exceptions. This allows the hardware to run
> faster when we are taking the default action.
>
> I will rework the patch.
>
Merges my patch with one from Peter Bergner to use the prctl system to
eanble/disable FP exception when ever the FPSCR exeptions bits:
FPSCR_VE, /* invalid operation exception enable */
FPSCR_OE, /* overflow exception enable */
FPSCR_UE, /* underflow exception enable */
FPSCR_ZE, /* zero divide exception enable */
FPSCR_XE, /* inexact exception enable */
Change from all disabled to any enabled or any eanbled to all disabled.
This check was already in feenableexcept(). This patch adds the
appropriate eanble/disable calls to fedisableexcept() and __feupdateenv().
[-- Attachment #2: ppc-fenv-20070320.txt --]
[-- Type: text/plain, Size: 10722 bytes --]
2007-03-26 Steven Munroe <sjmunroe@us.ibm.com>
Peter Bergner <bergner@us.ibm.com>
* sysdeps/powerpc/Versions (GLIBC_2.4): Add __fe_mask_env.
* sysdeps/powerpc/bits/fenv.h: Declare __fe_nomask_env extern.
Define FE_MASK_ENV.
* sysdeps/powerpc/fpu/fe_mask.c: New file.
* sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept):
Call __fe_mask_env if all FP exceptions disabled.
* sysdeps/powerpc/fpu/feupdateenv.c (__feupdateenv): Change mask to
merge exceptions from env. Use FE_NOMASK_ENV or FE_MASK_ENV when
transitioning from all exceptions disabled to any exception enabled
or visa versa.
* sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_mask.c: New file.
* sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_mask.c: New file.
diff -urN libc25-cvstip-20070320/sysdeps/powerpc/Versions libc25/sysdeps/powerpc/Versions
--- libc25-cvstip-20070320/sysdeps/powerpc/Versions 2004-02-13 21:25:10.000000000 -0600
+++ libc25/sysdeps/powerpc/Versions 2007-03-27 17:00:20.662310456 -0500
@@ -3,6 +3,10 @@
# symbols used in macros from sysdeps/powerpc/bits/fenv.h
__fe_dfl_env; __fe_enabled_env; __fe_nonieee_env; __fe_nomask_env;
}
+ GLIBC_2.4 {
+ # symbols used in macros from sysdeps/powerpc/bits/fenv.h
+ __fe_mask_env;
+ }
}
libc {
diff -urN libc25-cvstip-20070320/sysdeps/powerpc/bits/fenv.h libc25/sysdeps/powerpc/bits/fenv.h
--- libc25-cvstip-20070320/sysdeps/powerpc/bits/fenv.h 2002-10-17 17:38:37.000000000 -0500
+++ libc25/sysdeps/powerpc/bits/fenv.h 2007-03-27 13:59:43.475316488 -0500
@@ -142,4 +142,8 @@
performance penalty (but have no other visible effect). */
extern const fenv_t *__fe_nomask_env (void);
# define FE_NOMASK_ENV (__fe_nomask_env ())
+
+/* Floating-point environment with all exceptions disabled. */
+extern const fenv_t *__fe_mask_env (void);
+# define FE_MASK_ENV (__fe_mask_env ())
#endif
diff -urN libc25-cvstip-20070320/sysdeps/powerpc/fpu/Makefile libc25/sysdeps/powerpc/fpu/Makefile
--- libc25-cvstip-20070320/sysdeps/powerpc/fpu/Makefile 2004-05-25 23:33:09.000000000 -0500
+++ libc25/sysdeps/powerpc/fpu/Makefile 2007-03-27 14:49:12.307388232 -0500
@@ -1,5 +1,5 @@
ifeq ($(subdir),math)
-libm-support += fenv_const fe_nomask t_sqrt
+libm-support += fenv_const fe_nomask fe_mask t_sqrt
# libm needs ld.so to access dl_hwcap
$(objpfx)libm.so: $(elfobjdir)/ld.so
diff -urN libc25-cvstip-20070320/sysdeps/powerpc/fpu/fe_mask.c libc25/sysdeps/powerpc/fpu/fe_mask.c
--- libc25-cvstip-20070320/sysdeps/powerpc/fpu/fe_mask.c Wed Dec 31 18:00:00 1969
+++ libc25/sysdeps/powerpc/fpu/fe_mask.c Tue Mar 27 13:59:43 2007
@@ -0,0 +1,32 @@
+/* Procedure definition for FE_MASK_ENV.
+ Copyright (C) 2007 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <errno.h>
+
+/* This is presently a stub, until it's decided how the kernels should
+ support this. */
+
+const fenv_t *
+__fe_mask_env(void)
+{
+ __set_errno (ENOSYS);
+ return FE_DFL_ENV;
+}
+stub_warning (__fe_mask_env)
diff -urN libc25-cvstip-20070320/sysdeps/powerpc/fpu/fedisblxcpt.c libc25/sysdeps/powerpc/fpu/fedisblxcpt.c
--- libc25-cvstip-20070320/sysdeps/powerpc/fpu/fedisblxcpt.c 2001-07-05 23:56:02.000000000 -0500
+++ libc25/sysdeps/powerpc/fpu/fedisblxcpt.c 2007-03-27 13:59:43.494313600 -0500
@@ -24,7 +24,7 @@
fedisableexcept (int excepts)
{
fenv_union_t fe;
- int result;
+ int result, new;
result = fegetexcept ();
@@ -44,7 +44,11 @@
fe.l[1] &= ~(1 << (31 - FPSCR_VE));
fesetenv_register (fe.fenv);
- if ((fegetexcept () & excepts) != 0)
+ new = fegetexcept ();
+ if (new == 0 && result != 0)
+ (void)__fe_mask_env ();
+
+ if ((new & excepts) != 0)
result = -1;
return result;
}
diff -urN libc25-cvstip-20070320/sysdeps/powerpc/fpu/feupdateenv.c libc25/sysdeps/powerpc/fpu/feupdateenv.c
--- libc25-cvstip-20070320/sysdeps/powerpc/fpu/feupdateenv.c 2001-07-05 23:56:02.000000000 -0500
+++ libc25/sysdeps/powerpc/fpu/feupdateenv.c 2007-03-27 16:50:49.810423368 -0500
@@ -1,5 +1,5 @@
/* Install given floating-point environment and raise exceptions.
- Copyright (C) 1997,99,2000,01 Free Software Foundation, Inc.
+ Copyright (C) 1997,99,2000,01,07 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
@@ -30,8 +30,24 @@
new.fenv = *envp;
old.fenv = fegetenv_register ();
- /* Copy the set exceptions from `old' to `new'. */
- new.l[1] = (new.l[1] & 0xE00000FF) | (old.l[1] & 0x1FFFFF00);
+ /* Restore rounding mode and exception enable from *envp and merge
+ exceptions. Leave fraction rounded/inexact and FP result/CC bits
+ unchanged. */
+ new.l[1] = (old.l[1] & 0x1FFFFF00) | (new.l[1] & 0x1FF80FFF);
+
+ /* If the old env has no eabled exceptions and the new env has any enabled
+ exceptions, then unmask SIGFPE in the MSR FE0/FE1 bits. This will put
+ the hardware into "precise mode" and may cause the FPU to run slower on
+ some hardware. */
+ if ((old.l[1] & 0x000000F8) == 0 && (new.l[1] & 0x000000F8) != 0)
+ FE_NOMASK_ENV;
+
+ /* If the old env had any eabled exceptions and the new env has no enabled
+ exceptions, then mask SIGFPE in the MSR FE0/FE1 bits. This may allow the
+ FPU to run faster because it always takes the default action and can not
+ generate SIGFPE. */
+ if ((old.l[1] & 0x000000F8) != 0 && (new.l[1] & 0x000000F8) == 0)
+ FE_MASK_ENV;
/* Atomically enable and raise (if appropriate) exceptions set in `new'. */
fesetenv_register (new.fenv);
diff -urN libc25-cvstip-20070320/sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_mask.c libc25/sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_mask.c
--- libc25-cvstip-20070320/sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_mask.c Wed Dec 31 18:00:00 1969
+++ libc25/sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_mask.c Tue Mar 27 13:59:43 2007
@@ -0,0 +1,68 @@
+/* Procedure definition for FE_MASK_ENV for Linux/ppc.
+ Copyright (C) 2007 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <errno.h>
+#include <signal.h>
+#include <unistd.h>
+#include <sysdep.h>
+#include <sys/prctl.h>
+#include <kernel-features.h>
+
+#if __ASSUME_NEW_PRCTL_SYSCALL == 0
+/* This is rather fiddly under Linux. We don't have direct access,
+ and there is no system call, but we can change the bits
+ in a signal handler's context... */
+
+static struct sigaction oact;
+
+static void
+fe_mask_handler (int signum, struct sigcontext *sc)
+{
+ sc->regs->msr &= ~0x900ul; /* FE0 | FE1 */
+ sigaction (SIGUSR1, &oact, NULL);
+}
+#endif
+
+const fenv_t *
+__fe_mask_env (void)
+{
+#if __ASSUME_NEW_PRCTL_SYSCALL == 0
+# if defined PR_SET_FPEXC && defined PR_FP_EXC_DISABLED
+ int result = INLINE_SYSCALL (prctl, 2, PR_SET_FPEXC, PR_FP_EXC_DISABLED);
+
+ if (result == -1 && errno == EINVAL)
+# endif
+ {
+ struct sigaction act;
+
+ act.sa_handler = (sighandler_t) fe_mask_handler;
+ sigemptyset (&act.sa_mask);
+ act.sa_flags = 0;
+
+ sigaction (SIGUSR1, &act, &oact);
+ raise (SIGUSR1);
+ }
+#else
+ INTERNAL_SYSCALL_DECL (err);
+ INTERNAL_SYSCALL (prctl, err, 2, PR_SET_FPEXC, PR_FP_EXC_DISABLED);
+#endif
+
+ return FE_DFL_ENV;
+}
diff -urN libc25-cvstip-20070320/sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_mask.c libc25/sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_mask.c
--- libc25-cvstip-20070320/sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_mask.c Wed Dec 31 18:00:00 1969
+++ libc25/sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_mask.c Tue Mar 27 13:59:43 2007
@@ -0,0 +1,43 @@
+/* Procedure definition for FE_MASK_ENV for Linux/ppc64.
+ Copyright (C) 2007 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <errno.h>
+#include <sysdep.h>
+#include <sys/syscall.h>
+#include <sys/prctl.h>
+#include <kernel-features.h>
+
+const fenv_t *
+__fe_mask_env (void)
+{
+#if defined PR_SET_FPEXC && defined PR_FP_EXC_DISABLED
+ int result;
+ INTERNAL_SYSCALL_DECL (err);
+ result = INTERNAL_SYSCALL (prctl, err, 2, PR_SET_FPEXC, PR_FP_EXC_DISABLED);
+# ifndef __ASSUME_NEW_PRCTL_SYSCALL
+ if (INTERNAL_SYSCALL_ERROR_P (result, err)
+ && INTERNAL_SYSCALL_ERRNO (result, err) == EINVAL)
+ __set_errno (ENOSYS);
+# endif
+#else
+ __set_errno (ENOSYS);
+#endif
+ return FE_DFL_ENV;
+}
next prev parent reply other threads:[~2007-03-28 15:29 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-03-22 14:49 [PATCH] fenv fixes for x86_64/i386/ia64 Jakub Jelinek
2007-03-22 21:46 ` Steven Munroe
2007-03-27 15:53 ` [PATCH] PPC fenv fixes Steven Munroe
[not found] ` <20070327160708.GA355@devserv.devel.redhat.com>
2007-03-27 18:07 ` Steven Munroe
2007-03-28 15:29 ` Steven Munroe [this message]
2007-04-05 2:27 ` Richard Henderson
2007-04-05 22:00 ` [PATCH] PPC fenv fixes. 3rd update Steven Munroe
2007-04-14 17:32 ` Jakub Jelinek
2007-04-17 0:09 ` Richard Henderson
[not found] ` <20070417002157.GI355@devserv.devel.redhat.com>
2007-04-30 21:45 ` Steven Munroe
2007-04-02 16:43 ` [PATCH] [PORTS] PPC fenv fixes for soft-fp Steven Munroe
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=460A8D78.6060303@us.ibm.com \
--to=munroesj@us.ibm.com \
--cc=drepper@redhat.com \
--cc=eberlein@us.ibm.com \
--cc=jakub@redhat.com \
--cc=libc-hacker@sources.redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).