From: Haochen Jiang <haochen.jiang@intel.com>
To: binutils@sourceware.org
Cc: jbeulich@suse.com, hjl.tools@gmail.com, amodra@gmail.com,
konglin1 <lingling.kong@intel.com>
Subject: [PATCH 1/5] Support Intel AVX-VNNI-INT16
Date: Thu, 13 Jul 2023 14:32:59 +0800 [thread overview]
Message-ID: <20230713063303.205862-2-haochen.jiang@intel.com> (raw)
In-Reply-To: <20230713063303.205862-1-haochen.jiang@intel.com>
From: konglin1 <lingling.kong@intel.com>
gas/ChangeLog:
* NEWS: Support Intel AVX-VNNI-INT16.
* config/tc-i386.c: Add avx_vnni_int16.
* doc/c-i386.texi: Document avx_vnni_int16.
* testsuite/gas/i386/i386.exp: Run AVX VNNI INT16 tests.
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/avx-vnni-int16-intel.d: New test.
* testsuite/gas/i386/avx-vnni-int16.d: New test.
* testsuite/gas/i386/avx-vnni-int16.s: New test.
* testsuite/gas/i386/x86-64-avx-vnni-int16-intel.d: New test.
* testsuite/gas/i386/x86-64-avx-vnni-int16.d: New test.
* testsuite/gas/i386/x86-64-avx-vnni-int16.s: New test.
opcodes/ChangeLog:
* i386-dis.c (PREFIX_VEX_0F38D2): New.
(PREFIX_VEX_0F38D3): Ditto.
(VEX_W_0F38D2_P_0): Ditto.
(VEX_W_0F38D2_P_1): Ditto.
(VEX_W_0F38D2_P_2): Ditto.
(VEX_W_0F38D3_P_0): Ditto.
(VEX_W_0F38D3_P_1): Ditto.
(VEX_W_0F38D3_P_2): Ditto.
(prefix_table): Add PREFIX_VEX_0F38D2 and PREFIX_VEX_0F38D3.
(vex_table): Add PREFIX_VEX_0F38D2 and PREFIX_VEX_0F38D3,
delete VEX_W_0F38D2 and VEX_W_0F38D3.
(vex_w_table): Add VEX_W_0F38D2_P_0, VEX_W_0F38D2_P_1, VEX_W_0F38D2_P_2,
VEX_W_0F38D3_P_0, VEX_W_0F38D3_P_1, VEX_W_0F38D3_P_2.
* i386-gen.c (isa_dependencies): Add AVX_VNNI_INT16.
(cpu_flag): Ditto.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h: (CpuAVX_VNNI_INT16): New.
* i386-opc.tbl: Add Intel AVX_VNNI_INT16 instructions.
* i386-tbl.h: Regenerated.
---
gas/NEWS | 2 +
gas/config/tc-i386.c | 1 +
gas/doc/c-i386.texi | 5 +-
gas/testsuite/gas/i386/avx-vnni-int16-intel.d | 130 +
gas/testsuite/gas/i386/avx-vnni-int16.d | 130 +
gas/testsuite/gas/i386/avx-vnni-int16.s | 127 +
gas/testsuite/gas/i386/i386.exp | 2 +
.../gas/i386/x86-64-avx-vnni-int16-intel.d | 130 +
.../gas/i386/x86-64-avx-vnni-int16.d | 130 +
.../gas/i386/x86-64-avx-vnni-int16.s | 127 +
gas/testsuite/gas/i386/x86-64.exp | 2 +
opcodes/i386-dis.c | 32 +-
opcodes/i386-gen.c | 3 +
opcodes/i386-init.h | 822 +-
opcodes/i386-mnem.h | 2678 ++--
opcodes/i386-opc.h | 3 +
opcodes/i386-opc.tbl | 11 +
opcodes/i386-tbl.h | 11767 +++++++++++-----
18 files changed, 10570 insertions(+), 5532 deletions(-)
create mode 100644 gas/testsuite/gas/i386/avx-vnni-int16-intel.d
create mode 100644 gas/testsuite/gas/i386/avx-vnni-int16.d
create mode 100644 gas/testsuite/gas/i386/avx-vnni-int16.s
create mode 100644 gas/testsuite/gas/i386/x86-64-avx-vnni-int16-intel.d
create mode 100644 gas/testsuite/gas/i386/x86-64-avx-vnni-int16.d
create mode 100644 gas/testsuite/gas/i386/x86-64-avx-vnni-int16.s
diff --git a/gas/NEWS b/gas/NEWS
index 59bdd30aaaa..5e9ed5ab4bc 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@
-*- text -*-
+* Add support for Intel AVX-VNNI-INT16 instructions.
+
Changes in 2.41:
* Add support for Intel FRED instructions.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index bc02f8e0abf..0d3d7560efe 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1151,6 +1151,7 @@ static const arch_entry cpu_arch[] =
SUBARCH (rmpquery, RMPQUERY, ANY_RMPQUERY, false),
SUBARCH (fred, FRED, ANY_FRED, false),
SUBARCH (lkgs, LKGS, ANY_LKGS, false),
+ SUBARCH (avx_vnni_int16, AVX_VNNI_INT16, ANY_AVX_VNNI_INT16, false),
};
#undef SUBARCH
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 49b6e3b1abb..40ba942d9cb 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -207,6 +207,7 @@ accept various extension mnemonics. For example,
@code{rao_int},
@code{fred},
@code{lkgs},
+@code{avx_vnni_int16},
@code{amx_int8},
@code{amx_bf16},
@code{amx_fp16},
@@ -1635,8 +1636,8 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt}
@item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8}
@item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist}
-@item @samp{.avx_ne_convert} @tab @samp{.rao_int}
-@item @samp{.fred} @tab @samp{.lkgs}
+@item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs}
+@item @samp{.avx_vnni_int16}
@item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
@item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
diff --git a/gas/testsuite/gas/i386/avx-vnni-int16-intel.d b/gas/testsuite/gas/i386/avx-vnni-int16-intel.d
new file mode 100644
index 00000000000..649e89fd4a4
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-vnni-int16-intel.d
@@ -0,0 +1,130 @@
+#as:
+#objdump: -dw -Mintel
+#name: i386 AVX-VNNI-INT16 insns (Intel disassembly)
+#source: avx-vnni-int16.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b4 f4 00 00 00 10\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b4 f4 00 00 00 10\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b4 f4 00 00 00 10\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b4 f4 00 00 00 10\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b4 f4 00 00 00 10\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b4 f4 00 00 00 10\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b4 f4 00 00 00 10\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b4 f4 00 00 00 10\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b4 f4 00 00 00 10\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b4 f4 00 00 00 10\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b4 f4 00 00 00 10\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b4 f4 00 00 00 10\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b4 f4 00 00 00 10\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b4 f4 00 00 00 10\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b4 f4 00 00 00 10\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b4 f4 00 00 00 10\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b4 f4 00 00 00 10\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b4 f4 00 00 00 10\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b4 f4 00 00 00 10\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b4 f4 00 00 00 10\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b4 f4 00 00 00 10\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b4 f4 00 00 00 10\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b4 f4 00 00 00 10\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b4 f4 00 00 00 10\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
diff --git a/gas/testsuite/gas/i386/avx-vnni-int16.d b/gas/testsuite/gas/i386/avx-vnni-int16.d
new file mode 100644
index 00000000000..01a7ad29e53
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-vnni-int16.d
@@ -0,0 +1,130 @@
+#as:
+#objdump: -dw
+#name: i386 AVX-VNNI-INT16 insns
+#source: avx-vnni-int16.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds 0xfe0\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds -0x1000\(%edx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds -0x800\(%edx\),%xmm5,%xmm6
diff --git a/gas/testsuite/gas/i386/avx-vnni-int16.s b/gas/testsuite/gas/i386/avx-vnni-int16.s
new file mode 100644
index 00000000000..4a04de3073f
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-vnni-int16.s
@@ -0,0 +1,127 @@
+# Check 32bit AVX-VNNI-INT16 instructions
+
+ .allow_index_reg
+ .text
+_start:
+ vpdpwsud %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsud %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsud 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsud (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsud 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwsud -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwsud 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsud (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsud 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwsud -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwsuds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsuds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsuds 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsuds (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsuds 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwsuds -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwsuds 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsuds (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsuds 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwsuds -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwusd %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusd %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusd 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusd (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusd 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwusd -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwusd 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusd (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusd 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwusd -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwusds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusds 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusds (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusds 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwusds -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwusds 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusds (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusds 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwusds -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwuud %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuud %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuud 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuud (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuud 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwuud -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwuud 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuud (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuud 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwuud -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwuuds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuuds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuuds 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuuds (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuuds 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwuuds -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwuuds 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuuds (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuuds 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwuuds -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+
+.intel_syntax noprefix
+ vpdpwsud ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwsud xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwsud ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwsud ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwsud ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwsud ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwsud xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwsud xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwsud xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwsud xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwsuds ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwsuds xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwsuds ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwsuds ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwsuds ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwsuds ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwsuds xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwsuds xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwsuds xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwsuds xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwusd ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwusd xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwusd ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwusd ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwusd ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwusd ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwusd xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwusd xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwusd xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwusd xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwusds ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwusds xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwusds ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwusds ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwusds ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwusds ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwusds xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwusds xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwusds xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwusds xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwuud ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwuud xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwuud ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwuud ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwuud ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwuud ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwuud xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwuud xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwuud xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwuud xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwuuds ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwuuds xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwuuds ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwuuds ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwuuds ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwuuds ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwuuds xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwuuds xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16
+ vpdpwuuds xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwuuds xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index d78f1937c84..b69c692cd16 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -496,6 +496,8 @@ if [gas_32_check] then {
run_dump_test "raoint"
run_dump_test "raoint-intel"
run_list_test "amx-complex-inval"
+ run_dump_test "avx-vnni-int16"
+ run_dump_test "avx-vnni-int16-intel"
run_list_test "sg"
run_dump_test "clzero"
run_dump_test "invlpgb"
diff --git a/gas/testsuite/gas/i386/x86-64-avx-vnni-int16-intel.d b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16-intel.d
new file mode 100644
index 00000000000..7b9616f7d7b
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16-intel.d
@@ -0,0 +1,130 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 AVX-VNNI-INT16 insns (Intel disassembly)
+#source: x86-64-avx-vnni-int16.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 56 d2 b4 f5 00 00 00 10\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 56 d2 31\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 52 d2 b4 f5 00 00 00 10\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 52 d2 31\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 56 d3 b4 f5 00 00 00 10\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 56 d3 31\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 52 d3 b4 f5 00 00 00 10\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 52 d3 31\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 55 d2 b4 f5 00 00 00 10\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 55 d2 31\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 51 d2 b4 f5 00 00 00 10\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 51 d2 31\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 55 d3 b4 f5 00 00 00 10\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 55 d3 31\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 51 d3 b4 f5 00 00 00 10\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 51 d3 31\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 54 d2 b4 f5 00 00 00 10\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 54 d2 31\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 50 d2 b4 f5 00 00 00 10\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 50 d2 31\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 54 d3 b4 f5 00 00 00 10\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 54 d3 31\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 50 d3 b4 f5 00 00 00 10\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 50 d3 31\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 56 d2 b4 f5 00 00 00 10\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 56 d2 31\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 52 d2 b4 f5 00 00 00 10\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 52 d2 31\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 56 d3 b4 f5 00 00 00 10\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 56 d3 31\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 52 d3 b4 f5 00 00 00 10\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 52 d3 31\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 55 d2 b4 f5 00 00 00 10\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 55 d2 31\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 51 d2 b4 f5 00 00 00 10\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 51 d2 31\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 55 d3 b4 f5 00 00 00 10\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 55 d3 31\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 51 d3 b4 f5 00 00 00 10\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 51 d3 31\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 54 d2 b4 f5 00 00 00 10\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 54 d2 31\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 50 d2 b4 f5 00 00 00 10\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 50 d2 31\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds ymm6,ymm5,ymm4
+\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 54 d3 b4 f5 00 00 00 10\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 54 d3 31\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\]
+\s*[a-f0-9]+:\s*c4 a2 50 d3 b4 f5 00 00 00 10\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 50 d3 31\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
diff --git a/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.d b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.d
new file mode 100644
index 00000000000..8a3542f4b0e
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.d
@@ -0,0 +1,130 @@
+#as:
+#objdump: -dw
+#name: x86_64 AVX-VNNI-INT16 insns
+#source: x86-64-avx-vnni-int16.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 56 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 56 d2 31\s+vpdpwsud \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 52 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 52 d2 31\s+vpdpwsud \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 56 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 56 d3 31\s+vpdpwsuds \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 52 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 52 d3 31\s+vpdpwsuds \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 55 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 55 d2 31\s+vpdpwusd \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 51 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 51 d2 31\s+vpdpwusd \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 55 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 55 d3 31\s+vpdpwusds \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 51 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 51 d3 31\s+vpdpwusds \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 54 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 54 d2 31\s+vpdpwuud \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 50 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 50 d2 31\s+vpdpwuud \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 54 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 54 d3 31\s+vpdpwuuds \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 50 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 50 d3 31\s+vpdpwuuds \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 56 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 56 d2 31\s+vpdpwsud \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 52 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 52 d2 31\s+vpdpwsud \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 56 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 56 d3 31\s+vpdpwsuds \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 52 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 52 d3 31\s+vpdpwsuds \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 55 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 55 d2 31\s+vpdpwusd \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 51 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 51 d2 31\s+vpdpwusd \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 55 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 55 d3 31\s+vpdpwusds \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 51 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 51 d3 31\s+vpdpwusds \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 54 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 54 d2 31\s+vpdpwuud \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 50 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 50 d2 31\s+vpdpwuud \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 54 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 54 d3 31\s+vpdpwuuds \(%r9\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds 0xfe0\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds -0x1000\(%rdx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 a2 50 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 50 d3 31\s+vpdpwuuds \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds -0x800\(%rdx\),%xmm5,%xmm6
diff --git a/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.s b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.s
new file mode 100644
index 00000000000..8ba0f54e45d
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.s
@@ -0,0 +1,127 @@
+# Check 64bit AVX-VNNI-INT16 instructions
+
+ .allow_index_reg
+ .text
+_start:
+ vpdpwsud %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsud %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsud 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsud (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsud 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwsud -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwsud 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsud (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsud 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwsud -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwsuds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsuds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsuds 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsuds (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwsuds 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwsuds -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwsuds 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsuds (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwsuds 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwsuds -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwusd %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusd %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusd 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusd (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusd 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwusd -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwusd 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusd (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusd 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwusd -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwusds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusds 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusds (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwusds 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwusds -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwusds 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusds (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwusds 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwusds -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwuud %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuud %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuud 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuud (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuud 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwuud -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwuud 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuud (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuud 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwuud -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwuuds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuuds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuuds 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuuds (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16
+ vpdpwuuds 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwuuds -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwuuds 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuuds (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16
+ vpdpwuuds 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwuuds -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff)
+
+.intel_syntax noprefix
+ vpdpwsud ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwsud xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwsud ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwsud ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwsud ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwsud ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwsud xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwsud xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwsud xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwsud xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwsuds ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwsuds xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwsuds ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwsuds ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwsuds ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwsuds ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwsuds xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwsuds xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwsuds xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwsuds xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwusd ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwusd xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwusd ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwusd ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwusd ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwusd ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwusd xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwusd xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwusd xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwusd xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwusds ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwusds xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwusds ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwusds ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwusds ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwusds ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwusds xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwusds xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwusds xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwusds xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwuud ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwuud xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwuud ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwuud ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwuud ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwuud ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwuud xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwuud xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwuud xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwuud xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
+ vpdpwuuds ymm6, ymm5, ymm4 #AVX-VNNI-INT16
+ vpdpwuuds xmm6, xmm5, xmm4 #AVX-VNNI-INT16
+ vpdpwuuds ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwuuds ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwuuds ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000)
+ vpdpwuuds ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff)
+ vpdpwuuds xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16
+ vpdpwuuds xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16
+ vpdpwuuds xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000)
+ vpdpwuuds xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff)
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index 49205f9b996..0f2903c6185 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -438,6 +438,8 @@ run_list_test "x86-64-amx-complex-inval"
run_dump_test "x86-64-fred"
run_dump_test "x86-64-lkgs"
run_list_test "x86-64-lkgs-inval"
+run_dump_test "x86-64-avx-vnni-int16"
+run_dump_test "x86-64-avx-vnni-int16-intel"
run_dump_test "x86-64-clzero"
run_dump_test "x86-64-mwaitx-bdver4"
run_list_test "x86-64-mwaitx-reg"
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 9905317c110..9311d832342 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1062,6 +1062,8 @@ enum
PREFIX_VEX_0F3872,
PREFIX_VEX_0F38B0_W_0,
PREFIX_VEX_0F38B1_W_0,
+ PREFIX_VEX_0F38D2_W_0,
+ PREFIX_VEX_0F38D3_W_0,
PREFIX_VEX_0F38F5_L_0,
PREFIX_VEX_0F38F6_L_0,
PREFIX_VEX_0F38F7_L_0,
@@ -1472,6 +1474,8 @@ enum
VEX_W_0F38B4,
VEX_W_0F38B5,
VEX_W_0F38CF,
+ VEX_W_0F38D2,
+ VEX_W_0F38D3,
VEX_W_0F3A00_L_1,
VEX_W_0F3A01_L_1,
VEX_W_0F3A02,
@@ -3909,7 +3913,21 @@ static const struct dis386 prefix_table[][4] = {
{ "vbcstnebf162ps", { XM, Mw }, 0 },
{ "vbcstnesh2ps", { XM, Mw }, 0 },
},
-
+
+ /* PREFIX_VEX_0F38D2 */
+ {
+ { "vpdpwuud", { XM, Vex, EXx }, 0 },
+ { "vpdpwsud", { XM, Vex, EXx }, 0 },
+ { "vpdpwusd", { XM, Vex, EXx }, 0 },
+ },
+
+ /* PREFIX_VEX_0F38D3 */
+ {
+ { "vpdpwuuds", { XM, Vex, EXx }, 0 },
+ { "vpdpwsuds", { XM, Vex, EXx }, 0 },
+ { "vpdpwusds", { XM, Vex, EXx }, 0 },
+ },
+
/* PREFIX_VEX_0F38F5_L_0 */
{
{ "bzhiS", { Gdq, Edq, VexGdq }, 0 },
@@ -6370,8 +6388,8 @@ static const struct dis386 vex_table[][256] = {
/* d0 */
{ Bad_Opcode },
{ Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
+ { VEX_W_TABLE (VEX_W_0F38D2) },
+ { VEX_W_TABLE (VEX_W_0F38D3) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
@@ -7600,6 +7618,14 @@ static const struct dis386 vex_w_table[][2] = {
/* VEX_W_0F38CF */
{ "%XEvgf2p8mulb", { XM, Vex, EXx }, PREFIX_DATA },
},
+ {
+ /* VEX_W_0F38D2 */
+ { PREFIX_TABLE (PREFIX_VEX_0F38D2_W_0) },
+ },
+ {
+ /* VEX_W_0F38D3 */
+ { PREFIX_TABLE (PREFIX_VEX_0F38D3_W_0) },
+ },
{
/* VEX_W_0F3A00_L_1 */
{ Bad_Opcode },
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 1db555d8615..9796977a2aa 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -166,6 +166,8 @@ static const dependency isa_dependencies[] =
"AVX2" },
{ "FRED",
"LKGS" },
+ { "AVX_VNNI_INT16",
+ "AVX2" },
{ "AVX512F",
"AVX2" },
{ "AVX512CD",
@@ -366,6 +368,7 @@ static bitfield cpu_flags[] =
BITFIELD (RAO_INT),
BITFIELD (FRED),
BITFIELD (LKGS),
+ BITFIELD (AVX_VNNI_INT16),
BITFIELD (MWAITX),
BITFIELD (CLZERO),
BITFIELD (OSPKE),
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 3318bcfec33..4a225202e64 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -233,6 +233,8 @@ enum
CpuFRED,
/* lkgs instruction required */
CpuLKGS,
+ /* Intel AVX VNNI-INT16 Instructions support required. */
+ CpuAVX_VNNI_INT16,
/* mwaitx instruction required */
CpuMWAITX,
/* Clzero instruction required */
@@ -430,6 +432,7 @@ typedef union i386_cpu_flags
unsigned int cpurao_int:1;
unsigned int cpufred:1;
unsigned int cpulkgs:1;
+ unsigned int cpuavx_vnni_int16:1;
unsigned int cpumwaitx:1;
unsigned int cpuclzero:1;
unsigned int cpuospke:1;
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index b6263f88605..4903d3b2361 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3364,3 +3364,14 @@ erets, 0xf20f01ca, FRED|x64, NoSuf, {}
eretu, 0xf30f01ca, FRED|x64, NoSuf, {}
// FRED instructions end.
+
+// AVX_VNNI_INT16 instructions.
+
+vpdpwuud, 0xd2, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+vpdpwuuds, 0xd3, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+vpdpwusd, 0x66d2, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+vpdpwusds, 0x66d3, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+vpdpwsud, 0xf3d2, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+vpdpwsuds, 0xf3d3, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+
+// AVX_VNNI_INT16 instructions end.
--
2.31.1
next prev parent reply other threads:[~2023-07-13 6:33 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-13 6:32 [PATCH 0/5] Support Intel Arrow Lake/Lunar Lake ISAs Haochen Jiang
2023-07-13 6:32 ` Haochen Jiang [this message]
2023-07-13 9:29 ` [PATCH 1/5] Support Intel AVX-VNNI-INT16 Jan Beulich
2023-07-14 5:51 ` Jiang, Haochen
2023-07-13 6:33 ` [PATCH 2/5] Support Intel SHA512 Haochen Jiang
2023-07-13 10:02 ` Jan Beulich
2023-07-14 3:40 ` Jiang, Haochen
2023-07-14 7:12 ` Jan Beulich
2023-07-18 7:20 ` Jiang, Haochen
2023-07-18 7:54 ` [PATCH v2] " Haochen Jiang
2023-07-18 7:59 ` Jiang, Haochen
2023-07-18 8:51 ` Jan Beulich
2023-07-20 8:32 ` Jiang, Haochen
2023-07-20 10:37 ` Jan Beulich
2023-07-20 8:32 ` [PATCH] " Haochen Jiang
2023-07-20 11:07 ` [PATCH v3] " Jan Beulich
2023-07-27 5:52 ` Jiang, Haochen
2023-07-18 8:11 ` [PATCH 2/5] " Jan Beulich
2023-07-13 6:33 ` [PATCH 3/5] Support Intel SM3 Haochen Jiang
2023-07-13 10:20 ` Jan Beulich
2023-07-18 8:09 ` [PATCH v2] " Haochen Jiang
2023-07-18 9:03 ` Jan Beulich
2023-07-24 2:54 ` Jiang, Haochen
2023-07-13 6:33 ` [PATCH 4/5] Support Intel SM4 Haochen Jiang
2023-07-13 10:25 ` Jan Beulich
2023-07-18 7:21 ` Jiang, Haochen
2023-07-18 8:13 ` [PATCH v2] " Haochen Jiang
2023-07-18 9:11 ` Jan Beulich
2023-07-13 6:33 ` [PATCH 5/5] Support Intel PBNDKB Haochen Jiang
2023-07-13 10:29 ` Jan Beulich
2023-07-14 7:15 ` Jiang, Haochen
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