From: "Jiang, Haochen" <haochen.jiang@intel.com>
To: "Beulich, Jan" <JBeulich@suse.com>,
"hjl.tools@gmail.com" <hjl.tools@gmail.com>
Cc: "binutils@sourceware.org" <binutils@sourceware.org>
Subject: RE: [PATCH v2] Support Intel SM3
Date: Mon, 24 Jul 2023 02:54:24 +0000 [thread overview]
Message-ID: <SA1PR11MB59460E349F8EF9BBE6DCD9C7EC02A@SA1PR11MB5946.namprd11.prod.outlook.com> (raw)
In-Reply-To: <9773ab6d-5aec-f7f0-9d88-47ceacbbaa63@suse.com>
> On 18.07.2023 10:09, Haochen Jiang wrote:
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/sm3.s
> > @@ -0,0 +1,37 @@
> > +# Check 32bit SM3 instructions
> > +
> > + .allow_index_reg
> > + .text
> > +_start:
> > + vsm3msg1 %xmm4, %xmm5, %xmm6 #SM3
> > + vsm3msg1 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #SM3
> > + vsm3msg1 (%ecx), %xmm5, %xmm6 #SM3
> > + vsm3msg1 2032(%ecx), %xmm5, %xmm6 #SM3
> Disp32(f0070000)
> > + vsm3msg1 -2048(%edx), %xmm5, %xmm6 #SM3
> Disp32(00f8ffff)
>
My final patch will delete these Disp32 lines based on SHA512 comments. Also same
for SM4 patch.
After H.J. gives his opinion on the "#as:" in the beginning and ".allow_index_reg",
I will commit all the patches. However, I suppose it should not be a blocking
issue since if we want to delete those, another patch to deal with all the
testcases is needed.
Thx,
Haochen
> The numbers in parentheses are odd. I'd prefer if they were omitted,
> but I'd also be okay of you flipped their byte order so they properly
> correspond (as numbers) to the displacements used.
next prev parent reply other threads:[~2023-07-24 2:54 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-13 6:32 [PATCH 0/5] Support Intel Arrow Lake/Lunar Lake ISAs Haochen Jiang
2023-07-13 6:32 ` [PATCH 1/5] Support Intel AVX-VNNI-INT16 Haochen Jiang
2023-07-13 9:29 ` Jan Beulich
2023-07-14 5:51 ` Jiang, Haochen
2023-07-13 6:33 ` [PATCH 2/5] Support Intel SHA512 Haochen Jiang
2023-07-13 10:02 ` Jan Beulich
2023-07-14 3:40 ` Jiang, Haochen
2023-07-14 7:12 ` Jan Beulich
2023-07-18 7:20 ` Jiang, Haochen
2023-07-18 7:54 ` [PATCH v2] " Haochen Jiang
2023-07-18 7:59 ` Jiang, Haochen
2023-07-18 8:51 ` Jan Beulich
2023-07-20 8:32 ` Jiang, Haochen
2023-07-20 10:37 ` Jan Beulich
2023-07-20 8:32 ` [PATCH] " Haochen Jiang
2023-07-20 11:07 ` [PATCH v3] " Jan Beulich
2023-07-27 5:52 ` Jiang, Haochen
2023-07-18 8:11 ` [PATCH 2/5] " Jan Beulich
2023-07-13 6:33 ` [PATCH 3/5] Support Intel SM3 Haochen Jiang
2023-07-13 10:20 ` Jan Beulich
2023-07-18 8:09 ` [PATCH v2] " Haochen Jiang
2023-07-18 9:03 ` Jan Beulich
2023-07-24 2:54 ` Jiang, Haochen [this message]
2023-07-13 6:33 ` [PATCH 4/5] Support Intel SM4 Haochen Jiang
2023-07-13 10:25 ` Jan Beulich
2023-07-18 7:21 ` Jiang, Haochen
2023-07-18 8:13 ` [PATCH v2] " Haochen Jiang
2023-07-18 9:11 ` Jan Beulich
2023-07-13 6:33 ` [PATCH 5/5] Support Intel PBNDKB Haochen Jiang
2023-07-13 10:29 ` Jan Beulich
2023-07-14 7:15 ` Jiang, Haochen
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