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From: Jan Beulich <jbeulich@suse.com>
To: Haochen Jiang <haochen.jiang@intel.com>
Cc: hjl.tools@gmail.com, amodra@gmail.com, binutils@sourceware.org
Subject: Re: [PATCH 4/5] Support Intel SM4
Date: Thu, 13 Jul 2023 12:25:25 +0200	[thread overview]
Message-ID: <6b7d088a-36fe-8560-ba6a-e84b7463c03f@suse.com> (raw)
In-Reply-To: <20230713063303.205862-5-haochen.jiang@intel.com>

On 13.07.2023 08:33, Haochen Jiang wrote:
> --- a/opcodes/i386-dis.c
> +++ b/opcodes/i386-dis.c
> @@ -1070,7 +1070,7 @@ enum
>    PREFIX_VEX_0F38CB,
>    PREFIX_VEX_0F38CC,
>    PREFIX_VEX_0F38CD,
> -  PREFIX_VEX_0F38DA_W_0_L_0,
> +  PREFIX_VEX_0F38DA_W_0,
>    PREFIX_VEX_0F38F5_L_0,
>    PREFIX_VEX_0F38F6_L_0,
>    PREFIX_VEX_0F38F7_L_0,
> @@ -1316,7 +1316,8 @@ enum
>    VEX_LEN_0F38CB_P_3_W_0,
>    VEX_LEN_0F38CC_P_3_W_0,
>    VEX_LEN_0F38CD_P_3_W_0,
> -  VEX_LEN_0F38DA_W_0,
> +  VEX_LEN_0F38DA_W_0_P_0,
> +  VEX_LEN_0F38DA_W_0_P_2,
>    VEX_LEN_0F38DB,
>    VEX_LEN_0F38F2,
>    VEX_LEN_0F38F3,
> @@ -3969,11 +3970,12 @@ static const struct dis386 prefix_table[][4] = {
>      { VEX_W_TABLE (VEX_W_0F38CD_P_3) },
>    },
>  
> -  /* PREFIX_VEX_0F38DA_W_0_L_0 */
> +  /* PREFIX_VEX_0F38DA_W_0 */
>    {
> -    { "vsm3msg1", { XM, Vex, EXxmm }, 0 },
> -    { Bad_Opcode },
> -    { "vsm3msg2", { XM, Vex, EXxmm }, 0 },
> +    { VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0_P_0) },
> +    { "vsm4key4", { XM, Vex, EXx }, 0 },
> +    { VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0_P_2) },
> +    { "vsm4rnds4", { XM, Vex, EXx }, 0 },
>    },
>  
>    /* PREFIX_VEX_0F38F5_L_0 */
> @@ -7010,9 +7012,14 @@ static const struct dis386 vex_len_table[][2] = {
>      { "vsha512msg2", { XM, Uymm }, 0 },
>    },
>  
> -  /* VEX_LEN_0F38DA_W_0 */
> +  /* VEX_LEN_0F38DA_W_0_P_0 */
> +  {
> +    { "vsm3msg1", { XM, Vex, EXxmm }, 0 },
> +  },
> +
> +  /* VEX_LEN_0F38DA_W_0_P_2 */
>    {
> -    { PREFIX_TABLE (PREFIX_VEX_0F38DA_W_0_L_0) },
> +    { "vsm3msg2", { XM, Vex, EXxmm }, 0 },
>    },
>  
>    /* VEX_LEN_0F38DB */
> @@ -7716,7 +7723,7 @@ static const struct dis386 vex_w_table[][2] = {
>    },
>    {
>      /* VEX_W_0F38DA */
> -    { VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0) },
> +    { PREFIX_TABLE (PREFIX_VEX_0F38DA_W_0) },
>    },
>    {
>      /* VEX_W_0F3A00_L_1 */

I think it would be nice if this patch didn't need to re-do what the
immediately preceding patch does. Can that earlier patch be adjusted
to the final intended decode order?

Some of the comments given for earlier patches also apply here, ftaod.

Jan

  reply	other threads:[~2023-07-13 10:25 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-13  6:32 [PATCH 0/5] Support Intel Arrow Lake/Lunar Lake ISAs Haochen Jiang
2023-07-13  6:32 ` [PATCH 1/5] Support Intel AVX-VNNI-INT16 Haochen Jiang
2023-07-13  9:29   ` Jan Beulich
2023-07-14  5:51     ` Jiang, Haochen
2023-07-13  6:33 ` [PATCH 2/5] Support Intel SHA512 Haochen Jiang
2023-07-13 10:02   ` Jan Beulich
2023-07-14  3:40     ` Jiang, Haochen
2023-07-14  7:12       ` Jan Beulich
2023-07-18  7:20         ` Jiang, Haochen
2023-07-18  7:54           ` [PATCH v2] " Haochen Jiang
2023-07-18  7:59             ` Jiang, Haochen
2023-07-18  8:51             ` Jan Beulich
2023-07-20  8:32               ` Jiang, Haochen
2023-07-20 10:37                 ` Jan Beulich
2023-07-20  8:32               ` [PATCH] " Haochen Jiang
2023-07-20 11:07                 ` [PATCH v3] " Jan Beulich
2023-07-27  5:52                   ` Jiang, Haochen
2023-07-18  8:11           ` [PATCH 2/5] " Jan Beulich
2023-07-13  6:33 ` [PATCH 3/5] Support Intel SM3 Haochen Jiang
2023-07-13 10:20   ` Jan Beulich
2023-07-18  8:09     ` [PATCH v2] " Haochen Jiang
2023-07-18  9:03       ` Jan Beulich
2023-07-24  2:54         ` Jiang, Haochen
2023-07-13  6:33 ` [PATCH 4/5] Support Intel SM4 Haochen Jiang
2023-07-13 10:25   ` Jan Beulich [this message]
2023-07-18  7:21     ` Jiang, Haochen
2023-07-18  8:13       ` [PATCH v2] " Haochen Jiang
2023-07-18  9:11         ` Jan Beulich
2023-07-13  6:33 ` [PATCH 5/5] Support Intel PBNDKB Haochen Jiang
2023-07-13 10:29   ` Jan Beulich
2023-07-14  7:15     ` Jiang, Haochen

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