* [PATCH] RISC-V: Remove RV32EF conflict
@ 2022-10-19 13:14 Tsukasa OI
2022-10-19 13:23 ` Kito Cheng
2022-11-05 11:49 ` [PING^1]Re: " Tsukasa OI
0 siblings, 2 replies; 4+ messages in thread
From: Tsukasa OI @ 2022-10-19 13:14 UTC (permalink / raw)
To: Tsukasa OI, Nelson Chu, Kito Cheng, Palmer Dabbelt, Andrew Waterman
Cc: binutils
Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later
versions beginning with the version 20190608-Base-Ratified removed this
restriction. Because the 'E' extension is still a draft, the author chose
to *just* remove the conflict (not checking the ISA version).
Note that, because RV32E is only used with a soft-float calling convention,
there's no valid official ABI for RV32EF. It means, even if we can assemble
a program with -march=rv32ef -mabi=ilp32e, floating-point registers are kept
in an unmanaged state (outside ABI management).
The purpose of this commit is to suppress unnecessary errors while parsing
an ISA string and/or disassembling, not to allow hard-float with RVE.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF
because only older specifications disallowed it.
gas/ChangeLog:
* testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly
prohibited.
* testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
---
bfd/elfxx-riscv.c | 7 -------
gas/testsuite/gas/riscv/march-fail-rv32ef.d | 3 ---
gas/testsuite/gas/riscv/march-fail-rv32ef.l | 2 --
3 files changed, 12 deletions(-)
delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.d
delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.l
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index c89b1e53e92..334a63f0873 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1870,13 +1870,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
rps->error_handler (_("rv%d does not support the `q' extension"), xlen);
no_conflict = false;
}
- if (riscv_lookup_subset (rps->subset_list, "e", &subset)
- && riscv_lookup_subset (rps->subset_list, "f", &subset))
- {
- rps->error_handler
- (_("rv32e does not support the `f' extension"));
- no_conflict = false;
- }
if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset)
&& riscv_lookup_subset (rps->subset_list, "f", &subset))
{
diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.d b/gas/testsuite/gas/riscv/march-fail-rv32ef.d
deleted file mode 100644
index d7b51c3c17d..00000000000
--- a/gas/testsuite/gas/riscv/march-fail-rv32ef.d
+++ /dev/null
@@ -1,3 +0,0 @@
-#as: -march=rv32ef
-#source: empty.s
-#error_output: march-fail-rv32ef.l
diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.l b/gas/testsuite/gas/riscv/march-fail-rv32ef.l
deleted file mode 100644
index e6d93f28fa5..00000000000
--- a/gas/testsuite/gas/riscv/march-fail-rv32ef.l
+++ /dev/null
@@ -1,2 +0,0 @@
-.*Assembler messages:
-.*Error: .*rv32e does not support the `f' extension
base-commit: 2b06e59de0675c2cb526af2de6803dae29703d15
--
2.34.1
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] RISC-V: Remove RV32EF conflict
2022-10-19 13:14 [PATCH] RISC-V: Remove RV32EF conflict Tsukasa OI
@ 2022-10-19 13:23 ` Kito Cheng
2022-11-05 11:49 ` [PING^1]Re: " Tsukasa OI
1 sibling, 0 replies; 4+ messages in thread
From: Kito Cheng @ 2022-10-19 13:23 UTC (permalink / raw)
To: Tsukasa OI; +Cc: Nelson Chu, Palmer Dabbelt, Andrew Waterman, binutils
[-- Attachment #1: Type: text/plain, Size: 3103 bytes --]
The spec has been updated for a while, and this change only removes the
limitation from the old spec, so LGTM.
On Wed, Oct 19, 2022 at 9:14 PM Tsukasa OI <research_trasio@irq.a4lg.com>
wrote:
> Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later
> versions beginning with the version 20190608-Base-Ratified removed this
> restriction. Because the 'E' extension is still a draft, the author chose
> to *just* remove the conflict (not checking the ISA version).
>
> Note that, because RV32E is only used with a soft-float calling convention,
> there's no valid official ABI for RV32EF. It means, even if we can
> assemble
> a program with -march=rv32ef -mabi=ilp32e, floating-point registers are
> kept
> in an unmanaged state (outside ABI management).
>
> The purpose of this commit is to suppress unnecessary errors while parsing
> an ISA string and/or disassembling, not to allow hard-float with RVE.
>
> bfd/ChangeLog:
>
> * elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF
> because only older specifications disallowed it.
>
> gas/ChangeLog:
>
> * testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly
> prohibited.
> * testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
> ---
> bfd/elfxx-riscv.c | 7 -------
> gas/testsuite/gas/riscv/march-fail-rv32ef.d | 3 ---
> gas/testsuite/gas/riscv/march-fail-rv32ef.l | 2 --
> 3 files changed, 12 deletions(-)
> delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.d
> delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.l
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index c89b1e53e92..334a63f0873 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1870,13 +1870,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t
> *rps)
> rps->error_handler (_("rv%d does not support the `q' extension"),
> xlen);
> no_conflict = false;
> }
> - if (riscv_lookup_subset (rps->subset_list, "e", &subset)
> - && riscv_lookup_subset (rps->subset_list, "f", &subset))
> - {
> - rps->error_handler
> - (_("rv32e does not support the `f' extension"));
> - no_conflict = false;
> - }
> if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset)
> && riscv_lookup_subset (rps->subset_list, "f", &subset))
> {
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> b/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> deleted file mode 100644
> index d7b51c3c17d..00000000000
> --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> +++ /dev/null
> @@ -1,3 +0,0 @@
> -#as: -march=rv32ef
> -#source: empty.s
> -#error_output: march-fail-rv32ef.l
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> b/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> deleted file mode 100644
> index e6d93f28fa5..00000000000
> --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> +++ /dev/null
> @@ -1,2 +0,0 @@
> -.*Assembler messages:
> -.*Error: .*rv32e does not support the `f' extension
>
> base-commit: 2b06e59de0675c2cb526af2de6803dae29703d15
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread* [PING^1]Re: [PATCH] RISC-V: Remove RV32EF conflict
2022-10-19 13:14 [PATCH] RISC-V: Remove RV32EF conflict Tsukasa OI
2022-10-19 13:23 ` Kito Cheng
@ 2022-11-05 11:49 ` Tsukasa OI
2022-11-07 3:48 ` Nelson Chu
1 sibling, 1 reply; 4+ messages in thread
From: Tsukasa OI @ 2022-11-05 11:49 UTC (permalink / raw)
To: Nelson Chu; +Cc: binutils
Ping.
c.f.: Original
<https://sourceware.org/pipermail/binutils/2022-October/123716.html>
c.f.: LGTM by Kito
<https://sourceware.org/pipermail/binutils/2022-October/123717.html>
Regards,
Tsukasa
On 2022/10/19 22:14, Tsukasa OI wrote:
> Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later
> versions beginning with the version 20190608-Base-Ratified removed this
> restriction. Because the 'E' extension is still a draft, the author chose
> to *just* remove the conflict (not checking the ISA version).
>
> Note that, because RV32E is only used with a soft-float calling convention,
> there's no valid official ABI for RV32EF. It means, even if we can assemble
> a program with -march=rv32ef -mabi=ilp32e, floating-point registers are kept
> in an unmanaged state (outside ABI management).
>
> The purpose of this commit is to suppress unnecessary errors while parsing
> an ISA string and/or disassembling, not to allow hard-float with RVE.
>
> bfd/ChangeLog:
>
> * elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF
> because only older specifications disallowed it.
>
> gas/ChangeLog:
>
> * testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly
> prohibited.
> * testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
> ---
> bfd/elfxx-riscv.c | 7 -------
> gas/testsuite/gas/riscv/march-fail-rv32ef.d | 3 ---
> gas/testsuite/gas/riscv/march-fail-rv32ef.l | 2 --
> 3 files changed, 12 deletions(-)
> delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.d
> delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.l
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index c89b1e53e92..334a63f0873 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1870,13 +1870,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
> rps->error_handler (_("rv%d does not support the `q' extension"), xlen);
> no_conflict = false;
> }
> - if (riscv_lookup_subset (rps->subset_list, "e", &subset)
> - && riscv_lookup_subset (rps->subset_list, "f", &subset))
> - {
> - rps->error_handler
> - (_("rv32e does not support the `f' extension"));
> - no_conflict = false;
> - }
> if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset)
> && riscv_lookup_subset (rps->subset_list, "f", &subset))
> {
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.d b/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> deleted file mode 100644
> index d7b51c3c17d..00000000000
> --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> +++ /dev/null
> @@ -1,3 +0,0 @@
> -#as: -march=rv32ef
> -#source: empty.s
> -#error_output: march-fail-rv32ef.l
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.l b/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> deleted file mode 100644
> index e6d93f28fa5..00000000000
> --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> +++ /dev/null
> @@ -1,2 +0,0 @@
> -.*Assembler messages:
> -.*Error: .*rv32e does not support the `f' extension
>
> base-commit: 2b06e59de0675c2cb526af2de6803dae29703d15
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PING^1]Re: [PATCH] RISC-V: Remove RV32EF conflict
2022-11-05 11:49 ` [PING^1]Re: " Tsukasa OI
@ 2022-11-07 3:48 ` Nelson Chu
0 siblings, 0 replies; 4+ messages in thread
From: Nelson Chu @ 2022-11-07 3:48 UTC (permalink / raw)
To: Tsukasa OI; +Cc: binutils
OK, please commit since it looks good to Kito.
Thanks
Nelson
On Sat, Nov 5, 2022 at 7:50 PM Tsukasa OI <research_trasio@irq.a4lg.com> wrote:
>
> Ping.
>
> c.f.: Original
> <https://sourceware.org/pipermail/binutils/2022-October/123716.html>
> c.f.: LGTM by Kito
> <https://sourceware.org/pipermail/binutils/2022-October/123717.html>
>
> Regards,
> Tsukasa
>
> On 2022/10/19 22:14, Tsukasa OI wrote:
> > Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later
> > versions beginning with the version 20190608-Base-Ratified removed this
> > restriction. Because the 'E' extension is still a draft, the author chose
> > to *just* remove the conflict (not checking the ISA version).
> >
> > Note that, because RV32E is only used with a soft-float calling convention,
> > there's no valid official ABI for RV32EF. It means, even if we can assemble
> > a program with -march=rv32ef -mabi=ilp32e, floating-point registers are kept
> > in an unmanaged state (outside ABI management).
> >
> > The purpose of this commit is to suppress unnecessary errors while parsing
> > an ISA string and/or disassembling, not to allow hard-float with RVE.
> >
> > bfd/ChangeLog:
> >
> > * elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF
> > because only older specifications disallowed it.
> >
> > gas/ChangeLog:
> >
> > * testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly
> > prohibited.
> > * testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
> > ---
> > bfd/elfxx-riscv.c | 7 -------
> > gas/testsuite/gas/riscv/march-fail-rv32ef.d | 3 ---
> > gas/testsuite/gas/riscv/march-fail-rv32ef.l | 2 --
> > 3 files changed, 12 deletions(-)
> > delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.d
> > delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.l
> >
> > diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> > index c89b1e53e92..334a63f0873 100644
> > --- a/bfd/elfxx-riscv.c
> > +++ b/bfd/elfxx-riscv.c
> > @@ -1870,13 +1870,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
> > rps->error_handler (_("rv%d does not support the `q' extension"), xlen);
> > no_conflict = false;
> > }
> > - if (riscv_lookup_subset (rps->subset_list, "e", &subset)
> > - && riscv_lookup_subset (rps->subset_list, "f", &subset))
> > - {
> > - rps->error_handler
> > - (_("rv32e does not support the `f' extension"));
> > - no_conflict = false;
> > - }
> > if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset)
> > && riscv_lookup_subset (rps->subset_list, "f", &subset))
> > {
> > diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.d b/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> > deleted file mode 100644
> > index d7b51c3c17d..00000000000
> > --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> > +++ /dev/null
> > @@ -1,3 +0,0 @@
> > -#as: -march=rv32ef
> > -#source: empty.s
> > -#error_output: march-fail-rv32ef.l
> > diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.l b/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> > deleted file mode 100644
> > index e6d93f28fa5..00000000000
> > --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> > +++ /dev/null
> > @@ -1,2 +0,0 @@
> > -.*Assembler messages:
> > -.*Error: .*rv32e does not support the `f' extension
> >
> > base-commit: 2b06e59de0675c2cb526af2de6803dae29703d15
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-11-07 3:48 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2022-10-19 13:14 [PATCH] RISC-V: Remove RV32EF conflict Tsukasa OI
2022-10-19 13:23 ` Kito Cheng
2022-11-05 11:49 ` [PING^1]Re: " Tsukasa OI
2022-11-07 3:48 ` Nelson Chu
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