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From: Jan Beulich <jbeulich@suse.com>
To: "Kong, Lingling" <lingling.kong@intel.com>
Cc: "hjl.tools@gmail.com" <hjl.tools@gmail.com>,
	"binutils@sourceware.org" <binutils@sourceware.org>,
	"Jiang, Haochen" <haochen.jiang@intel.com>
Subject: Re: [PATCH 2/2] Support Intel AVX-NE-CONVERT
Date: Wed, 2 Nov 2022 10:53:44 +0100	[thread overview]
Message-ID: <577a33b2-060e-5d27-0a77-764b096023b0@suse.com> (raw)
In-Reply-To: <DM4PR11MB5487F1F49E184C4D63F25BE0EC399@DM4PR11MB5487.namprd11.prod.outlook.com>

On 02.11.2022 09:50, Kong, Lingling wrote:
>> On 01.11.2022 10:04, Kong, Lingling wrote:
>>> --- a/opcodes/i386-dis.c
>>> +++ b/opcodes/i386-dis.c
>>> @@ -942,6 +942,8 @@ enum
>>>    MOD_VEX_0F385E_X86_64_P_3_W_0,
>>>    MOD_VEX_0F388C,
>>>    MOD_VEX_0F388E,
>>> +  MOD_VEX_0F38B0,
>>> +  MOD_VEX_0F38B1,
>>>    MOD_VEX_0F3A30_L_0,
>>>    MOD_VEX_0F3A31_L_0,
>>>    MOD_VEX_0F3A32_L_0,
>>> @@ -1140,6 +1142,9 @@ enum
>>>    PREFIX_VEX_0F3851_W_0,
>>>    PREFIX_VEX_0F385C_X86_64,
>>>    PREFIX_VEX_0F385E_X86_64,
>>> +  PREFIX_VEX_0F3872,
>>> +  PREFIX_VEX_0F38B0_M_0_W_0,
>>> +  PREFIX_VEX_0F38B1_M_0_W_0,
>>>    PREFIX_VEX_0F38F5_L_0,
>>>    PREFIX_VEX_0F38F6_L_0,
>>>    PREFIX_VEX_0F38F7_L_0,
>>> @@ -1556,8 +1561,11 @@ enum
>>>    VEX_W_0F385E_X86_64_P_1,
>>>    VEX_W_0F385E_X86_64_P_2,
>>>    VEX_W_0F385E_X86_64_P_3,
>>> +  VEX_W_0F3872_P_1,
>>>    VEX_W_0F3878,
>>>    VEX_W_0F3879,
>>> +  VEX_W_0F38B0_M_0,
>>> +  VEX_W_0F38B1_M_0,
>>>    VEX_W_0F38B4,
>>>    VEX_W_0F38B5,
>>>    VEX_W_0F38CF,
>>> @@ -4093,6 +4101,27 @@ static const struct dis386 prefix_table[][4] = {
>>>      { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_3) },
>>>    },
>>>
>>> +  /* PREFIX_VEX_0F3872 */
>>> +  {
>>> +    { Bad_Opcode },
>>> +    { VEX_W_TABLE (VEX_W_0F3872_P_1) },  },
>>> +
>>> +  /* PREFIX_VEX_0F38B0_M_0_W_0 */
>>> +  {
>>> +    { "vcvtneoph2ps", { XM, Mx }, 0 },
>>> +    { "vcvtneebf162ps", { XM, Mx }, 0 },
>>> +    { "vcvtneeph2ps", { XM, Mx }, 0 },
>>> +    { "vcvtneobf162ps", { XM, Mx }, 0 },  },
>>
>> With the use of Mx here I see no reason to have decode go through mod_table[].
>> And then ...
> 
>  Yes, Fixed. Thanks a lot!
> 
>>> +  /* PREFIX_VEX_0F38B1_M_0_W_0 */
>>> +  {
>>> +    { Bad_Opcode },
>>> +    { "vbcstnebf162ps", { XM, Ew }, 0 },
>>> +    { "vbcstnesh2ps", { XM, Ew }, 0 },  },
>>
>> ... this should also engage OP_M() rather than OP_E(), removing the mod_table[]
>> decode step here as well. Obviously you'll need to add Mw for that to work.
>>
> Good advice! Now Changed Ew to Mw, and no longer go through the w table.
> Patch changes as follows.
> 
> Subject: [PATCH 1/2] Support Intel AVX-NE-CONVERT

Thanks, lgtm now. As usual I'd like to leave it to H.J. to actually approve
of the patch.

Jan

  reply	other threads:[~2022-11-02  9:53 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-31  6:05 [PATCH v4 0/2] " Haochen Jiang
2022-10-31  6:06 ` [PATCH 1/2] i386: Add <Vxy> and <Exy> Haochen Jiang
2022-10-31  9:04   ` Jan Beulich
2022-10-31 16:30     ` H.J. Lu
2022-11-01  8:50       ` Kong, Lingling
2022-11-01 14:42         ` H.J. Lu
2022-10-31  6:06 ` [PATCH 2/2] Support Intel AVX-NE-CONVERT Haochen Jiang
2022-10-31  9:14   ` Jan Beulich
2022-11-01  1:24     ` Jiang, Haochen
2022-11-01  6:50       ` Jan Beulich
2022-11-01  8:08         ` Kong, Lingling
2022-11-01  9:04     ` Kong, Lingling
2022-11-02  7:47       ` Jan Beulich
2022-11-02  8:50         ` Kong, Lingling
2022-11-02  9:53           ` Jan Beulich [this message]
2022-11-03  2:44           ` H.J. Lu

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