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From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>,
	"Jiang, Haochen" <haochen.jiang@intel.com>
Subject: [PATCH 12/18] x86: decouple broadcast type and bytes fields
Date: Fri, 3 Mar 2023 14:03:17 +0100	[thread overview]
Message-ID: <689eb629-ad65-4611-2a22-ac0dea62590d@suse.com> (raw)
In-Reply-To: <764b9e03-18bd-6945-692f-a250522196ca@suse.com>

Keep both representing exclusively what was parsed from input, to avoid
the need for (potentially bogus) calculations when processing .insn.

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -3756,8 +3756,7 @@ get_broadcast_bytes (const insn_template
   const i386_operand_type *types;
 
   if (i.broadcast.type)
-    return i.broadcast.bytes = ((1 << (t->opcode_modifier.broadcast - 1))
-				* i.broadcast.type);
+    return (1 << (t->opcode_modifier.broadcast - 1)) * i.broadcast.type;
 
   gas_assert (intel_syntax);
 
@@ -3943,7 +3942,8 @@ build_evex_prefix (void)
 		    i.tm.opcode_modifier.evex = EVEX128;
 		    break;
 		  }
-		else if (i.broadcast.bytes && op == i.broadcast.operand)
+		else if ((i.broadcast.type || i.broadcast.bytes)
+			 && op == i.broadcast.operand)
 		  {
 		    switch (get_broadcast_bytes (&i.tm, true))
 		      {
@@ -3994,7 +3994,7 @@ build_evex_prefix (void)
 	}
       i.vex.bytes[3] |= vec_length;
       /* Encode the broadcast bit.  */
-      if (i.broadcast.bytes)
+      if (i.broadcast.type || i.broadcast.bytes)
 	i.vex.bytes[3] |= 0x10;
     }
   else if (i.rounding.type != saeonly)
@@ -4495,6 +4495,7 @@ optimize_encoding (void)
 	   && !i.types[0].bitfield.zmmword
 	   && !i.types[1].bitfield.zmmword
 	   && !i.mask.reg
+	   && !i.broadcast.type
 	   && !i.broadcast.bytes
 	   && is_evex_encoding (&i.tm)
 	   && ((i.tm.base_opcode & ~Opcode_SIMD_IntD) == 0x6f
@@ -6594,7 +6595,7 @@ check_VecOperands (const insn_template *
   if (t->opcode_modifier.disp8memshift
       && i.disp_encoding <= disp_encoding_8bit)
     {
-      if (i.broadcast.bytes)
+      if (i.broadcast.type || i.broadcast.bytes)
 	i.memshift = t->opcode_modifier.broadcast - 1;
       else if (t->opcode_modifier.disp8memshift != DISP8_SHIFT_VL)
 	i.memshift = t->opcode_modifier.disp8memshift;
@@ -11099,7 +11100,8 @@ s_insn (int dummy ATTRIBUTE_UNUSED)
 	  if (operand_type_check (i.types[j], disp))
 	    i.types[j].bitfield.baseindex = 1;
 
-	  if (i.broadcast.type && j == i.broadcast.operand)
+	  if ((i.broadcast.type || i.broadcast.bytes)
+	      && j == i.broadcast.operand)
 	    continue;
 
 	  combined = operand_type_or (combined, i.types[j]);
@@ -11168,10 +11170,10 @@ s_insn (int dummy ATTRIBUTE_UNUSED)
 
   if (i.vec_encoding == vex_encoding_error
       || (i.vec_encoding != vex_encoding_evex
-	  ? i.broadcast.type
+	  ? i.broadcast.type || i.broadcast.bytes
 	    || i.rounding.type != rc_none
 	    || i.mask.reg
-	  : i.broadcast.type
+	  : (i.broadcast.type || i.broadcast.bytes)
 	    && i.rounding.type != rc_none))
     {
       as_bad (_("conflicting .insn operands"));


  parent reply	other threads:[~2023-03-03 13:03 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-03 12:54 [PATCH 00/18] x86: new .insn directive Jan Beulich
2023-03-03 12:56 ` [PATCH 01/18] x86: introduce " Jan Beulich
2023-03-03 12:57 ` [PATCH 02/18] x86: parse VEX and alike specifiers for .insn Jan Beulich
2023-03-03 12:57 ` [PATCH 03/18] x86: parse special opcode modifiers " Jan Beulich
2023-03-03 12:58 ` [PATCH 04/18] x86: use set_rex_vrex() also for short-form handling Jan Beulich
2023-03-03 12:58 ` [PATCH 05/18] x86: move more disp processing out of md_assemble() Jan Beulich
2023-03-03 12:59 ` [PATCH 06/18] x86-64: adjust REX-prefix part of SSE2AVX test Jan Beulich
2023-03-03 13:00 ` [PATCH 07/18] x86: re-work build_modrm_byte()'s register assignment Jan Beulich
2023-03-03 13:00 ` [PATCH 08/18] x86: VexVVVV is now merely a boolean Jan Beulich
2023-03-03 13:01 ` [PATCH 09/18] x86: drop "shimm" special case template expansions Jan Beulich
2023-03-03 13:01 ` [PATCH 10/18] x86/AT&T: restrict recognition of the "absolute branch" prefix character Jan Beulich
2023-03-03 13:02 ` [PATCH 11/18] x86: process instruction operands for .insn Jan Beulich
2023-03-03 13:03 ` Jan Beulich [this message]
2023-03-03 13:03 ` [PATCH 13/18] x86: handle EVEX Disp8 " Jan Beulich
2023-03-03 13:04 ` [PATCH 14/18] x86: allow for multiple immediates in output_disp() Jan Beulich
2023-03-03 13:05 ` [PATCH 15/18] x86: handle immediate operands for .insn Jan Beulich
2023-03-03 13:05 ` [PATCH 16/18] x86: document .insn Jan Beulich
2023-03-03 13:06 ` [PATCH 17/18] x86: convert testcases to use .insn Jan Beulich
2023-03-03 13:06 ` [PATCH RFC 18/18] x86: .insn example - VEX-encoded instructions of original Xeon Phi Jan Beulich
2023-03-03 16:50 ` [PATCH 00/18] x86: new .insn directive H.J. Lu
2023-03-06  9:26   ` Jan Beulich
2023-03-07 20:33     ` H.J. Lu
2023-03-08  7:54       ` Jan Beulich
2023-03-08  8:09         ` Jiang, Haochen
2023-03-09  6:52           ` Kong, Lingling
2023-03-05 10:07 ` Jiang, Haochen
2023-03-06  9:01   ` Jan Beulich

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