Re: [PATCH 00/18] x86: new .insn directive

["H.J. Lu" <hjl.tools@gmail.com>]

On Fri, Mar 3, 2023 at 4:55 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> Especially when instructions which are not known to gas yet also take
> register or, yet worse, memory operands, encoding such in code actually
> wanting to make use of them is often difficult. Typically people resort
> to hard-coding the involved registers, thus being able to express
> things via .byte. To overcome this limitation (to a sufficient degree
> at least), introduce .insn. This allows users to specify operands in
> their "normal" shape (possibly in slightly altered order). Peculiarities
> require two small syntax extensions; see the implementation or
> documentation for details.
>
> In order to re-use sufficiently much of the functionality md_assemble()
> already uses, some adjustments to existing code were necessary. The one
> item to call out here is the partial re-write of build_modrm_byte()
> (patch 7), which actually turned out to simplify things. Subsequently
> possible further tidying is carried out right away (patches 8 and 9),
> even if not strictly related to the .insn work.
>
> I'm pretty sure there are still corner cases which aren't taken care of
> correctly. It's also quite possible that I've overlooked further places
> in pre-existing code which need tweaking for .insn. People taking a
> close look and/or playing with the new functionality would be much
> appreciated.
>
> The last patch in the series is strictly RFC, as I'm uncertain whether
> we actually want this kind of a testcase.
>
> 01: introduce .insn directive
> 02: parse VEX and alike specifiers for .insn
> 03: parse special opcode modifiers for .insn
> 04: use set_rex_vrex() also for short-form handling
> 05: move more disp processing out of md_assemble()
> 06: adjust REX-prefix part of SSE2AVX test
> 07: re-work build_modrm_byte()'s register assignment
> 08: VexVVVV is now merely a boolean
> 09: drop "shimm" special case template expansions
> 10: AT&T: restrict recognition of the "absolute branch" prefix character
> 11: process instruction operands for .insn
> 12: decouple broadcast type and bytes fields
> 13: handle EVEX Disp8 for .insn
> 14: allow for multiple immediates in output_disp()
> 15: handle immediate operands for .insn
> 16: document .insn
> 17: convert testcases to use .insn
> 18: .insn example - VEX-encoded instructions of original Xeon Phi
>
> Jan

X86 encoding scheme is quite complex.  It may get even more complex in
the future.  I suggest we wait for a while so that we can get clear pictures
what the future encoding scheme looks like.

-- 
H.J.