From: Kito Cheng <kito.cheng@gmail.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
Nelson Chu <nelson.chu@sifive.com>
Cc: Binutils <binutils@sourceware.org>
Subject: Re: [RFC PATCH 0/5] RISC-V: Add Half-precision floating point extensions
Date: Wed, 18 May 2022 09:43:54 +0800 [thread overview]
Message-ID: <CA+yXCZC=CBGNzrXk=ZEVsPMJJ3qCR+he+_qXcqnMm5E-F6H4tA@mail.gmail.com> (raw)
In-Reply-To: <cover.1641898063.git.research_trasio@irq.a4lg.com>
HI Tsukasa:
Nelson has ported his zfh implementation from integration branch to
trunk, did you mind base that on to adding zfhmin?
On Tue, Jan 11, 2022 at 6:48 PM Tsukasa OI via Binutils
<binutils@sourceware.org> wrote:
>
> This patchset adds support for two recently ratified RISC-V extensions:
>
> - Zfhmin (Half-precision floating point: conversion only)
> - Zfh (Half-precision floating point: full arithmetic)
>
> This patchset was intended to be a part of Binutils 2.38 but I was
> getting too impatient. I tested this patchset with Spike simulator and
> tested that a few programs with fp16 was working nicely. However, this
> patchset lacks full testsuite.
>
> The only reason I didn't make one was simple: all of floating point
> extensions ('F', 'D' and 'Q') didn't have full testsuite. Thanks to the
> fact that this patchset is too late for Binutils 2.38, we have time to
> add full testsuite for all floating point extensions.
>
> Also, this patchset lacks pseudoinstructions (intentionally). Possible
> pseudoinstructions to implement later would be:
>
> - fmv.h
> - fneg.h
> - fabs.h
>
> Besides that, we can begin testing 'Zfh' and 'Zfhmin' extensions with
> this patchset.
>
>
>
>
> Tsukasa OI (5):
> RISC-V: Add 'Zfh' and 'Zfhmin' extensions
> RISC-V: Add insn classes for Zfh/Zfhmin extensions
> RISC-V: Add 'Zfh' and 'Zfhmin' instructions
> RISC-V: Add 'flh' and 'fsh' macro instructions
> RISC-V: Add 'Zfh'/'Zfhmin' conflict message
>
> bfd/elfxx-riscv.c | 16 +++++-
> gas/config/tc-riscv.c | 10 ++++
> include/opcode/riscv-opc.h | 108 +++++++++++++++++++++++++++++++++++++
> include/opcode/riscv.h | 6 +++
> opcodes/riscv-opc.c | 62 +++++++++++++++++++++
> 5 files changed, 201 insertions(+), 1 deletion(-)
>
>
> base-commit: 9ed5be5650ba7c315cd7cfacccc9208de2f555df
> --
> 2.32.0
>
next prev parent reply other threads:[~2022-05-18 1:44 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-11 10:47 Tsukasa OI
2022-01-11 10:48 ` [RFC PATCH 1/5] RISC-V: Add 'Zfh' and 'Zfhmin' extensions Tsukasa OI
2022-01-11 10:48 ` [RFC PATCH 2/5] RISC-V: Add insn classes for Zfh/Zfhmin extensions Tsukasa OI
2022-01-11 10:48 ` [RFC PATCH 3/5] RISC-V: Add 'Zfh' and 'Zfhmin' instructions Tsukasa OI
2022-01-11 10:48 ` [RFC PATCH 4/5] RISC-V: Add 'flh' and 'fsh' macro instructions Tsukasa OI
2022-01-11 10:48 ` [RFC PATCH 5/5] RISC-V: Add 'Zfh'/'Zfhmin' conflict message Tsukasa OI
2022-05-18 1:43 ` Kito Cheng [this message]
2022-05-18 9:31 ` [RFC PATCH 0/5] RISC-V: Add Half-precision floating point extensions Tsukasa OI
2022-05-22 5:15 ` [PATCH v2 0/4] RISC-V: Float16 extensions enhancements Tsukasa OI
2022-05-22 5:15 ` [PATCH v2 1/4] RISC-V: Refactor 'Zfh'-related macros Tsukasa OI
2022-05-22 5:15 ` [PATCH v2 2/4] RISC-V: Add instruction declaration for 'Zfh' Tsukasa OI
2022-05-22 5:15 ` [PATCH v2 3/4] RISC-V: Add 'Zfhmin' (and refactor 'Zfh') Tsukasa OI
2022-05-22 5:15 ` [PATCH v2 4/4] RISC-V: Add 'Zfh' / 'Zfhmin' conflict message Tsukasa OI
2022-05-22 9:11 ` [PATCH 0/1] RISC-V: Zfh extension diagnostic addition Tsukasa OI
2022-05-22 9:11 ` [PATCH 1/1] RISC-V: Add extension diagnostics to Zfh Tsukasa OI
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