From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Nelson Chu <nelson.chu@sifive.com>,
Kito Cheng <kito.cheng@sifive.com>
Cc: binutils@sourceware.org
Subject: [PATCH 1/1] RISC-V: Add extension diagnostics to Zfh
Date: Sun, 22 May 2022 18:11:30 +0900 [thread overview]
Message-ID: <b61fef20b432adeefad24f9e985396a1843a23f8.1653210663.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1653210663.git.research_trasio@irq.a4lg.com>
This commit adds extension diagnostics for five Zfh-related instruction
classes.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_multi_subset_supports_ext): Add
diagnostics for five Zfh-related instruction classes.
---
bfd/elfxx-riscv.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 5123e4a6fc4..ee996ddfce8 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -2483,6 +2483,28 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps,
return "d' or `zdinx";
case INSN_CLASS_Q_OR_ZQINX:
return "q' or `zqinx";
+ case INSN_CLASS_ZFH_OR_ZHINX:
+ return "zfh";
+ case INSN_CLASS_ZFHMIN:
+ return "zfhmin";
+ case INSN_CLASS_ZFHMIN_OR_ZHINXMIN:
+ return "zfhmin";
+ case INSN_CLASS_ZFHMIN_AND_D:
+ if (!riscv_subset_supports (rps, "zfhmin")
+ && !riscv_subset_supports (rps, "d"))
+ return "zfhmin' and `d";
+ else if (!riscv_subset_supports (rps, "zfhmin"))
+ return "zfhmin";
+ else
+ return "d";
+ case INSN_CLASS_ZFHMIN_AND_Q:
+ if (!riscv_subset_supports (rps, "zfhmin")
+ && !riscv_subset_supports (rps, "q"))
+ return "zfhmin' and `q";
+ else if (!riscv_subset_supports (rps, "zfhmin"))
+ return "zfhmin";
+ else
+ return "q";
case INSN_CLASS_ZBA:
return "zba";
case INSN_CLASS_ZBB:
--
2.34.1
prev parent reply other threads:[~2022-05-22 9:11 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-11 10:47 [RFC PATCH 0/5] RISC-V: Add Half-precision floating point extensions Tsukasa OI
2022-01-11 10:48 ` [RFC PATCH 1/5] RISC-V: Add 'Zfh' and 'Zfhmin' extensions Tsukasa OI
2022-01-11 10:48 ` [RFC PATCH 2/5] RISC-V: Add insn classes for Zfh/Zfhmin extensions Tsukasa OI
2022-01-11 10:48 ` [RFC PATCH 3/5] RISC-V: Add 'Zfh' and 'Zfhmin' instructions Tsukasa OI
2022-01-11 10:48 ` [RFC PATCH 4/5] RISC-V: Add 'flh' and 'fsh' macro instructions Tsukasa OI
2022-01-11 10:48 ` [RFC PATCH 5/5] RISC-V: Add 'Zfh'/'Zfhmin' conflict message Tsukasa OI
2022-05-18 1:43 ` [RFC PATCH 0/5] RISC-V: Add Half-precision floating point extensions Kito Cheng
2022-05-18 9:31 ` Tsukasa OI
2022-05-22 5:15 ` [PATCH v2 0/4] RISC-V: Float16 extensions enhancements Tsukasa OI
2022-05-22 5:15 ` [PATCH v2 1/4] RISC-V: Refactor 'Zfh'-related macros Tsukasa OI
2022-05-22 5:15 ` [PATCH v2 2/4] RISC-V: Add instruction declaration for 'Zfh' Tsukasa OI
2022-05-22 5:15 ` [PATCH v2 3/4] RISC-V: Add 'Zfhmin' (and refactor 'Zfh') Tsukasa OI
2022-05-22 5:15 ` [PATCH v2 4/4] RISC-V: Add 'Zfh' / 'Zfhmin' conflict message Tsukasa OI
2022-05-22 9:11 ` [PATCH 0/1] RISC-V: Zfh extension diagnostic addition Tsukasa OI
2022-05-22 9:11 ` Tsukasa OI [this message]
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