* [PATCH 1/5] Fix size of external_reloc for pe-aarch64
@ 2022-12-16 2:13 Mark Harmstone
2022-12-16 2:13 ` [PATCH 2/5] Skip ELF-specific tests when targeting pe-aarch64 Mark Harmstone
` (4 more replies)
0 siblings, 5 replies; 16+ messages in thread
From: Mark Harmstone @ 2022-12-16 2:13 UTC (permalink / raw)
To: binutils, wej22007, zac.walker; +Cc: Mark Harmstone
This patch series finishes off the work by Jedidiah Thompson, and adds
support for creating aarch64 PE images.
This should be essentially complete: I've used this to create a "hello
world" Windows program in asm, and (with GCC patches) a UEFI program in
C. I think the only things missing are the .secidx relocation, which is
needed for PDBs, and the SEH pseudos used for C++ exceptions.
This first patch fixes the size of RELSZ; I'm not sure why it was 14 in
the first place. This is the size of the "Base Relocation Block" in
https://learn.microsoft.com/en-us/windows/win32/debug/pe-format, and
AFAIK should be 10 for everything.
---
bfd/coff-aarch64.c | 4 ----
include/coff/aarch64.h | 3 +--
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/bfd/coff-aarch64.c b/bfd/coff-aarch64.c
index 2c3e225a222..0faa75c63d2 100644
--- a/bfd/coff-aarch64.c
+++ b/bfd/coff-aarch64.c
@@ -188,10 +188,6 @@ coff_aarch64_rtype_lookup (unsigned int code)
#define bfd_pe_print_pdata NULL
#endif
-/* Handle include/coff/aarch64.h external_reloc. */
-#define SWAP_IN_RELOC_OFFSET H_GET_32
-#define SWAP_OUT_RELOC_OFFSET H_PUT_32
-
/* Return TRUE if this relocation should
appear in the output .reloc section. */
diff --git a/include/coff/aarch64.h b/include/coff/aarch64.h
index 100e08f18ef..b670f28bd3e 100644
--- a/include/coff/aarch64.h
+++ b/include/coff/aarch64.h
@@ -54,11 +54,10 @@ struct external_reloc
char r_vaddr[4];
char r_symndx[4];
char r_type[2];
- char r_offset[4];
};
#define RELOC struct external_reloc
-#define RELSZ 14
+#define RELSZ 10
/* ARM64 relocations types. */
--
2.37.4
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 2/5] Skip ELF-specific tests when targeting pe-aarch64
2022-12-16 2:13 [PATCH 1/5] Fix size of external_reloc for pe-aarch64 Mark Harmstone
@ 2022-12-16 2:13 ` Mark Harmstone
2022-12-16 7:07 ` Jan Beulich
2022-12-16 2:13 ` [PATCH 3/5] Add pe-aarch64 relocations Mark Harmstone
` (3 subsequent siblings)
4 siblings, 1 reply; 16+ messages in thread
From: Mark Harmstone @ 2022-12-16 2:13 UTC (permalink / raw)
To: binutils, wej22007, zac.walker; +Cc: Mark Harmstone
There's currently an awful lot of test failures for pe-aarch64, because
of tests that assume that aarch64 implies ELF. This sets notarget for
these.
---
binutils/testsuite/binutils-all/objcopy.exp | 1 +
gas/testsuite/gas/aarch64/adr_1.d | 1 +
gas/testsuite/gas/aarch64/advsimd-mov-bad.d | 1 +
gas/testsuite/gas/aarch64/b_1.d | 1 +
gas/testsuite/gas/aarch64/beq_1.d | 1 +
gas/testsuite/gas/aarch64/bfloat16-directive-be.d | 1 +
gas/testsuite/gas/aarch64/bfloat16-directive-le.d | 1 +
gas/testsuite/gas/aarch64/codealign.d | 2 +-
gas/testsuite/gas/aarch64/codealign_1.d | 1 +
gas/testsuite/gas/aarch64/dwarf.d | 1 +
gas/testsuite/gas/aarch64/ilp32-basic.d | 1 +
gas/testsuite/gas/aarch64/int-insns.d | 1 +
gas/testsuite/gas/aarch64/ldr_1.d | 1 +
gas/testsuite/gas/aarch64/litpool.d | 2 +-
gas/testsuite/gas/aarch64/mapmisc.d | 2 +-
gas/testsuite/gas/aarch64/mapping.d | 2 +-
gas/testsuite/gas/aarch64/mapping2.d | 2 +-
gas/testsuite/gas/aarch64/mapping3.d | 2 +-
gas/testsuite/gas/aarch64/mapping4.d | 2 +-
gas/testsuite/gas/aarch64/mapping_5.d | 1 +
gas/testsuite/gas/aarch64/mapping_6.d | 1 +
gas/testsuite/gas/aarch64/mops_invalid_2.d | 1 +
gas/testsuite/gas/aarch64/movw_label.d | 1 +
gas/testsuite/gas/aarch64/optional.d | 1 +
gas/testsuite/gas/aarch64/pac_ab_key.d | 1 +
gas/testsuite/gas/aarch64/pac_negate_ra_state.d | 1 +
gas/testsuite/gas/aarch64/pr20364.d | 1 +
gas/testsuite/gas/aarch64/pr27217.d | 1 +
gas/testsuite/gas/aarch64/pr29519.d | 1 +
gas/testsuite/gas/aarch64/programmer-friendly.d | 1 +
gas/testsuite/gas/aarch64/reloc-data.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g0.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g2.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-gotoff_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-gottprel_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-insn.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g0.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g2.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g3.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_1.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_10.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_11.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_12.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_13.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_14.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_15.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_16.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_17.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_18.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_19.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_2.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_20.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_21.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_22.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_23.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_24.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_25.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_26.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_27.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_28.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_3.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_4.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_5.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_6.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_7.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_8.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_9.d | 1 +
gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d | 1 +
gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d | 1 +
gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d | 1 +
gas/testsuite/gas/aarch64/system.d | 1 +
gas/testsuite/gas/aarch64/tail_padding.d | 1 +
gas/testsuite/gas/aarch64/tbz_1.d | 1 +
gas/testsuite/gas/aarch64/tls-desc.d | 1 +
gas/testsuite/gas/aarch64/tls.d | 1 +
gas/testsuite/gas/pe/big-obj.d | 1 +
ld/testsuite/ld-scripts/weak.exp | 1 +
129 files changed, 129 insertions(+), 7 deletions(-)
diff --git a/binutils/testsuite/binutils-all/objcopy.exp b/binutils/testsuite/binutils-all/objcopy.exp
index de6f3aaaef2..40d18a0dc92 100644
--- a/binutils/testsuite/binutils-all/objcopy.exp
+++ b/binutils/testsuite/binutils-all/objcopy.exp
@@ -1413,6 +1413,7 @@ proc objcopy_test_without_global_symbol { } {
# The AArch64 and ARM targets preserve mapping symbols
# in object files, so they will fail this test.
setup_xfail aarch64*-*-* arm*-*-*
+clear_xfail aarch64*-*-pe* aarch64*-*-mingw*
objcopy_test_without_global_symbol
diff --git a/gas/testsuite/gas/aarch64/adr_1.d b/gas/testsuite/gas/aarch64/adr_1.d
index 4b5cc56144b..09ac6abe2a6 100644
--- a/gas/testsuite/gas/aarch64/adr_1.d
+++ b/gas/testsuite/gas/aarch64/adr_1.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/advsimd-mov-bad.d b/gas/testsuite/gas/aarch64/advsimd-mov-bad.d
index 6ca98873ac2..02ac2a12715 100644
--- a/gas/testsuite/gas/aarch64/advsimd-mov-bad.d
+++ b/gas/testsuite/gas/aarch64/advsimd-mov-bad.d
@@ -1,5 +1,6 @@
#source: advsimd-mov-bad.s
#readelf: -s --wide
+#notarget: *-*-pe* *-*-mingw*
Symbol table '.symtab' contains 6 entries:
+Num:.*
diff --git a/gas/testsuite/gas/aarch64/b_1.d b/gas/testsuite/gas/aarch64/b_1.d
index 4815decb0c6..6268a8f9aec 100644
--- a/gas/testsuite/gas/aarch64/b_1.d
+++ b/gas/testsuite/gas/aarch64/b_1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/beq_1.d b/gas/testsuite/gas/aarch64/beq_1.d
index 525a17e75e5..4571e39e608 100644
--- a/gas/testsuite/gas/aarch64/beq_1.d
+++ b/gas/testsuite/gas/aarch64/beq_1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/bfloat16-directive-be.d b/gas/testsuite/gas/aarch64/bfloat16-directive-be.d
index 132d04e44fa..fad1c832f4d 100644
--- a/gas/testsuite/gas/aarch64/bfloat16-directive-be.d
+++ b/gas/testsuite/gas/aarch64/bfloat16-directive-be.d
@@ -2,6 +2,7 @@
# source: bfloat16-directive.s
# as: -mbig-endian
# objdump: -s --section=.data
+#notarget: *-*-pe* *-*-mingw*
.*: +file format .*
diff --git a/gas/testsuite/gas/aarch64/bfloat16-directive-le.d b/gas/testsuite/gas/aarch64/bfloat16-directive-le.d
index f22d610d84b..af96f4ad7b5 100644
--- a/gas/testsuite/gas/aarch64/bfloat16-directive-le.d
+++ b/gas/testsuite/gas/aarch64/bfloat16-directive-le.d
@@ -2,6 +2,7 @@
# source: bfloat16-directive.s
# as: -mlittle-endian
# objdump: -s --section=.data
+#notarget: *-*-pe* *-*-mingw*
.*: +file format .*
diff --git a/gas/testsuite/gas/aarch64/codealign.d b/gas/testsuite/gas/aarch64/codealign.d
index a44c1073e09..a3db195fc0e 100644
--- a/gas/testsuite/gas/aarch64/codealign.d
+++ b/gas/testsuite/gas/aarch64/codealign.d
@@ -2,7 +2,7 @@
#as: --generate-missing-build-notes=no
# Minimum code alignment should be set.
# This test is only valid on ELF based ports.
-#notarget: *-*-pe *-*-wince
+#notarget: *-*-pe* *-*-wince *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/codealign_1.d b/gas/testsuite/gas/aarch64/codealign_1.d
index c4dc5270195..2b9819f174c 100644
--- a/gas/testsuite/gas/aarch64/codealign_1.d
+++ b/gas/testsuite/gas/aarch64/codealign_1.d
@@ -1,6 +1,7 @@
#objdump: --section-headers
#as: --generate-missing-build-notes=no
# Minimum code alignment should be set.
+#notarget: *-*-pe* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/dwarf.d b/gas/testsuite/gas/aarch64/dwarf.d
index 9e4184ab6e8..98c202e3613 100644
--- a/gas/testsuite/gas/aarch64/dwarf.d
+++ b/gas/testsuite/gas/aarch64/dwarf.d
@@ -1,5 +1,6 @@
#readelf: -s --debug-dump=aranges
#as: -g --generate-missing-build-notes=no
+#notarget: *-*-pe* *-*-mingw*
Symbol table '.symtab' contains 11 entries:
Num:[ ]+Value[ ]+Size[ ]+Type[ ]+Bind[ ]+Vis[ ]+Ndx[ ]+Name
diff --git a/gas/testsuite/gas/aarch64/ilp32-basic.d b/gas/testsuite/gas/aarch64/ilp32-basic.d
index 876f28cba28..9adb6876ac0 100644
--- a/gas/testsuite/gas/aarch64/ilp32-basic.d
+++ b/gas/testsuite/gas/aarch64/ilp32-basic.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format elf32-.*aarch64
diff --git a/gas/testsuite/gas/aarch64/int-insns.d b/gas/testsuite/gas/aarch64/int-insns.d
index 76f937c4fbf..9fe31551bde 100644
--- a/gas/testsuite/gas/aarch64/int-insns.d
+++ b/gas/testsuite/gas/aarch64/int-insns.d
@@ -1,5 +1,6 @@
#objdump: -dr
#as: -march=armv8-a -mabi=lp64
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/ldr_1.d b/gas/testsuite/gas/aarch64/ldr_1.d
index f68b01d6838..399edd63672 100644
--- a/gas/testsuite/gas/aarch64/ldr_1.d
+++ b/gas/testsuite/gas/aarch64/ldr_1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/litpool.d b/gas/testsuite/gas/aarch64/litpool.d
index 56044248b2e..5cd302ad9f3 100644
--- a/gas/testsuite/gas/aarch64/litpool.d
+++ b/gas/testsuite/gas/aarch64/litpool.d
@@ -1,7 +1,7 @@
#objdump: -d
#name: AArch64 Bignums in Literal Pool (PR 16688)
# This test is only valid on ELF based ports.
-#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe* *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapmisc.d b/gas/testsuite/gas/aarch64/mapmisc.d
index 1f2df6ea0d7..1a2ea4456f7 100644
--- a/gas/testsuite/gas/aarch64/mapmisc.d
+++ b/gas/testsuite/gas/aarch64/mapmisc.d
@@ -3,7 +3,7 @@
#name: AArch64 Mapping Symbols for miscellaneous directives
#source: mapmisc.s
# This test is only valid on ELF based ports.
-#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe* *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-mingw*
.*: +file format .*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapping.d b/gas/testsuite/gas/aarch64/mapping.d
index d23c0fdbd54..c0255bf7d15 100644
--- a/gas/testsuite/gas/aarch64/mapping.d
+++ b/gas/testsuite/gas/aarch64/mapping.d
@@ -2,7 +2,7 @@
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols
# This test is only valid on ELF based ports.
-#notarget: *-*-pe *-*-wince
+#notarget: *-*-pe* *-*-wince *-*-mingw*
# Test the generation of AArch64 ELF Mapping Symbols
diff --git a/gas/testsuite/gas/aarch64/mapping2.d b/gas/testsuite/gas/aarch64/mapping2.d
index 4ad1a079aa5..927a5cc80a2 100644
--- a/gas/testsuite/gas/aarch64/mapping2.d
+++ b/gas/testsuite/gas/aarch64/mapping2.d
@@ -2,7 +2,7 @@
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols Test 2
# This test is only valid on ELF based ports.
-#notarget: *-*-pe *-*-wince
+#notarget: *-*-pe* *-*-wince *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapping3.d b/gas/testsuite/gas/aarch64/mapping3.d
index ece7de1cb7b..7805cadebd5 100644
--- a/gas/testsuite/gas/aarch64/mapping3.d
+++ b/gas/testsuite/gas/aarch64/mapping3.d
@@ -2,7 +2,7 @@
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols Test 3
# This test is only valid on ELF based ports.
-#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe* *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapping4.d b/gas/testsuite/gas/aarch64/mapping4.d
index d0495dafed4..324eea04b41 100644
--- a/gas/testsuite/gas/aarch64/mapping4.d
+++ b/gas/testsuite/gas/aarch64/mapping4.d
@@ -2,7 +2,7 @@
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols Test 4
# This test is only valid on ELF based ports.
-#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe* *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapping_5.d b/gas/testsuite/gas/aarch64/mapping_5.d
index 04263484ae6..1c2ae76aef3 100644
--- a/gas/testsuite/gas/aarch64/mapping_5.d
+++ b/gas/testsuite/gas/aarch64/mapping_5.d
@@ -1,6 +1,7 @@
#objdump: --syms --special-syms
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols Test 5
+#notarget: *-*-pe* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapping_6.d b/gas/testsuite/gas/aarch64/mapping_6.d
index 96d0ed663c9..9da44901a65 100644
--- a/gas/testsuite/gas/aarch64/mapping_6.d
+++ b/gas/testsuite/gas/aarch64/mapping_6.d
@@ -1,6 +1,7 @@
#objdump: --syms --special-syms
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols Test 6
+#notarget: *-*-pe* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mops_invalid_2.d b/gas/testsuite/gas/aarch64/mops_invalid_2.d
index f5e7228f6e7..8acdc8edfb4 100644
--- a/gas/testsuite/gas/aarch64/mops_invalid_2.d
+++ b/gas/testsuite/gas/aarch64/mops_invalid_2.d
@@ -1,5 +1,6 @@
# warning_output: mops_invalid_2.l
# objdump: -dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.*
diff --git a/gas/testsuite/gas/aarch64/movw_label.d b/gas/testsuite/gas/aarch64/movw_label.d
index 8466570b33c..cff34433756 100644
--- a/gas/testsuite/gas/aarch64/movw_label.d
+++ b/gas/testsuite/gas/aarch64/movw_label.d
@@ -1,5 +1,6 @@
#objdump: -dr
#name: movw relocation symbol name
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/optional.d b/gas/testsuite/gas/aarch64/optional.d
index b2a123d55a2..c9971bbaf97 100644
--- a/gas/testsuite/gas/aarch64/optional.d
+++ b/gas/testsuite/gas/aarch64/optional.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/pac_ab_key.d b/gas/testsuite/gas/aarch64/pac_ab_key.d
index 5e7496a86bd..4a31fbfe631 100644
--- a/gas/testsuite/gas/aarch64/pac_ab_key.d
+++ b/gas/testsuite/gas/aarch64/pac_ab_key.d
@@ -2,6 +2,7 @@
# Test assembling a file with functions signed by two different pointer
# authentication keys. It must interpret .cfi_b_key_frame properly and emit a
# 'B' character into the correct CIE's augmentation string.
+#notarget: *-*-pe* *-*-mingw*
.+: file .+
diff --git a/gas/testsuite/gas/aarch64/pac_negate_ra_state.d b/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
index 62717767608..3ca21522734 100644
--- a/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
+++ b/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
@@ -1,4 +1,5 @@
#objdump: --dwarf=frames
+#notarget: *-*-pe* *-*-mingw*
.+: file .+
diff --git a/gas/testsuite/gas/aarch64/pr20364.d b/gas/testsuite/gas/aarch64/pr20364.d
index babcff10304..1b77a9d4ceb 100644
--- a/gas/testsuite/gas/aarch64/pr20364.d
+++ b/gas/testsuite/gas/aarch64/pr20364.d
@@ -1,6 +1,7 @@
# Check that ".align <size>, <fill>" does not set the mapping state to DATA, causing unnecessary frag generation.
#name: PR20364
#objdump: -d
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/pr27217.d b/gas/testsuite/gas/aarch64/pr27217.d
index 3397dfa2481..24434824323 100644
--- a/gas/testsuite/gas/aarch64/pr27217.d
+++ b/gas/testsuite/gas/aarch64/pr27217.d
@@ -1,6 +1,7 @@
# Check that expressions that generate relocations work when the symbol is a constant.
#name: PR27217
#objdump: -rd
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/pr29519.d b/gas/testsuite/gas/aarch64/pr29519.d
index 4bfea09bee0..c70e05f95ae 100644
--- a/gas/testsuite/gas/aarch64/pr29519.d
+++ b/gas/testsuite/gas/aarch64/pr29519.d
@@ -1,6 +1,7 @@
# Check that AArch64 specific pseudo-ops can be separated by the ; line separator character.
#name: PR29519 (Separating AArch64 pseudo-ops with ;)
#objdump: -rd
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/programmer-friendly.d b/gas/testsuite/gas/aarch64/programmer-friendly.d
index 8fa6aa70dbf..20ace20f707 100644
--- a/gas/testsuite/gas/aarch64/programmer-friendly.d
+++ b/gas/testsuite/gas/aarch64/programmer-friendly.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-data.d b/gas/testsuite/gas/aarch64/reloc-data.d
index 7bcf300f78c..9976585e40e 100644
--- a/gas/testsuite/gas/aarch64/reloc-data.d
+++ b/gas/testsuite/gas/aarch64/reloc-data.d
@@ -1,6 +1,7 @@
#as: -mabi=lp64
#objdump: -dr
#skip: aarch64_be-*-*
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d
index 44b66762673..7a4e5c45c0e 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d
index 6a6ec00a56d..fc25265732e 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d
index c319e3d8dc8..7a944be92df 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d
index 5d7f6cf3d5d..4da4da340fb 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d
index 6a918065dfd..0b87c2f691c 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d
index c5995f5541a..abee16b1d21 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d
index 739eaa313d6..0782c758f70 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d
index 00d278b53d1..6a9d4e6de6b 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
index 0235aeb9729..76479531db2 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d
index f904850a9ed..f29c94c0863 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d
index ee1f504baf5..61465b4087c 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d
index a44f9d23066..403bdbad126 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d
index cd793bb8b12..b4bcdb3691d 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d
index ab5d869baaa..1db57093e42 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d
index fa46d7b1f56..14032a05570 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d
index f754449701e..f397cbc9b62 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d
index b232b2f51fb..30501411c71 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d
index 62ff7ab420e..5c457849bae 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d
index 78074f5edb2..a2600f5e7f4 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d
index 8eac3bd99d5..dcdca5e3fba 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d
index 02695047fc9..4609ce91836 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d
index 0a231f9f062..7f04bb82059 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d
index 858898a0748..4ceb95986ba 100644
--- a/gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-gotoff_g1.d b/gas/testsuite/gas/aarch64/reloc-gotoff_g1.d
index e6a68f06e47..2599b85a84c 100644
--- a/gas/testsuite/gas/aarch64/reloc-gotoff_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-gotoff_g1.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d
index bae4e37b27d..46005c976db 100644
--- a/gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-gottprel_g1.d b/gas/testsuite/gas/aarch64/reloc-gottprel_g1.d
index 3061c2f5007..770c4e0a932 100644
--- a/gas/testsuite/gas/aarch64/reloc-gottprel_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-gottprel_g1.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-insn.d b/gas/testsuite/gas/aarch64/reloc-insn.d
index 0f3b4143d96..4626b6f57a3 100644
--- a/gas/testsuite/gas/aarch64/reloc-insn.d
+++ b/gas/testsuite/gas/aarch64/reloc-insn.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g0.d b/gas/testsuite/gas/aarch64/reloc-prel_g0.d
index c5a7685b381..79667fed4c7 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g0.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g0.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d
index f7a29194be2..7fd954cb0ac 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g1.d b/gas/testsuite/gas/aarch64/reloc-prel_g1.d
index 63c91e0d7e8..4295fcab0fe 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d b/gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d
index 4c0a1d943cc..438d9b3b7d2 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g2.d b/gas/testsuite/gas/aarch64/reloc-prel_g2.d
index 80d18704a57..e4c6cd21cc2 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g2.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g2.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d b/gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d
index dc3c58e44fd..8aeab101059 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g3.d b/gas/testsuite/gas/aarch64/reloc-prel_g3.d
index 4a476ab954f..2b540f154a3 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g3.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g3.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d
index 606c801d053..35a061489ca 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d
index a046e787306..abe6811e1d4 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
Disassembly of section \.text:
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d
index f25913f4170..9749716983f 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d b/gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d
index 52a37aed62b..13864591246 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm-1.d
index 6b7132fb07e..7034e299a4b 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d
index 28686cd04ef..a7417eca554 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d
index f4faa4bddeb..472f8c33efd 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d
index e2c81efdfd5..b3f47b180cc 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d
index c7d1f6b0448..24ea06cb479 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d
index f068cfb85bb..c7a96501804 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d
index 11ff08f8b17..1f537fb3bc8 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12-ldst16.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d
index 66c17a444d6..06774a3b573 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d
index 79cffb51bbd..b1d45bf2c26 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12-ldst32.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d
index 17b2de3ee48..c2caaca6f34 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d
index 25c6f2353e3..1969595c7ea 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12-ldst64.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d
index 73277b38c56..30eb3fa2138 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d
index 5b6f2330e6a..6a428c49f0b 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12-ldst8.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d
index 781997473ce..3e5cb6796ef 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d
index 896c6ca8447..28757a8a3c9 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12_nc-ldst16.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d
index 06aa052b949..3ccc1b432a5 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d
index 7b8f6bf495f..98ac7660969 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12_nc-ldst32.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d
index c83044b3ac0..ae9432ee952 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d
index f8827505a63..34d6832583a 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12_nc-ldst64.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d
index 8e16b09d97c..6b176f9e287 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d
index 14e3345b7d3..8464db797ca 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12_nc-ldst8.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d
index a87429f85d5..76a1e76ccd4 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_1.d b/gas/testsuite/gas/aarch64/sve-movprfx_1.d
index 13035db1d82..5ead32cfe4e 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_1.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_1.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_1.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_10.d b/gas/testsuite/gas/aarch64/sve-movprfx_10.d
index 575632f9a40..1dcbbacbaf3 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_10.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_10.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_10.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_11.d b/gas/testsuite/gas/aarch64/sve-movprfx_11.d
index 71bab8abd55..90ba848b615 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_11.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_11.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_11.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_12.d b/gas/testsuite/gas/aarch64/sve-movprfx_12.d
index dde3a926965..4698567b6d3 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_12.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_12.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_12.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_13.d b/gas/testsuite/gas/aarch64/sve-movprfx_13.d
index 46b0bb0a18f..4a12efe5008 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_13.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_13.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_13.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_14.d b/gas/testsuite/gas/aarch64/sve-movprfx_14.d
index 1024339a7c2..9d2a8f0c29c 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_14.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_14.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_14.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_15.d b/gas/testsuite/gas/aarch64/sve-movprfx_15.d
index 436e59f8269..9e77f04fed7 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_15.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_15.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_15.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_16.d b/gas/testsuite/gas/aarch64/sve-movprfx_16.d
index a6550b78990..e998e62afe5 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_16.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_16.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_16.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_17.d b/gas/testsuite/gas/aarch64/sve-movprfx_17.d
index ce96138339d..a873bfdfaa2 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_17.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_17.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_17.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_18.d b/gas/testsuite/gas/aarch64/sve-movprfx_18.d
index e158131331b..2868d8ed8ef 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_18.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_18.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_18.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_19.d b/gas/testsuite/gas/aarch64/sve-movprfx_19.d
index bf3b0631ef0..996316ad599 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_19.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_19.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_19.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_2.d b/gas/testsuite/gas/aarch64/sve-movprfx_2.d
index 905c1f4c120..81965828201 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_2.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_2.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_2.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_20.d b/gas/testsuite/gas/aarch64/sve-movprfx_20.d
index 80621d64adb..002879d6f33 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_20.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_20.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_20.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_21.d b/gas/testsuite/gas/aarch64/sve-movprfx_21.d
index 20eb85b3377..2c1eeb998dd 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_21.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_21.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_21.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_22.d b/gas/testsuite/gas/aarch64/sve-movprfx_22.d
index de4d1a3693b..32c1f79a101 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_22.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_22.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_22.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_23.d b/gas/testsuite/gas/aarch64/sve-movprfx_23.d
index e1c6c2c2cce..dac3a818408 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_23.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_23.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_23.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_24.d b/gas/testsuite/gas/aarch64/sve-movprfx_24.d
index ff1bdbe7109..8459324a354 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_24.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_24.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_24.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_25.d b/gas/testsuite/gas/aarch64/sve-movprfx_25.d
index 83a6500710c..02bcfd561a5 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_25.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_25.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_25.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_26.d b/gas/testsuite/gas/aarch64/sve-movprfx_26.d
index f0830cc718b..9a5827759c5 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_26.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_26.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_26.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_27.d b/gas/testsuite/gas/aarch64/sve-movprfx_27.d
index e71d1715b61..5e96bd328db 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_27.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_27.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_27.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_28.d b/gas/testsuite/gas/aarch64/sve-movprfx_28.d
index 808d07da892..3121b71ebec 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_28.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_28.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_28.l
#as: -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_3.d b/gas/testsuite/gas/aarch64/sve-movprfx_3.d
index 03909dbc62c..1aec576d130 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_3.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_3.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_3.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_4.d b/gas/testsuite/gas/aarch64/sve-movprfx_4.d
index fd71a4bac28..a3dedae230d 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_4.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_4.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_4.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_5.d b/gas/testsuite/gas/aarch64/sve-movprfx_5.d
index 511cf66c665..74a43dfd3e4 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_5.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_5.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_5.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_6.d b/gas/testsuite/gas/aarch64/sve-movprfx_6.d
index 4af626993aa..1ae23ed68b3 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_6.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_6.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_6.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_7.d b/gas/testsuite/gas/aarch64/sve-movprfx_7.d
index 725a8a8604b..9be980436a4 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_7.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_7.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_7.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_8.d b/gas/testsuite/gas/aarch64/sve-movprfx_8.d
index f853e218b93..33be771eddd 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_8.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_8.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_8.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_9.d b/gas/testsuite/gas/aarch64/sve-movprfx_9.d
index 54a1733937b..34d85ba6d33 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_9.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_9.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_9.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d b/gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d
index ce99514b3da..85468aa0b0e 100644
--- a/gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d
+++ b/gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d
@@ -1,5 +1,6 @@
#objdump: -t
#as: --generate-missing-build-notes=no
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d b/gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d
index 5f46f27236d..001cf0da1e3 100644
--- a/gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d
+++ b/gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d
@@ -1,5 +1,6 @@
#objdump: -t
#as: --generate-missing-build-notes=no
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d b/gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d
index 8d05c1a6361..486a6c083b1 100644
--- a/gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d
+++ b/gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d
@@ -1,5 +1,6 @@
#objdump: -t
#as: --generate-missing-build-notes=no
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/system.d b/gas/testsuite/gas/aarch64/system.d
index 93c84a72982..4c1d9ff16a9 100644
--- a/gas/testsuite/gas/aarch64/system.d
+++ b/gas/testsuite/gas/aarch64/system.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/tail_padding.d b/gas/testsuite/gas/aarch64/tail_padding.d
index a816ac4a2de..5ef1e3a1c5e 100644
--- a/gas/testsuite/gas/aarch64/tail_padding.d
+++ b/gas/testsuite/gas/aarch64/tail_padding.d
@@ -1,6 +1,7 @@
#as: -mabi=lp64
#readelf: -S
#name: AArch64 section tail padding
+#notarget: *-*-pe* *-*-mingw*
There are .* section headers, starting at offset .*:
diff --git a/gas/testsuite/gas/aarch64/tbz_1.d b/gas/testsuite/gas/aarch64/tbz_1.d
index 54b7dbab079..e7ca8db5466 100644
--- a/gas/testsuite/gas/aarch64/tbz_1.d
+++ b/gas/testsuite/gas/aarch64/tbz_1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/tls-desc.d b/gas/testsuite/gas/aarch64/tls-desc.d
index e393d455461..85d1f4b6a64 100644
--- a/gas/testsuite/gas/aarch64/tls-desc.d
+++ b/gas/testsuite/gas/aarch64/tls-desc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/tls.d b/gas/testsuite/gas/aarch64/tls.d
index dc18949bd0c..f8ed49725e5 100644
--- a/gas/testsuite/gas/aarch64/tls.d
+++ b/gas/testsuite/gas/aarch64/tls.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/pe/big-obj.d b/gas/testsuite/gas/pe/big-obj.d
index 27b351a7d60..ad44cd51310 100644
--- a/gas/testsuite/gas/pe/big-obj.d
+++ b/gas/testsuite/gas/pe/big-obj.d
@@ -1,6 +1,7 @@
#as: -mbig-obj
#objdump: -h
#name: PE big obj
+#notarget: aarch64-*
.*: *file format pe-bigobj-.*
diff --git a/ld/testsuite/ld-scripts/weak.exp b/ld/testsuite/ld-scripts/weak.exp
index 68d70240f7b..2826e3bee78 100644
--- a/ld/testsuite/ld-scripts/weak.exp
+++ b/ld/testsuite/ld-scripts/weak.exp
@@ -31,6 +31,7 @@ if {! [is_elf_format] && ! [is_pecoff_format]} {
# Weak symbols are broken for most PE targets.
if {! [istarget i?86-*-*] && ! [istarget sh-*-*]} {
setup_xfail *-*-pe*
+ setup_xfail *-*-mingw*
}
# hppa64 is incredibly broken
--
2.37.4
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 3/5] Add pe-aarch64 relocations
2022-12-16 2:13 [PATCH 1/5] Fix size of external_reloc for pe-aarch64 Mark Harmstone
2022-12-16 2:13 ` [PATCH 2/5] Skip ELF-specific tests when targeting pe-aarch64 Mark Harmstone
@ 2022-12-16 2:13 ` Mark Harmstone
2022-12-16 2:13 ` [PATCH 4/5] Add .secrel32 for pe-aarch64 Mark Harmstone
` (2 subsequent siblings)
4 siblings, 0 replies; 16+ messages in thread
From: Mark Harmstone @ 2022-12-16 2:13 UTC (permalink / raw)
To: binutils, wej22007, zac.walker; +Cc: Mark Harmstone
This adds the remaining pe-aarch64 relocations, and gets them working.
It also brings in the constant directives from ELF, as otherwise .word
would be 2 rather than 4 bytes, and .xword and .dword wouldn't be
defined.
---
bfd/coff-aarch64.c | 651 +++++++++++++++++++++++++++++-
bfd/config.bfd | 6 -
gas/config/tc-aarch64.c | 24 +-
gas/testsuite/gas/pe/pe-aarch64.d | 214 +++++++++-
gas/testsuite/gas/pe/pe-aarch64.s | 152 ++++++-
ld/testsuite/ld-pe/aarch64.d | 148 +++++++
ld/testsuite/ld-pe/aarch64a.s | 149 +++++++
ld/testsuite/ld-pe/aarch64b.s | 6 +
ld/testsuite/ld-pe/pe.exp | 10 +-
9 files changed, 1318 insertions(+), 42 deletions(-)
create mode 100644 ld/testsuite/ld-pe/aarch64.d
create mode 100644 ld/testsuite/ld-pe/aarch64a.s
create mode 100644 ld/testsuite/ld-pe/aarch64b.s
diff --git a/bfd/coff-aarch64.c b/bfd/coff-aarch64.c
index 0faa75c63d2..e181ce66aa0 100644
--- a/bfd/coff-aarch64.c
+++ b/bfd/coff-aarch64.c
@@ -39,59 +39,296 @@
#include "libcoff.h"
+static bfd_reloc_status_type
+coff_aarch64_addr64_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint64_t val = reloc_entry->addend;
+
+ bfd_putl64 (val, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_addr32_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint64_t val;
+
+ if ((int64_t) reloc_entry->addend > 0x7fffffff
+ || (int64_t) reloc_entry->addend < -0x7fffffff)
+ return bfd_reloc_overflow;
+
+ val = reloc_entry->addend;
+
+ bfd_putl32 ((uint32_t) val, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_branch26_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend;
+
+ if (param > 0x7ffffff || param < -0x8000000)
+ return bfd_reloc_overflow;
+
+ op &= 0xfc000000;
+ op |= (param >> 2) & 0x3ffffff;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_rel21_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend;
+
+ if (param > 0xfffff || param < -0x100000)
+ return bfd_reloc_overflow;
+
+ op &= 0x9f00001f;
+ op |= (param & 0x1ffffc) << 3;
+ op |= (param & 0x3) << 29;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_po12l_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend & 0xfff;
+
+ /* top two bits represent how much addend should be shifted */
+ param >>= op >> 30;
+
+ op &= 0xffc003ff;
+ op |= param << 10;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_branch19_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend;
+
+ if (param > 0xfffff || param < -0x100000)
+ return bfd_reloc_overflow;
+
+ op &= 0xff00001f;
+ op |= ((param >> 2) & 0x7ffff) << 5;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_branch14_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend;
+
+ if (param > 0x7fff || param < -0x8000)
+ return bfd_reloc_overflow;
+
+ op &= 0xfff8001f;
+ op |= ((param >> 2) & 0x3fff) << 5;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_po12a_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend;
+
+ op &= 0xffc003ff;
+ op |= (param & 0xfff) << 10;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_addr32nb_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint64_t val;
+
+ if ((int64_t) reloc_entry->addend > 0x7fffffff
+ || (int64_t) reloc_entry->addend < -0x7fffffff)
+ return bfd_reloc_overflow;
+
+ val = reloc_entry->addend;
+
+ bfd_putl32 ((uint32_t) val, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
/* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */
#define MINUS_ONE (~ (bfd_vma) 0)
+static const reloc_howto_type arm64_reloc_howto_abs = HOWTO(IMAGE_REL_ARM64_ABSOLUTE, 0, 1, 0, false, 0,
+ complain_overflow_dont,
+ NULL, "IMAGE_REL_ARM64_ABSOLUTE",
+ false, 0, 0, false);
+
static const reloc_howto_type arm64_reloc_howto_64 = HOWTO(IMAGE_REL_ARM64_ADDR64, 0, 8, 64, false, 0,
complain_overflow_bitfield,
- NULL, "64",
+ coff_aarch64_addr64_reloc, "IMAGE_REL_ARM64_ADDR64",
false, MINUS_ONE, MINUS_ONE, false);
static const reloc_howto_type arm64_reloc_howto_32 = HOWTO (IMAGE_REL_ARM64_ADDR32, 0, 4, 32, false, 0,
complain_overflow_bitfield,
- NULL, "32",
+ coff_aarch64_addr32_reloc, "IMAGE_REL_ARM64_ADDR32",
false, 0xffffffff, 0xffffffff, false);
static const reloc_howto_type arm64_reloc_howto_32_pcrel = HOWTO (IMAGE_REL_ARM64_REL32, 0, 4, 32, true, 0,
complain_overflow_bitfield,
- NULL, "DISP32",
+ NULL, "IMAGE_REL_ARM64_REL32",
false, 0xffffffff, 0xffffffff, true);
static const reloc_howto_type arm64_reloc_howto_branch26 = HOWTO (IMAGE_REL_ARM64_BRANCH26, 0, 4, 26, true, 0,
complain_overflow_bitfield,
- NULL, "BRANCH26",
+ coff_aarch64_branch26_reloc, "IMAGE_REL_ARM64_BRANCH26",
false, 0x03ffffff, 0x03ffffff, true);
static const reloc_howto_type arm64_reloc_howto_page21 = HOWTO (IMAGE_REL_ARM64_PAGEBASE_REL21, 12, 4, 21, true, 0,
complain_overflow_signed,
- NULL, "PAGE21",
+ coff_aarch64_rel21_reloc, "IMAGE_REL_ARM64_PAGEBASE_REL21",
false, 0x1fffff, 0x1fffff, false);
static const reloc_howto_type arm64_reloc_howto_lo21 = HOWTO (IMAGE_REL_ARM64_REL21, 0, 4, 21, true, 0,
complain_overflow_signed,
- NULL, "LO21",
+ coff_aarch64_rel21_reloc, "IMAGE_REL_ARM64_REL21",
false, 0x1fffff, 0x1fffff, true);
-static const reloc_howto_type arm64_reloc_howto_pgoff12 = HOWTO (IMAGE_REL_ARM64_PAGEOFFSET_12L, 1, 4, 12, true, 0,
+static const reloc_howto_type arm64_reloc_howto_pgoff12l = HOWTO (IMAGE_REL_ARM64_PAGEOFFSET_12L, 1, 4, 12, true, 0,
complain_overflow_signed,
- NULL, "PGOFF12",
+ coff_aarch64_po12l_reloc, "IMAGE_REL_ARM64_PAGEOFFSET_12L",
false, 0xffe, 0xffe, true);
static const reloc_howto_type arm64_reloc_howto_branch19 = HOWTO (IMAGE_REL_ARM64_BRANCH19, 2, 4, 19, true, 0,
complain_overflow_signed,
- NULL, "BRANCH19",
+ coff_aarch64_branch19_reloc, "IMAGE_REL_ARM64_BRANCH19",
false, 0x7ffff, 0x7ffff, true);
+static const reloc_howto_type arm64_reloc_howto_branch14 = HOWTO (IMAGE_REL_ARM64_BRANCH14, 2, 4, 14, true, 0,
+ complain_overflow_signed,
+ coff_aarch64_branch14_reloc, "IMAGE_REL_ARM64_BRANCH14",
+ false, 0x3fff, 0x3fff, true);
+
+static const reloc_howto_type arm64_reloc_howto_pgoff12a = HOWTO (IMAGE_REL_ARM64_PAGEOFFSET_12A, 2, 4, 12, true, 10,
+ complain_overflow_dont,
+ coff_aarch64_po12a_reloc, "IMAGE_REL_ARM64_PAGEOFFSET_12A",
+ false, 0x3ffc00, 0x3ffc00, false);
+
+static const reloc_howto_type arm64_reloc_howto_32nb = HOWTO (IMAGE_REL_ARM64_ADDR32NB, 0, 4, 32, false, 0,
+ complain_overflow_bitfield,
+ coff_aarch64_addr32nb_reloc, "IMAGE_REL_ARM64_ADDR32NB",
+ false, 0xffffffff, 0xffffffff, false);
static const reloc_howto_type* const arm64_howto_table[] = {
+ &arm64_reloc_howto_abs,
&arm64_reloc_howto_64,
&arm64_reloc_howto_32,
&arm64_reloc_howto_32_pcrel,
&arm64_reloc_howto_branch26,
&arm64_reloc_howto_page21,
&arm64_reloc_howto_lo21,
- &arm64_reloc_howto_pgoff12,
- &arm64_reloc_howto_branch19
+ &arm64_reloc_howto_pgoff12l,
+ &arm64_reloc_howto_branch19,
+ &arm64_reloc_howto_branch14,
+ &arm64_reloc_howto_pgoff12a,
+ &arm64_reloc_howto_32nb
};
#ifndef NUM_ELEM
@@ -118,13 +355,23 @@ coff_aarch64_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, bfd_reloc_code_real
case BFD_RELOC_AARCH64_JUMP26:
return &arm64_reloc_howto_branch26;
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
+ case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
return &arm64_reloc_howto_page21;
+ case BFD_RELOC_AARCH64_TSTBR14:
+ return &arm64_reloc_howto_branch14;
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
return &arm64_reloc_howto_lo21;
+ case BFD_RELOC_AARCH64_ADD_LO12:
+ return &arm64_reloc_howto_pgoff12a;
+ case BFD_RELOC_AARCH64_LDST8_LO12:
case BFD_RELOC_AARCH64_LDST16_LO12:
- return &arm64_reloc_howto_pgoff12;
+ case BFD_RELOC_AARCH64_LDST32_LO12:
+ case BFD_RELOC_AARCH64_LDST64_LO12:
+ return &arm64_reloc_howto_pgoff12l;
case BFD_RELOC_AARCH64_BRANCH19:
return &arm64_reloc_howto_branch19;
+ case BFD_RELOC_RVA:
+ return &arm64_reloc_howto_32nb;
default:
BFD_FAIL ();
return NULL;
@@ -155,6 +402,8 @@ coff_aarch64_rtype_lookup (unsigned int code)
{
switch (code)
{
+ case IMAGE_REL_ARM64_ABSOLUTE:
+ return &arm64_reloc_howto_abs;
case IMAGE_REL_ARM64_ADDR64:
return &arm64_reloc_howto_64;
case IMAGE_REL_ARM64_ADDR32:
@@ -168,9 +417,15 @@ coff_aarch64_rtype_lookup (unsigned int code)
case IMAGE_REL_ARM64_REL21:
return &arm64_reloc_howto_lo21;
case IMAGE_REL_ARM64_PAGEOFFSET_12L:
- return &arm64_reloc_howto_pgoff12;
+ return &arm64_reloc_howto_pgoff12l;
case IMAGE_REL_ARM64_BRANCH19:
return &arm64_reloc_howto_branch19;
+ case IMAGE_REL_ARM64_BRANCH14:
+ return &arm64_reloc_howto_branch14;
+ case IMAGE_REL_ARM64_PAGEOFFSET_12A:
+ return &arm64_reloc_howto_pgoff12a;
+ case IMAGE_REL_ARM64_ADDR32NB:
+ return &arm64_reloc_howto_32nb;
default:
BFD_FAIL ();
return NULL;
@@ -188,6 +443,7 @@ coff_aarch64_rtype_lookup (unsigned int code)
#define bfd_pe_print_pdata NULL
#endif
+#ifdef COFF_WITH_PE
/* Return TRUE if this relocation should
appear in the output .reloc section. */
@@ -197,9 +453,376 @@ in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
{
return !howto->pc_relative;
}
+#endif
+
+static bool
+coff_pe_aarch64_relocate_section (bfd *output_bfd,
+ struct bfd_link_info *info,
+ bfd *input_bfd,
+ asection *input_section,
+ bfd_byte *contents,
+ struct internal_reloc *relocs,
+ struct internal_syment *syms,
+ asection **sections)
+{
+ struct internal_reloc *rel;
+ struct internal_reloc *relend;
+
+ if (bfd_link_relocatable (info))
+ return true;
+
+ rel = relocs;
+ relend = rel + input_section->reloc_count;
+
+ /* The addend for a relocation is stored in the immediate bits of each
+ opcode. So for each relocation, we need to extract the immediate value,
+ use this to calculate what it should be for the symbol, and rewrite the
+ opcode into the section stream. */
+
+ for (; rel < relend; rel++)
+ {
+ long symndx;
+ struct coff_link_hash_entry *h;
+ bfd_vma sym_value;
+ asection *sec = NULL;
+
+ /* skip trivial relocations */
+ if (rel->r_type == IMAGE_REL_ARM64_ADDR32
+ || rel->r_type == IMAGE_REL_ARM64_ADDR64
+ || rel->r_type == IMAGE_REL_ARM64_ABSOLUTE)
+ continue;
+
+ symndx = rel->r_symndx;
+ sym_value = syms[symndx].n_value;
+
+ h = obj_coff_sym_hashes (input_bfd)[symndx];
+
+ if (h && h->root.type == bfd_link_hash_defined)
+ {
+ sec = h->root.u.def.section;
+ sym_value = h->root.u.def.value;
+ }
+ else
+ {
+ sec = sections[symndx];
+ }
+
+ if (!sec)
+ continue;
+
+ if (bfd_is_und_section (sec))
+ continue;
+
+ if (bfd_is_abs_section (sec))
+ continue;
+
+ if (discarded_section (sec))
+ continue;
+
+ if (symndx < 0
+ || (unsigned long) symndx >= obj_raw_syment_count (input_bfd))
+ continue;
+
+ switch (rel->r_type)
+ {
+ case IMAGE_REL_ARM64_ADDR32NB:
+ {
+ uint64_t dest_vma, val;
+ int32_t addend;
+
+ addend = bfd_getl32 (contents + rel->r_vaddr);
+
+ dest_vma = sec->output_section->vma + sec->output_offset
+ + sym_value + addend;
+
+ val = dest_vma;
+ val -= pe_data (output_bfd)->pe_opthdr.ImageBase;
+
+ if (val > 0xffffffff)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_ADDR32NB", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ bfd_putl32 (val, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_BRANCH26:
+ {
+ uint64_t dest_vma, cur_vma;
+ uint32_t opcode;
+ int64_t addend, val;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = (opcode & 0x3ffffff) << 2;
+
+ if (addend & 0x8000000)
+ addend |= 0xfffffffff0000000;
+
+ dest_vma = sec->output_section->vma + sec->output_offset
+ + sym_value + addend;
+ cur_vma = input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_vaddr;
+
+ val = (dest_vma >> 2) - (cur_vma >> 2);
+
+ if (val > 0x1ffffff || val < -0x2000000)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_BRANCH26", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ opcode &= 0xfc000000;
+ opcode |= val & 0x3ffffff;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_BRANCH19:
+ {
+ uint64_t dest_vma, cur_vma;
+ uint32_t opcode;
+ int64_t addend, val;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = (opcode & 0xffffe0) >> 3;
+
+ if (addend & 0x100000)
+ addend |= 0xffffffffffe00000;
+
+ dest_vma = sec->output_section->vma + sec->output_offset
+ + sym_value + addend;
+ cur_vma = input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_vaddr;
+
+ val = (dest_vma >> 2) - (cur_vma >> 2);
+
+ if (val > 0x3ffff || val < -0x40000)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_BRANCH19", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ opcode &= 0xff00001f;
+ opcode |= (val & 0x7ffff) << 5;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_BRANCH14:
+ {
+ uint64_t dest_vma, cur_vma;
+ uint32_t opcode;
+ int64_t addend, val;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = (opcode & 0x7ffe0) >> 3;
+
+ if (addend & 0x8000)
+ addend |= 0xffffffffffff0000;
+
+ dest_vma = sec->output_section->vma + sec->output_offset
+ + sym_value + addend;
+ cur_vma = input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_vaddr;
+
+ val = (dest_vma >> 2) - (cur_vma >> 2);
+
+ if (val > 0x1fff || val < -0x2000)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_BRANCH14", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ opcode &= 0xfff8001f;
+ opcode |= (val & 0x3fff) << 5;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_PAGEBASE_REL21:
+ {
+ uint64_t dest_vma, cur_vma;
+ uint32_t opcode;
+ int64_t addend, val;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = ((opcode & 0xffffe0) >> 3)
+ | ((opcode & 0x60000000) >> 29);
+
+ if (addend & 0x100000)
+ addend |= 0xffffffffffe00000;
+
+ dest_vma = sec->output_section->vma + sec->output_offset
+ + sym_value + addend;
+ cur_vma = input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_vaddr;
+
+ val = (dest_vma >> 12) - (cur_vma >> 12);
+
+ if (val > 0xfffff || val < -0x100000)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_PAGEBASE_REL21", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ opcode &= 0x9f00001f;
+ opcode |= (val & 0x3) << 29;
+ opcode |= (val & 0x1ffffc) << 3;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_REL21:
+ {
+ uint64_t dest_vma, cur_vma;
+ uint32_t opcode;
+ int64_t addend, val;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = ((opcode & 0xffffe0) >> 3)
+ | ((opcode & 0x60000000) >> 29);
+
+ if (addend & 0x100000)
+ addend |= 0xffffffffffe00000;
+
+ dest_vma = sec->output_section->vma + sec->output_offset
+ + sym_value + addend;
+ cur_vma = input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_vaddr;
+
+ val = dest_vma - cur_vma;
+
+ if (val > 0xfffff || val < -0x100000)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_REL21", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ opcode &= 0x9f00001f;
+ opcode |= (val & 0x3) << 29;
+ opcode |= (val & 0x1ffffc) << 3;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_PAGEOFFSET_12L:
+ {
+ uint64_t dest_vma;
+ uint32_t opcode, val;
+ int32_t addend;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = (opcode & 0x3ffc00) >> 10;
+
+ /* top two bits represent how much addend should be shifted */
+ addend <<= opcode >> 30;
+
+ dest_vma = sec->output_section->vma + sec->output_offset
+ + sym_value + addend;
+
+ /* only interested in bottom 12 bits */
+ val = dest_vma & 0xfff;
+ val >>= opcode >> 30;
+
+ opcode &= 0xffc003ff;
+ opcode |= val << 10;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_PAGEOFFSET_12A:
+ {
+ uint64_t dest_vma;
+ uint32_t opcode, val;
+ int32_t addend;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = (opcode & 0x3ffc00) >> 10;
+
+ dest_vma = sec->output_section->vma + sec->output_offset
+ + sym_value + addend;
+
+ /* only interested in bottom 12 bits */
+ val = dest_vma & 0xfff;
+
+ opcode &= 0xffc003ff;
+ opcode |= val << 10;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ default:
+ info->callbacks->einfo (_("%F%P: Unhandled relocation type %u\n"),
+ rel->r_type);
+ BFD_FAIL ();
+ return false;
+ }
+ }
+
+ return _bfd_coff_generic_relocate_section (output_bfd, info, input_bfd,
+ input_section, contents,
+ relocs, syms, sections);
+}
+
+#define coff_relocate_section coff_pe_aarch64_relocate_section
#include "coffcode.h"
+/* Prevent assertion in md_apply_fix by forcing use_rela_p on for new
+ sections. */
+static bool
+coff_aarch64_new_section_hook (bfd *abfd, asection *section)
+{
+ if (!coff_new_section_hook (abfd, section))
+ return false;
+
+ section->use_rela_p = 1;
+
+ return true;
+}
+
+#define coff_aarch64_close_and_cleanup coff_close_and_cleanup
+#define coff_aarch64_bfd_free_cached_info coff_bfd_free_cached_info
+#define coff_aarch64_get_section_contents coff_get_section_contents
+#define coff_aarch64_get_section_contents_in_window coff_get_section_contents_in_window
+
/* Target vectors. */
const bfd_target
#ifdef TARGET_SYM
@@ -266,7 +889,7 @@ const bfd_target
_bfd_bool_bfd_false_error
},
- BFD_JUMP_TABLE_GENERIC (coff),
+ BFD_JUMP_TABLE_GENERIC (coff_aarch64),
BFD_JUMP_TABLE_COPY (coff),
BFD_JUMP_TABLE_CORE (_bfd_nocore),
BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 0bc27fdce97..92a6cff938b 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1495,12 +1495,6 @@ case "${targ}" in
;;
esac
-if test x"$targ_defvec" = x"aarch64-pe"; then
- # Not currently complete (and probably not stable), warn user
- echo "*** WARNING BFD aarch64-pe support not complete nor stable"
- echo "*** Do not rely on this for production purposes"
-fi
-
# All MIPS ELF targets need a 64-bit bfd_vma.
case "${targ_defvec} ${targ_selvecs}" in
*mips_elf*)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index c679d930e88..a50cdb019e6 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -1889,10 +1889,9 @@ s_ltorg (int ignored ATTRIBUTE_UNUSED)
}
}
-#ifdef OBJ_ELF
+#if defined(OBJ_ELF) || defined(OBJ_COFF)
/* Forward declarations for functions below, in the MD interface
section. */
-static fixS *fix_new_aarch64 (fragS *, int, short, expressionS *, int, int);
static struct reloc_table_entry * find_reloc_table_entry (char **);
/* Directives: Data. */
@@ -1900,7 +1899,7 @@ static struct reloc_table_entry * find_reloc_table_entry (char **);
implemented properly. */
static void
-s_aarch64_elf_cons (int nbytes)
+s_aarch64_cons (int nbytes)
{
expressionS exp;
@@ -1950,6 +1949,12 @@ s_aarch64_elf_cons (int nbytes)
input_line_pointer--;
demand_empty_rest_of_line ();
}
+#endif
+
+#ifdef OBJ_ELF
+/* Forward declarations for functions below, in the MD interface
+ section. */
+ static fixS *fix_new_aarch64 (fragS *, int, short, expressionS *, int, int);
/* Mark symbol that it follows a variant PCS convention. */
@@ -2119,11 +2124,13 @@ const pseudo_typeS md_pseudo_table[] = {
{"tlsdescadd", s_tlsdescadd, 0},
{"tlsdesccall", s_tlsdesccall, 0},
{"tlsdescldr", s_tlsdescldr, 0},
- {"word", s_aarch64_elf_cons, 4},
- {"long", s_aarch64_elf_cons, 4},
- {"xword", s_aarch64_elf_cons, 8},
- {"dword", s_aarch64_elf_cons, 8},
{"variant_pcs", s_variant_pcs, 0},
+#endif
+#if defined(OBJ_ELF) || defined(OBJ_COFF)
+ {"word", s_aarch64_cons, 4},
+ {"long", s_aarch64_cons, 4},
+ {"xword", s_aarch64_cons, 8},
+ {"dword", s_aarch64_cons, 8},
#endif
{"float16", float_cons, 'h'},
{"bfloat16", float_cons, 'b'},
@@ -9260,6 +9267,9 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
/* An error will already have been reported. */
break;
+ case BFD_RELOC_RVA:
+ break;
+
default:
as_bad_where (fixP->fx_file, fixP->fx_line,
_("unexpected %s fixup"),
diff --git a/gas/testsuite/gas/pe/pe-aarch64.d b/gas/testsuite/gas/pe/pe-aarch64.d
index 0b8009da5c4..cd9529af8e2 100644
--- a/gas/testsuite/gas/pe/pe-aarch64.d
+++ b/gas/testsuite/gas/pe/pe-aarch64.d
@@ -1,14 +1,218 @@
#as:
-#objdump: -d
+#objdump: -dr
.*: file format pe-aarch64-little
Disassembly of section .text:
-0000000000000000 <_start>:
- 0: d2800281 mov x1, #0x14 // #20
- 4: 14000001 b 8 <foo>
+0000000000000000 <.text>:
+ ...
0000000000000008 <foo>:
- 8: d65f03c0 ret
+ 8: 12345678 and w24, w19, #0xfffff003
+ c: 12345678 and w24, w19, #0xfffff003
+ 10: 00000008 udf #8
+ 10: IMAGE_REL_ARM64_ADDR32 .text
+ 14: 00000008 udf #8
+ 14: IMAGE_REL_ARM64_ADDR32 .text
+ ...
+ 18: IMAGE_REL_ARM64_ADDR32 bar
+ 1c: IMAGE_REL_ARM64_ADDR32 bar
+ 20: 00000009 udf #9
+ 20: IMAGE_REL_ARM64_ADDR32 .text
+ 24: 00000009 udf #9
+ 24: IMAGE_REL_ARM64_ADDR32 .text
+ 28: 00000001 udf #1
+ 28: IMAGE_REL_ARM64_ADDR32 bar
+ 2c: 00000001 udf #1
+ 2c: IMAGE_REL_ARM64_ADDR32 bar
+ 30: 00000007 udf #7
+ 30: IMAGE_REL_ARM64_ADDR32 .text
+ 34: 00000007 udf #7
+ 34: IMAGE_REL_ARM64_ADDR32 .text
+ 38: ffffffff .inst 0xffffffff ; undefined
+ 38: IMAGE_REL_ARM64_ADDR32 bar
+ 3c: ffffffff .inst 0xffffffff ; undefined
+ 3c: IMAGE_REL_ARM64_ADDR32 bar
+ 40: 9abcdef0 .inst 0x9abcdef0 ; undefined
+ 44: 12345678 and w24, w19, #0xfffff003
+ 48: 9abcdef0 .inst 0x9abcdef0 ; undefined
+ 4c: 12345678 and w24, w19, #0xfffff003
+ 50: 00000008 udf #8
+ 50: IMAGE_REL_ARM64_ADDR64 .text
+ 54: 00000000 udf #0
+ 58: 00000008 udf #8
+ 58: IMAGE_REL_ARM64_ADDR64 .text
+ ...
+ 60: IMAGE_REL_ARM64_ADDR64 bar
+ 68: IMAGE_REL_ARM64_ADDR64 bar
+ 70: 00000009 udf #9
+ 70: IMAGE_REL_ARM64_ADDR64 .text
+ 74: 00000000 udf #0
+ 78: 00000009 udf #9
+ 78: IMAGE_REL_ARM64_ADDR64 .text
+ 7c: 00000000 udf #0
+ 80: 00000001 udf #1
+ 80: IMAGE_REL_ARM64_ADDR64 bar
+ 84: 00000000 udf #0
+ 88: 00000001 udf #1
+ 88: IMAGE_REL_ARM64_ADDR64 bar
+ 8c: 00000000 udf #0
+ 90: 00000007 udf #7
+ 90: IMAGE_REL_ARM64_ADDR64 .text
+ 94: 00000000 udf #0
+ 98: 00000007 udf #7
+ 98: IMAGE_REL_ARM64_ADDR64 .text
+ 9c: 00000000 udf #0
+ a0: ffffffff .inst 0xffffffff ; undefined
+ a0: IMAGE_REL_ARM64_ADDR64 bar
+ a4: ffffffff .inst 0xffffffff ; undefined
+ a8: ffffffff .inst 0xffffffff ; undefined
+ a8: IMAGE_REL_ARM64_ADDR64 bar
+ ac: ffffffff .inst 0xffffffff ; undefined
+ b0: 00000008 udf #8
+ b0: IMAGE_REL_ARM64_ADDR32NB .text
+ b4: 00000000 udf #0
+ b4: IMAGE_REL_ARM64_ADDR32NB bar
+ b8: 00000009 udf #9
+ b8: IMAGE_REL_ARM64_ADDR32NB .text
+ bc: 00000001 udf #1
+ bc: IMAGE_REL_ARM64_ADDR32NB bar
+ c0: 00000007 udf #7
+ c0: IMAGE_REL_ARM64_ADDR32NB .text
+ c4: ffffffff .inst 0xffffffff ; undefined
+ c4: IMAGE_REL_ARM64_ADDR32NB bar
+ c8: 17ffffd0 b 8 <foo>
+ cc: 17ffffd0 b c <foo\+0x4>
+ d0: 17ffffcd b 4 <.text\+0x4>
+ d4: 14000000 b 0 <bar>
+ d4: IMAGE_REL_ARM64_BRANCH26 bar
+ d8: 14000001 b 4 <bar\+0x4>
+ d8: IMAGE_REL_ARM64_BRANCH26 bar
+ dc: 17ffffff b fffffffffffffffc <bar\+0xfffffffffffffffc>
+ dc: IMAGE_REL_ARM64_BRANCH26 bar
+ e0: 97ffffca bl 8 <foo>
+ e4: 97ffffca bl c <foo\+0x4>
+ e8: 97ffffc7 bl 4 <.text\+0x4>
+ ec: 94000000 bl 0 <bar>
+ ec: IMAGE_REL_ARM64_BRANCH26 bar
+ f0: 94000001 bl 4 <bar\+0x4>
+ f0: IMAGE_REL_ARM64_BRANCH26 bar
+ f4: 97ffffff bl fffffffffffffffc <bar\+0xfffffffffffffffc>
+ f4: IMAGE_REL_ARM64_BRANCH26 bar
+ f8: 97ffffc1 bl fffffffffffffffc <foo\+0xfffffffffffffff4>
+ fc: b4fff860 cbz x0, 8 <foo>
+ 100: b4fff860 cbz x0, c <foo\+0x4>
+ 104: b4fff800 cbz x0, 4 <.text\+0x4>
+ 108: b4000000 cbz x0, 0 <bar>
+ 108: IMAGE_REL_ARM64_BRANCH19 bar
+ 10c: b4000020 cbz x0, 4 <bar\+0x4>
+ 10c: IMAGE_REL_ARM64_BRANCH19 bar
+ 110: b4ffffe0 cbz x0, fffffffffffffffc <bar\+0xfffffffffffffffc>
+ 110: IMAGE_REL_ARM64_BRANCH19 bar
+ 114: b4fff740 cbz x0, fffffffffffffffc <foo\+0xfffffffffffffff4>
+ 118: 3607f780 tbz w0, #0, 8 <foo>
+ 11c: 3607f780 tbz w0, #0, c <foo\+0x4>
+ 120: 3607f720 tbz w0, #0, 4 <.text\+0x4>
+ 124: 36000000 tbz w0, #0, 0 <bar>
+ 124: IMAGE_REL_ARM64_BRANCH14 bar
+ 128: 36000020 tbz w0, #0, 4 <bar\+0x4>
+ 128: IMAGE_REL_ARM64_BRANCH14 bar
+ 12c: 3607ffe0 tbz w0, #0, fffffffffffffffc <bar\+0xfffffffffffffffc>
+ 12c: IMAGE_REL_ARM64_BRANCH14 bar
+ 130: 3607f660 tbz w0, #0, fffffffffffffffc <foo\+0xfffffffffffffff4>
+ 134: 90000040 adrp x0, 8000 <foo\+0x7ff8>
+ 134: IMAGE_REL_ARM64_PAGEBASE_REL21 .text
+ 138: b0000040 adrp x0, 9000 <foo\+0x8ff8>
+ 138: IMAGE_REL_ARM64_PAGEBASE_REL21 .text
+ 13c: f0000020 adrp x0, 7000 <foo\+0x6ff8>
+ 13c: IMAGE_REL_ARM64_PAGEBASE_REL21 .text
+ 140: 90000000 adrp x0, 0 <bar>
+ 140: IMAGE_REL_ARM64_PAGEBASE_REL21 bar
+ 144: b0000000 adrp x0, 1000 <bar\+0x1000>
+ 144: IMAGE_REL_ARM64_PAGEBASE_REL21 bar
+ 148: f0ffffe0 adrp x0, fffffffffffff000 <bar\+0xfffffffffffff000>
+ 148: IMAGE_REL_ARM64_PAGEBASE_REL21 bar
+ 14c: 90ffffe0 adrp x0, ffffffffffffc000 <foo\+0xffffffffffffbff8>
+ 14c: IMAGE_REL_ARM64_PAGEBASE_REL21 .text
+ 150: 10fff5c0 adr x0, 8 <foo>
+ 154: 30fff5a0 adr x0, 9 <foo\+0x1>
+ 158: 70fff560 adr x0, 7 <.text\+0x7>
+ 15c: 10000000 adr x0, 0 <bar>
+ 15c: IMAGE_REL_ARM64_REL21 bar
+ 160: 30000000 adr x0, 1 <bar\+0x1>
+ 160: IMAGE_REL_ARM64_REL21 bar
+ 164: 70ffffe0 adr x0, ffffffffffffffff <bar\+0xffffffffffffffff>
+ 164: IMAGE_REL_ARM64_REL21 bar
+ 168: 70fff4a0 adr x0, ffffffffffffffff <foo\+0xfffffffffffffff7>
+ 16c: 39002000 strb w0, \[x0, #8\]
+ 16c: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 170: 39003000 strb w0, \[x0, #12\]
+ 170: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 174: 39001000 strb w0, \[x0, #4\]
+ 174: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 178: 39000000 strb w0, \[x0\]
+ 178: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 17c: 39001000 strb w0, \[x0, #4\]
+ 17c: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 180: 393ff000 strb w0, \[x0, #4092\]
+ 180: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 184: 393ff000 strb w0, \[x0, #4092\]
+ 184: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 188: 79001000 strh w0, \[x0, #8\]
+ 188: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 18c: 79001800 strh w0, \[x0, #12\]
+ 18c: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 190: 79000800 strh w0, \[x0, #4\]
+ 190: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 194: 79000000 strh w0, \[x0\]
+ 194: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 198: 79000800 strh w0, \[x0, #4\]
+ 198: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 19c: 791ff800 strh w0, \[x0, #4092\]
+ 19c: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1a0: 791ff800 strh w0, \[x0, #4092\]
+ 1a0: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1a4: b9000800 str w0, \[x0, #8\]
+ 1a4: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1a8: b9000c00 str w0, \[x0, #12\]
+ 1a8: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1ac: b9000400 str w0, \[x0, #4\]
+ 1ac: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1b0: b9000000 str w0, \[x0\]
+ 1b0: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1b4: b9000400 str w0, \[x0, #4\]
+ 1b4: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1b8: b90ffc00 str w0, \[x0, #4092\]
+ 1b8: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1bc: b90ffc00 str w0, \[x0, #4092\]
+ 1bc: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1c0: f9000400 str x0, \[x0, #8\]
+ 1c0: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1c4: f9000800 str x0, \[x0, #16\]
+ 1c4: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1c8: f9000000 str x0, \[x0\]
+ 1c8: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1cc: f9000000 str x0, \[x0\]
+ 1cc: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1d0: f9000400 str x0, \[x0, #8\]
+ 1d0: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1d4: f907fc00 str x0, \[x0, #4088\]
+ 1d4: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1d8: f907fc00 str x0, \[x0, #4088\]
+ 1d8: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1dc: 91002000 add x0, x0, #0x8
+ 1dc: IMAGE_REL_ARM64_PAGEOFFSET_12A .text
+ 1e0: 91002400 add x0, x0, #0x9
+ 1e0: IMAGE_REL_ARM64_PAGEOFFSET_12A .text
+ 1e4: 91001c00 add x0, x0, #0x7
+ 1e4: IMAGE_REL_ARM64_PAGEOFFSET_12A .text
+ 1e8: 91000000 add x0, x0, #0x0
+ 1e8: IMAGE_REL_ARM64_PAGEOFFSET_12A bar
+ 1ec: 91000400 add x0, x0, #0x1
+ 1ec: IMAGE_REL_ARM64_PAGEOFFSET_12A bar
+ 1f0: 913ffc00 add x0, x0, #0xfff
+ 1f0: IMAGE_REL_ARM64_PAGEOFFSET_12A bar
+ 1f4: 913ffc00 add x0, x0, #0xfff
+ 1f4: IMAGE_REL_ARM64_PAGEOFFSET_12A .text
diff --git a/gas/testsuite/gas/pe/pe-aarch64.s b/gas/testsuite/gas/pe/pe-aarch64.s
index 546d55fc361..62f223fe8e2 100644
--- a/gas/testsuite/gas/pe/pe-aarch64.s
+++ b/gas/testsuite/gas/pe/pe-aarch64.s
@@ -1,11 +1,147 @@
-# A little test to ensure pe-aarch64 is working in GAS.
-# Currently, the poor pe-aarch64 implementation in binutils
-# couldn't do anything useful, hence, this test is rather short
+.text
-.section .text
+.dword 0
-_start:
- mov x1, 20
- b foo
foo:
- ret
+
+# 4-byte literal
+.long 0x12345678
+.word 0x12345678
+
+# IMAGE_REL_ARM64_ADDR32 (BFD_RELOC_32)
+.long foo
+.word foo
+.long bar
+.word bar
+.long foo + 1
+.word foo + 1
+.long bar + 1
+.word bar + 1
+.long foo - 1
+.word foo - 1
+.long bar - 1
+.word bar - 1
+
+# 8-byte literal
+.dword 0x123456789abcdef0
+.xword 0x123456789abcdef0
+
+# IMAGE_REL_ARM64_ADDR64 (BFD_RELOC_64)
+.dword foo
+.xword foo
+.dword bar
+.xword bar
+.dword foo + 1
+.xword foo + 1
+.dword bar + 1
+.xword bar + 1
+.dword foo - 1
+.xword foo - 1
+.dword bar - 1
+.xword bar - 1
+
+# IMAGE_REL_ARM64_ADDR32NB (BFD_RELOC_RVA)
+.rva foo
+.rva bar
+.rva foo + 1
+.rva bar + 1
+.rva foo - 1
+.rva bar - 1
+
+# IMAGE_REL_ARM64_BRANCH26 (BFD_RELOC_AARCH64_JUMP26)
+b foo
+b foo + 4
+b foo - 4
+b bar
+b bar + 4
+b bar - 4
+
+# IMAGE_REL_ARM64_BRANCH26 (BFD_RELOC_AARCH64_CALL26)
+bl foo
+bl foo + 4
+bl foo - 4
+bl bar
+bl bar + 4
+bl bar - 4
+bl .text - 4
+
+# IMAGE_REL_ARM64_BRANCH19 (BFD_RELOC_AARCH64_BRANCH19)
+cbz x0, foo
+cbz x0, foo + 4
+cbz x0, foo - 4
+cbz x0, bar
+cbz x0, bar + 4
+cbz x0, bar - 4
+cbz x0, .text - 4
+
+# IMAGE_REL_ARM64_BRANCH14 (BFD_RELOC_AARCH64_TSTBR14)
+tbz x0, 0, foo
+tbz x0, 0, foo + 4
+tbz x0, 0, foo - 4
+tbz x0, 0, bar
+tbz x0, 0, bar + 4
+tbz x0, 0, bar - 4
+tbz x0, 0, .text - 4
+
+# IMAGE_REL_ARM64_PAGEBASE_REL21 (BFD_RELOC_AARCH64_ADR_HI21_PCREL)
+adrp x0, foo
+adrp x0, foo + 1
+adrp x0, foo - 1
+adrp x0, bar
+adrp x0, bar + 1
+adrp x0, bar - 1
+adrp x0, .text - 4
+
+# IMAGE_REL_ARM64_REL21 (BFD_RELOC_AARCH64_ADR_LO21_PCREL)
+adr x0, foo
+adr x0, foo + 1
+adr x0, foo - 1
+adr x0, bar
+adr x0, bar + 1
+adr x0, bar - 1
+adr x0, .text - 1
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST8_LO12)
+strb w0, [x0,:lo12:foo]
+strb w0, [x0,:lo12:foo + 4]
+strb w0, [x0,:lo12:foo - 4]
+strb w0, [x0,:lo12:bar]
+strb w0, [x0,:lo12:bar + 4]
+strb w0, [x0,:lo12:bar - 4]
+strb w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST16_LO12)
+strh w0, [x0,:lo12:foo]
+strh w0, [x0,:lo12:foo + 4]
+strh w0, [x0,:lo12:foo - 4]
+strh w0, [x0,:lo12:bar]
+strh w0, [x0,:lo12:bar + 4]
+strh w0, [x0,:lo12:bar - 4]
+strh w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST32_LO12)
+str w0, [x0,:lo12:foo]
+str w0, [x0,:lo12:foo + 4]
+str w0, [x0,:lo12:foo - 4]
+str w0, [x0,:lo12:bar]
+str w0, [x0,:lo12:bar + 4]
+str w0, [x0,:lo12:bar - 4]
+str w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST64_LO12)
+str x0, [x0,:lo12:foo]
+str x0, [x0,:lo12:foo + 8]
+str x0, [x0,:lo12:foo - 8]
+str x0, [x0,:lo12:bar]
+str x0, [x0,:lo12:bar + 8]
+str x0, [x0,:lo12:bar - 8]
+str x0, [x0,:lo12:.text - 8]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12A (BFD_RELOC_AARCH64_ADD_LO12)
+add x0, x0, #:lo12:foo
+add x0, x0, #:lo12:foo + 1
+add x0, x0, #:lo12:foo - 1
+add x0, x0, #:lo12:bar
+add x0, x0, #:lo12:bar + 1
+add x0, x0, #:lo12:bar - 1
+add x0, x0, #:lo12:.text - 1
diff --git a/ld/testsuite/ld-pe/aarch64.d b/ld/testsuite/ld-pe/aarch64.d
new file mode 100644
index 00000000000..604e614e0ea
--- /dev/null
+++ b/ld/testsuite/ld-pe/aarch64.d
@@ -0,0 +1,148 @@
+
+tmpdir/aarch64.x: file format pei-aarch64-little
+
+
+Disassembly of section .text:
+
+0000000000002000 <__rt_psrelocs_end>:
+ ...
+
+0000000000002008 <foo>:
+ 2008: 12345678 and w24, w19, #0xfffff003
+ 200c: 12345678 and w24, w19, #0xfffff003
+ 2010: 00002000 udf #8192
+ 2014: 00002000 udf #8192
+ 2018: 000021f8 udf #8696
+ 201c: 000021f8 udf #8696
+ 2020: 00002001 udf #8193
+ 2024: 00002001 udf #8193
+ 2028: 000021f9 udf #8697
+ 202c: 000021f9 udf #8697
+ 2030: 00001fff udf #8191
+ 2034: 00001fff udf #8191
+ 2038: 000021f7 udf #8695
+ 203c: 000021f7 udf #8695
+ 2040: 9abcdef0 .inst 0x9abcdef0 ; undefined
+ 2044: 12345678 and w24, w19, #0xfffff003
+ 2048: 9abcdef0 .inst 0x9abcdef0 ; undefined
+ 204c: 12345678 and w24, w19, #0xfffff003
+ 2050: 00002000 udf #8192
+ 2054: 00000000 udf #0
+ 2058: 00002000 udf #8192
+ 205c: 00000000 udf #0
+ 2060: 000021f8 udf #8696
+ 2064: 00000000 udf #0
+ 2068: 000021f8 udf #8696
+ 206c: 00000000 udf #0
+ 2070: 00002001 udf #8193
+ 2074: 00000000 udf #0
+ 2078: 00002001 udf #8193
+ 207c: 00000000 udf #0
+ 2080: 000021f9 udf #8697
+ 2084: 00000000 udf #0
+ 2088: 000021f9 udf #8697
+ 208c: 00000000 udf #0
+ 2090: 00001fff udf #8191
+ 2094: 00000000 udf #0
+ 2098: 00001fff udf #8191
+ 209c: 00000000 udf #0
+ 20a0: 000021f7 udf #8695
+ 20a4: 00000000 udf #0
+ 20a8: 000021f7 udf #8695
+ 20ac: 00000000 udf #0
+ 20b0: 00001008 udf #4104
+ 20b4: 000011f8 udf #4600
+ 20b8: 00001009 udf #4105
+ 20bc: 000011f9 udf #4601
+ 20c0: 00001007 udf #4103
+ 20c4: 000011f7 udf #4599
+ 20c8: 17ffffd0 b 2008 <foo>
+ 20cc: 17ffffd0 b 200c <foo\+0x4>
+ 20d0: 17ffffcd b 2004 <__rt_psrelocs_end\+0x4>
+ 20d4: 14000049 b 21f8 <bar>
+ 20d8: 14000049 b 21fc <bar\+0x4>
+ 20dc: 14000046 b 21f4 <foo\+0x1ec>
+ 20e0: 97ffffca bl 2008 <foo>
+ 20e4: 97ffffca bl 200c <foo\+0x4>
+ 20e8: 97ffffc7 bl 2004 <__rt_psrelocs_end\+0x4>
+ 20ec: 94000043 bl 21f8 <bar>
+ 20f0: 94000043 bl 21fc <bar\+0x4>
+ 20f4: 94000040 bl 21f4 <foo\+0x1ec>
+ 20f8: 97ffffc1 bl 1ffc <__ImageBase\+0xffc>
+ 20fc: b4fff860 cbz x0, 2008 <foo>
+ 2100: b4fff860 cbz x0, 200c <foo\+0x4>
+ 2104: b4fff800 cbz x0, 2004 <__rt_psrelocs_end\+0x4>
+ 2108: b4000780 cbz x0, 21f8 <bar>
+ 210c: b4000780 cbz x0, 21fc <bar\+0x4>
+ 2110: b4000720 cbz x0, 21f4 <foo\+0x1ec>
+ 2114: b4fff740 cbz x0, 1ffc <__ImageBase\+0xffc>
+ 2118: 3607f780 tbz w0, #0, 2008 <foo>
+ 211c: 3607f780 tbz w0, #0, 200c <foo\+0x4>
+ 2120: 3607f720 tbz w0, #0, 2004 <__rt_psrelocs_end\+0x4>
+ 2124: 360006a0 tbz w0, #0, 21f8 <bar>
+ 2128: 360006a0 tbz w0, #0, 21fc <bar\+0x4>
+ 212c: 36000640 tbz w0, #0, 21f4 <foo\+0x1ec>
+ 2130: 3607f660 tbz w0, #0, 1ffc <__ImageBase\+0xffc>
+ 2134: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 2138: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 213c: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 2140: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 2144: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 2148: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 214c: f0ffffe0 adrp x0, 1000 <__ImageBase>
+ 2150: 10fff5c0 adr x0, 2008 <foo>
+ 2154: 30fff5a0 adr x0, 2009 <foo\+0x1>
+ 2158: 70fff560 adr x0, 2007 <__rt_psrelocs_end\+0x7>
+ 215c: 100004e0 adr x0, 21f8 <bar>
+ 2160: 300004c0 adr x0, 21f9 <bar\+0x1>
+ 2164: 70000480 adr x0, 21f7 <foo\+0x1ef>
+ 2168: 70fff4a0 adr x0, 1fff <__ImageBase\+0xfff>
+ 216c: 39002000 strb w0, \[x0, #8\]
+ 2170: 39003000 strb w0, \[x0, #12\]
+ 2174: 39001000 strb w0, \[x0, #4\]
+ 2178: 3907e000 strb w0, \[x0, #504\]
+ 217c: 3907f000 strb w0, \[x0, #508\]
+ 2180: 3907d000 strb w0, \[x0, #500\]
+ 2184: 393ff000 strb w0, \[x0, #4092\]
+ 2188: 79001000 strh w0, \[x0, #8\]
+ 218c: 79001800 strh w0, \[x0, #12\]
+ 2190: 79000800 strh w0, \[x0, #4\]
+ 2194: 7903f000 strh w0, \[x0, #504\]
+ 2198: 7903f800 strh w0, \[x0, #508\]
+ 219c: 7903e800 strh w0, \[x0, #500\]
+ 21a0: 791ff800 strh w0, \[x0, #4092\]
+ 21a4: b9000800 str w0, \[x0, #8\]
+ 21a8: b9000c00 str w0, \[x0, #12\]
+ 21ac: b9000400 str w0, \[x0, #4\]
+ 21b0: b901f800 str w0, \[x0, #504\]
+ 21b4: b901fc00 str w0, \[x0, #508\]
+ 21b8: b901f400 str w0, \[x0, #500\]
+ 21bc: b90ffc00 str w0, \[x0, #4092\]
+ 21c0: f9000400 str x0, \[x0, #8\]
+ 21c4: f9000800 str x0, \[x0, #16\]
+ 21c8: f9000000 str x0, \[x0\]
+ 21cc: f900fc00 str x0, \[x0, #504\]
+ 21d0: f9010000 str x0, \[x0, #512\]
+ 21d4: f900f800 str x0, \[x0, #496\]
+ 21d8: f907fc00 str x0, \[x0, #4088\]
+ 21dc: 91002000 add x0, x0, #0x8
+ 21e0: 91002400 add x0, x0, #0x9
+ 21e4: 91001c00 add x0, x0, #0x7
+ 21e8: 9107e000 add x0, x0, #0x1f8
+ 21ec: 9107e400 add x0, x0, #0x1f9
+ 21f0: 9107dc00 add x0, x0, #0x1f7
+ 21f4: 913ffc00 add x0, x0, #0xfff
+
+00000000000021f8 <bar>:
+ 21f8: 9abcdef0 .inst 0x9abcdef0 ; undefined
+ 21fc: 12345678 and w24, w19, #0xfffff003
+
+0000000000002200 <__CTOR_LIST__>:
+ 2200: ffffffff .inst 0xffffffff ; undefined
+ 2204: ffffffff .inst 0xffffffff ; undefined
+ ...
+
+0000000000002210 <__DTOR_LIST__>:
+ 2210: ffffffff .inst 0xffffffff ; undefined
+ 2214: ffffffff .inst 0xffffffff ; undefined
+ ...
diff --git a/ld/testsuite/ld-pe/aarch64a.s b/ld/testsuite/ld-pe/aarch64a.s
new file mode 100644
index 00000000000..e7ecabba64b
--- /dev/null
+++ b/ld/testsuite/ld-pe/aarch64a.s
@@ -0,0 +1,149 @@
+.text
+
+.dword 0
+
+# 2008
+.global foo
+foo:
+
+# 4-byte literal
+.long 0x12345678
+.word 0x12345678
+
+# IMAGE_REL_ARM64_ADDR32 (BFD_RELOC_32)
+.long foo
+.word foo
+.long bar
+.word bar
+.long foo + 1
+.word foo + 1
+.long bar + 1
+.word bar + 1
+.long foo - 1
+.word foo - 1
+.long bar - 1
+.word bar - 1
+
+# 8-byte literal
+.dword 0x123456789abcdef0
+.xword 0x123456789abcdef0
+
+# IMAGE_REL_ARM64_ADDR64 (BFD_RELOC_64)
+.dword foo
+.xword foo
+.dword bar
+.xword bar
+.dword foo + 1
+.xword foo + 1
+.dword bar + 1
+.xword bar + 1
+.dword foo - 1
+.xword foo - 1
+.dword bar - 1
+.xword bar - 1
+
+# IMAGE_REL_ARM64_ADDR32NB (BFD_RELOC_RVA)
+.rva foo
+.rva bar
+.rva foo + 1
+.rva bar + 1
+.rva foo - 1
+.rva bar - 1
+
+# IMAGE_REL_ARM64_BRANCH26 (BFD_RELOC_AARCH64_JUMP26)
+b foo
+b foo + 4
+b foo - 4
+b bar
+b bar + 4
+b bar - 4
+
+# IMAGE_REL_ARM64_BRANCH26 (BFD_RELOC_AARCH64_CALL26)
+bl foo
+bl foo + 4
+bl foo - 4
+bl bar
+bl bar + 4
+bl bar - 4
+bl .text - 4
+
+# IMAGE_REL_ARM64_BRANCH19 (BFD_RELOC_AARCH64_BRANCH19)
+cbz x0, foo
+cbz x0, foo + 4
+cbz x0, foo - 4
+cbz x0, bar
+cbz x0, bar + 4
+cbz x0, bar - 4
+cbz x0, .text - 4
+
+# IMAGE_REL_ARM64_BRANCH14 (BFD_RELOC_AARCH64_TSTBR14)
+tbz x0, 0, foo
+tbz x0, 0, foo + 4
+tbz x0, 0, foo - 4
+tbz x0, 0, bar
+tbz x0, 0, bar + 4
+tbz x0, 0, bar - 4
+tbz x0, 0, .text - 4
+
+# IMAGE_REL_ARM64_PAGEBASE_REL21 (BFD_RELOC_AARCH64_ADR_HI21_PCREL)
+adrp x0, foo
+adrp x0, foo + 1
+adrp x0, foo - 1
+adrp x0, bar
+adrp x0, bar + 1
+adrp x0, bar - 1
+adrp x0, .text - 4
+
+# IMAGE_REL_ARM64_REL21 (BFD_RELOC_AARCH64_ADR_LO21_PCREL)
+adr x0, foo
+adr x0, foo + 1
+adr x0, foo - 1
+adr x0, bar
+adr x0, bar + 1
+adr x0, bar - 1
+adr x0, .text - 1
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST8_LO12)
+strb w0, [x0,:lo12:foo]
+strb w0, [x0,:lo12:foo + 4]
+strb w0, [x0,:lo12:foo - 4]
+strb w0, [x0,:lo12:bar]
+strb w0, [x0,:lo12:bar + 4]
+strb w0, [x0,:lo12:bar - 4]
+strb w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST16_LO12)
+strh w0, [x0,:lo12:foo]
+strh w0, [x0,:lo12:foo + 4]
+strh w0, [x0,:lo12:foo - 4]
+strh w0, [x0,:lo12:bar]
+strh w0, [x0,:lo12:bar + 4]
+strh w0, [x0,:lo12:bar - 4]
+strh w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST32_LO12)
+str w0, [x0,:lo12:foo]
+str w0, [x0,:lo12:foo + 4]
+str w0, [x0,:lo12:foo - 4]
+str w0, [x0,:lo12:bar]
+str w0, [x0,:lo12:bar + 4]
+str w0, [x0,:lo12:bar - 4]
+str w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST64_LO12)
+str x0, [x0,:lo12:foo]
+str x0, [x0,:lo12:foo + 8]
+str x0, [x0,:lo12:foo - 8]
+str x0, [x0,:lo12:bar]
+str x0, [x0,:lo12:bar + 8]
+str x0, [x0,:lo12:bar - 8]
+str x0, [x0,:lo12:.text - 8]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12A (BFD_RELOC_AARCH64_ADD_LO12)
+add x0, x0, #:lo12:foo
+add x0, x0, #:lo12:foo + 1
+add x0, x0, #:lo12:foo - 1
+add x0, x0, #:lo12:bar
+add x0, x0, #:lo12:bar + 1
+add x0, x0, #:lo12:bar - 1
+add x0, x0, #:lo12:.text - 1
diff --git a/ld/testsuite/ld-pe/aarch64b.s b/ld/testsuite/ld-pe/aarch64b.s
new file mode 100644
index 00000000000..9f0bdde758f
--- /dev/null
+++ b/ld/testsuite/ld-pe/aarch64b.s
@@ -0,0 +1,6 @@
+.text
+
+# 21f8
+.global bar
+bar:
+.dword 0x123456789abcdef0
diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp
index d8595ee61e8..80019a48778 100644
--- a/ld/testsuite/ld-pe/pe.exp
+++ b/ld/testsuite/ld-pe/pe.exp
@@ -79,9 +79,15 @@ if {[istarget i*86-*-cygwin*]
}
if {[istarget "aarch64-*-pe*"]} {
- run_dump_test "pe-aarch64"
-}
+ run_dump_test "pe-aarch64"
+
+ set pe_tests {
+ {"aarch64" "--image-base 0x1000" "" "" {aarch64a.s aarch64b.s}
+ {{objdump -dr aarch64.d}} "aarch64.x"}
+ }
+ run_ld_link_tests $pe_tests
+}
run_dump_test "image_size"
run_dump_test "export_dynamic_warning"
--
2.37.4
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 4/5] Add .secrel32 for pe-aarch64
2022-12-16 2:13 [PATCH 1/5] Fix size of external_reloc for pe-aarch64 Mark Harmstone
2022-12-16 2:13 ` [PATCH 2/5] Skip ELF-specific tests when targeting pe-aarch64 Mark Harmstone
2022-12-16 2:13 ` [PATCH 3/5] Add pe-aarch64 relocations Mark Harmstone
@ 2022-12-16 2:13 ` Mark Harmstone
2022-12-16 2:14 ` [PATCH 5/5] Add aarch64-w64-mingw32 target Mark Harmstone
2022-12-16 7:03 ` [PATCH 1/5] Fix size of external_reloc for pe-aarch64 Jan Beulich
4 siblings, 0 replies; 16+ messages in thread
From: Mark Harmstone @ 2022-12-16 2:13 UTC (permalink / raw)
To: binutils, wej22007, zac.walker; +Cc: Mark Harmstone
Adds the .secrel32 pseudo-directive and its corresponding relocation.
---
bfd/coff-aarch64.c | 47 +++++++++++++++++++++++-
gas/config/tc-aarch64.c | 75 +++++++++++++++++++++++++++++----------
gas/config/tc-aarch64.h | 4 +++
ld/testsuite/ld-pe/pe.exp | 2 ++
4 files changed, 108 insertions(+), 20 deletions(-)
diff --git a/bfd/coff-aarch64.c b/bfd/coff-aarch64.c
index e181ce66aa0..a9351deadff 100644
--- a/bfd/coff-aarch64.c
+++ b/bfd/coff-aarch64.c
@@ -253,6 +253,20 @@ coff_aarch64_addr32nb_reloc (bfd *abfd ATTRIBUTE_UNUSED,
return bfd_reloc_ok;
}
+static bfd_reloc_status_type
+coff_aarch64_secrel_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ bfd_putl32 (reloc_entry->addend, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
/* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */
#define MINUS_ONE (~ (bfd_vma) 0)
@@ -316,6 +330,11 @@ static const reloc_howto_type arm64_reloc_howto_32nb = HOWTO (IMAGE_REL_ARM64_AD
coff_aarch64_addr32nb_reloc, "IMAGE_REL_ARM64_ADDR32NB",
false, 0xffffffff, 0xffffffff, false);
+static const reloc_howto_type arm64_reloc_howto_secrel = HOWTO (IMAGE_REL_ARM64_SECREL, 0, 4, 32, false, 0,
+ complain_overflow_bitfield,
+ coff_aarch64_secrel_reloc, "IMAGE_REL_ARM64_SECREL",
+ false, 0xffffffff, 0xffffffff, false);
+
static const reloc_howto_type* const arm64_howto_table[] = {
&arm64_reloc_howto_abs,
&arm64_reloc_howto_64,
@@ -328,7 +347,8 @@ static const reloc_howto_type* const arm64_howto_table[] = {
&arm64_reloc_howto_branch19,
&arm64_reloc_howto_branch14,
&arm64_reloc_howto_pgoff12a,
- &arm64_reloc_howto_32nb
+ &arm64_reloc_howto_32nb,
+ &arm64_reloc_howto_secrel
};
#ifndef NUM_ELEM
@@ -372,6 +392,8 @@ coff_aarch64_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, bfd_reloc_code_real
return &arm64_reloc_howto_branch19;
case BFD_RELOC_RVA:
return &arm64_reloc_howto_32nb;
+ case BFD_RELOC_32_SECREL:
+ return &arm64_reloc_howto_secrel;
default:
BFD_FAIL ();
return NULL;
@@ -426,6 +448,8 @@ coff_aarch64_rtype_lookup (unsigned int code)
return &arm64_reloc_howto_pgoff12a;
case IMAGE_REL_ARM64_ADDR32NB:
return &arm64_reloc_howto_32nb;
+ case IMAGE_REL_ARM64_SECREL:
+ return &arm64_reloc_howto_secrel;
default:
BFD_FAIL ();
return NULL;
@@ -788,6 +812,27 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
break;
}
+ case IMAGE_REL_ARM64_SECREL:
+ {
+ uint64_t val;
+ int32_t addend;
+
+ addend = bfd_getl32 (contents + rel->r_vaddr);
+
+ val = sec->output_offset + sym_value + addend;
+
+ if (val > 0xffffffff)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_SECREL", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ bfd_putl32 (val, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
default:
info->callbacks->einfo (_("%F%P: Unhandled relocation type %u\n"),
rel->r_type);
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index a50cdb019e6..a72b96ffca7 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2097,6 +2097,27 @@ s_tlsdescldr (int ignored ATTRIBUTE_UNUSED)
}
#endif /* OBJ_ELF */
+#ifdef TE_PE
+static void
+s_secrel (int dummy ATTRIBUTE_UNUSED)
+{
+ expressionS exp;
+
+ do
+ {
+ expression (&exp);
+ if (exp.X_op == O_symbol)
+ exp.X_op = O_secrel;
+
+ emit_expr (&exp, 4);
+ }
+ while (*input_line_pointer++ == ',');
+
+ input_line_pointer--;
+ demand_empty_rest_of_line ();
+}
+#endif /* TE_PE */
+
static void s_aarch64_arch (int);
static void s_aarch64_cpu (int);
static void s_aarch64_arch_extension (int);
@@ -2131,6 +2152,9 @@ const pseudo_typeS md_pseudo_table[] = {
{"long", s_aarch64_cons, 4},
{"xword", s_aarch64_cons, 8},
{"dword", s_aarch64_cons, 8},
+#endif
+#ifdef TE_PE
+ {"secrel32", s_secrel, 0},
#endif
{"float16", float_cons, 'h'},
{"bfloat16", float_cons, 'b'},
@@ -9268,6 +9292,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
break;
case BFD_RELOC_RVA:
+ case BFD_RELOC_32_SECREL:
break;
default:
@@ -9353,27 +9378,39 @@ cons_fix_new_aarch64 (fragS * frag, int where, int size, expressionS * exp)
bfd_reloc_code_real_type type;
int pcrel = 0;
- /* Pick a reloc.
- FIXME: @@ Should look at CPU word size. */
- switch (size)
+#ifdef TE_PE
+ if (exp->X_op == O_secrel)
{
- case 1:
- type = BFD_RELOC_8;
- break;
- case 2:
- type = BFD_RELOC_16;
- break;
- case 4:
- type = BFD_RELOC_32;
- break;
- case 8:
- type = BFD_RELOC_64;
- break;
- default:
- as_bad (_("cannot do %u-byte relocation"), size);
- type = BFD_RELOC_UNUSED;
- break;
+ exp->X_op = O_symbol;
+ type = BFD_RELOC_32_SECREL;
}
+ else
+ {
+#endif
+ /* Pick a reloc.
+ FIXME: @@ Should look at CPU word size. */
+ switch (size)
+ {
+ case 1:
+ type = BFD_RELOC_8;
+ break;
+ case 2:
+ type = BFD_RELOC_16;
+ break;
+ case 4:
+ type = BFD_RELOC_32;
+ break;
+ case 8:
+ type = BFD_RELOC_64;
+ break;
+ default:
+ as_bad (_("cannot do %u-byte relocation"), size);
+ type = BFD_RELOC_UNUSED;
+ break;
+ }
+#ifdef TE_PE
+ }
+#endif
fix_new_exp (frag, where, (int) size, exp, pcrel, type);
}
diff --git a/gas/config/tc-aarch64.h b/gas/config/tc-aarch64.h
index 7a9a4e77bff..5f82dd23824 100644
--- a/gas/config/tc-aarch64.h
+++ b/gas/config/tc-aarch64.h
@@ -314,4 +314,8 @@ extern void aarch64_handle_align (struct frag *);
extern int tc_aarch64_regname_to_dw2regnum (char *regname);
extern void tc_aarch64_frame_initial_instructions (void);
+#ifdef TE_PE
+#define O_secrel O_md1
+#endif /* TE_PE */
+
#endif /* TC_AARCH64 */
diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp
index 80019a48778..83b20d0da45 100644
--- a/ld/testsuite/ld-pe/pe.exp
+++ b/ld/testsuite/ld-pe/pe.exp
@@ -84,6 +84,8 @@ if {[istarget "aarch64-*-pe*"]} {
set pe_tests {
{"aarch64" "--image-base 0x1000" "" "" {aarch64a.s aarch64b.s}
{{objdump -dr aarch64.d}} "aarch64.x"}
+ {".secrel32" "--disable-reloc-section" "" "" {secrel1.s secrel2.s}
+ {{objdump -s secrel_64.d}} "secrel.x"}
}
run_ld_link_tests $pe_tests
--
2.37.4
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 5/5] Add aarch64-w64-mingw32 target
2022-12-16 2:13 [PATCH 1/5] Fix size of external_reloc for pe-aarch64 Mark Harmstone
` (2 preceding siblings ...)
2022-12-16 2:13 ` [PATCH 4/5] Add .secrel32 for pe-aarch64 Mark Harmstone
@ 2022-12-16 2:14 ` Mark Harmstone
2022-12-16 7:28 ` Jan Beulich
2022-12-16 7:03 ` [PATCH 1/5] Fix size of external_reloc for pe-aarch64 Jan Beulich
4 siblings, 1 reply; 16+ messages in thread
From: Mark Harmstone @ 2022-12-16 2:14 UTC (permalink / raw)
To: binutils, wej22007, zac.walker; +Cc: Mark Harmstone
This adds a mingw target for aarch64, including windres and dlltool.
Note that the old value of jmp_aarch64_bytes was wrong, and this does
the same thing as MSVC does.
---
bfd/config.bfd | 4 +--
bfd/peicode.h | 2 +-
binutils/configure | 10 ++++++
binutils/configure.ac | 10 ++++++
binutils/dlltool.c | 57 ++++++++++++++++++++++++++++++---
binutils/rescoff.c | 3 ++
gas/configure.tgt | 2 +-
gas/testsuite/gas/pe/pe.exp | 2 +-
ld/configure.tgt | 4 +--
ld/emultempl/pep.em | 10 +++---
ld/pe-dll.c | 12 +++----
ld/testsuite/ld-pe/pe-aarch64.d | 13 ++++++--
ld/testsuite/ld-pe/pe.exp | 2 +-
13 files changed, 107 insertions(+), 24 deletions(-)
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 92a6cff938b..a583ae9a424 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -249,9 +249,9 @@ case "${targ}" in
targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec aarch64_pei_le_vec aarch64_pe_le_vec"
want64=true
;;
- aarch64-*-pe*)
+ aarch64-*-pe* | aarch64-*-mingw*)
targ_defvec=aarch64_pe_le_vec
- targ_selvecs="aarch64_pe_le_vec aarch64_pei_le_vec"
+ targ_selvecs="aarch64_pe_le_vec aarch64_pei_le_vec aarch64_elf64_le_vec aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec"
want64=true
targ_underscore=no
;;
diff --git a/bfd/peicode.h b/bfd/peicode.h
index f7ba24ae10a..26e95dc1f1b 100644
--- a/bfd/peicode.h
+++ b/bfd/peicode.h
@@ -440,7 +440,7 @@ pe_bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
#define SIZEOF_IDATA2 (5 * 4)
/* For PEx64 idata4 & 5 have thumb size of 8 bytes. */
-#ifdef COFF_WITH_pex64
+#if defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64)
#define SIZEOF_IDATA4 (2 * 4)
#define SIZEOF_IDATA5 (2 * 4)
#else
diff --git a/binutils/configure b/binutils/configure
index 5a3e5017b46..a88b66dae8f 100755
--- a/binutils/configure
+++ b/binutils/configure
@@ -14578,6 +14578,16 @@ do
esac
case $targ in
+ aarch64-*-mingw*)
+ BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
+ if test -z "$DLLTOOL_DEFAULT"; then
+ DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_AARCH64"
+ fi
+ DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_AARCH64"
+ BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
+ BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
+ BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
+ ;;
arm-wince-pe* | arm-*-wince | arm*-*-cegcc* | arm*-*-mingw32ce*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
diff --git a/binutils/configure.ac b/binutils/configure.ac
index 6243a2b0c2d..b51aeb9f38f 100644
--- a/binutils/configure.ac
+++ b/binutils/configure.ac
@@ -355,6 +355,16 @@ do
esac
case $targ in
+ aarch64-*-mingw*)
+ BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
+ if test -z "$DLLTOOL_DEFAULT"; then
+ DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_AARCH64"
+ fi
+ DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_AARCH64"
+ BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
+ BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
+ BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
+ ;;
arm-wince-pe* | arm-*-wince | arm*-*-cegcc* | arm*-*-mingw32ce*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
diff --git a/binutils/dlltool.c b/binutils/dlltool.c
index a3c5e0f778e..c9c53919dbf 100644
--- a/binutils/dlltool.c
+++ b/binutils/dlltool.c
@@ -442,6 +442,11 @@ static const char *mname = "arm";
static const char *mname = "arm-wince";
#endif
+#ifdef DLLTOOL_DEFAULT_AARCH64
+/* arm64 rather than aarch64 to match llvm-dlltool */
+static const char *mname = "arm64";
+#endif
+
#ifdef DLLTOOL_DEFAULT_I386
static const char *mname = "i386";
#endif
@@ -560,6 +565,14 @@ static const unsigned char mcore_le_jtab[] =
0x00, 0x00, 0x00, 0x00 /* <address> */
};
+static const unsigned char aarch64_jtab[] =
+{
+ 0x10, 0x00, 0x00, 0x90, /* adrp x16, 0 */
+ 0x10, 0x02, 0x00, 0x91, /* add x16, x16, #0x0 */
+ 0x10, 0x02, 0x40, 0xf9, /* ldr x16, [x16] */
+ 0x00, 0x02, 0x1f, 0xd6 /* br x16 */
+};
+
static const char i386_trampoline[] =
"\tpushl %%ecx\n"
"\tpushl %%edx\n"
@@ -717,6 +730,15 @@ mtable[] =
i386_x64_dljtab, sizeof (i386_x64_dljtab), 2, 9, 14, true, i386_x64_trampoline
}
,
+ {
+#define MAARCH64 10
+ "arm64", ".byte", ".short", ".long", ".asciz", "//",
+ "bl ", ".global", ".space", ".balign\t2", ".balign\t4", "",
+ "pe-aarch64-little", bfd_arch_aarch64,
+ aarch64_jtab, sizeof (aarch64_jtab), 0,
+ 0, 0, 0, 0, 0, false, 0
+ }
+ ,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
};
@@ -864,6 +886,7 @@ rvaafter (int mach)
case MMCORE_ELF:
case MMCORE_ELF_LE:
case MARM_WINCE:
+ case MAARCH64:
break;
default:
/* xgettext:c-format */
@@ -888,6 +911,7 @@ rvabefore (int mach)
case MMCORE_ELF:
case MMCORE_ELF_LE:
case MARM_WINCE:
+ case MAARCH64:
return ".rva\t";
default:
/* xgettext:c-format */
@@ -910,6 +934,7 @@ asm_prefix (int mach, const char *name)
case MMCORE_ELF:
case MMCORE_ELF_LE:
case MARM_WINCE:
+ case MAARCH64:
break;
case M386:
case MX86:
@@ -2474,6 +2499,8 @@ make_one_lib_file (export_type *exp, int i, int delay)
case TEXT:
if (! exp->data)
{
+ unsigned int rpp_len;
+
si->size = HOW_JTAB_SIZE;
si->data = xmalloc (HOW_JTAB_SIZE);
memcpy (si->data, HOW_JTAB, HOW_JTAB_SIZE);
@@ -2481,7 +2508,12 @@ make_one_lib_file (export_type *exp, int i, int delay)
/* Add the reloc into idata$5. */
rel = xmalloc (sizeof (arelent));
- rpp = xmalloc (sizeof (arelent *) * (delay ? 4 : 2));
+ rpp_len = delay ? 4 : 2;
+
+ if (machine == MAARCH64)
+ rpp_len++;
+
+ rpp = xmalloc (sizeof (arelent *) * rpp_len);
rpp[0] = rel;
rpp[1] = 0;
@@ -2507,6 +2539,22 @@ make_one_lib_file (export_type *exp, int i, int delay)
BFD_RELOC_32_PCREL);
rel->sym_ptr_ptr = iname_pp;
}
+ else if (machine == MAARCH64)
+ {
+ arelent *rel_add;
+
+ rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL);
+ rel->sym_ptr_ptr = secdata[IDATA5].sympp;
+
+ rel_add = xmalloc (sizeof (arelent));
+ rel_add->address = 4;
+ rel_add->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_AARCH64_ADD_LO12);
+ rel_add->sym_ptr_ptr = secdata[IDATA5].sympp;
+ rel_add->addend = 0;
+
+ rpp[rpp_len - 2] = rel_add;
+ rpp[rpp_len - 1] = 0;
+ }
else
{
rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
@@ -2527,7 +2575,7 @@ make_one_lib_file (export_type *exp, int i, int delay)
}
sec->orelocation = rpp;
- sec->reloc_count = delay ? 3 : 1;
+ sec->reloc_count = rpp_len - 1;
}
break;
@@ -3674,7 +3722,7 @@ usage (FILE *file, int status)
fprintf (file, _("Usage %s <option(s)> <object-file(s)>\n"), program_name);
/* xgetext:c-format */
fprintf (file, _(" -m --machine <machine> Create as DLL for <machine>. [default: %s]\n"), mname);
- fprintf (file, _(" possible <machine>: arm[_interwork], i386, mcore[-elf]{-le|-be}, thumb\n"));
+ fprintf (file, _(" possible <machine>: arm[_interwork], arm64, i386, mcore[-elf]{-le|-be}, thumb\n"));
fprintf (file, _(" -e --output-exp <outname> Generate an export file.\n"));
fprintf (file, _(" -l --output-lib <outname> Generate an interface library.\n"));
fprintf (file, _(" -y --output-delaylib <outname> Create a delay-import library.\n"));
@@ -3967,7 +4015,8 @@ main (int ac, char **av)
machine = i;
/* Check if we generated PE+. */
- create_for_pep = strcmp (mname, "i386:x86-64") == 0;
+ create_for_pep = strcmp (mname, "i386:x86-64") == 0 ||
+ strcmp (mname, "arm64") == 0;
{
/* Check the default underscore */
diff --git a/binutils/rescoff.c b/binutils/rescoff.c
index 83b08634c7f..1ae02598313 100644
--- a/binutils/rescoff.c
+++ b/binutils/rescoff.c
@@ -463,6 +463,9 @@ write_coff_file (const char *filename, const char *target,
#elif defined DLLTOOL_ARM
if (! bfd_set_arch_mach (abfd, bfd_arch_arm, 0))
bfd_fatal ("bfd_set_arch_mach(arm)");
+#elif defined DLLTOOL_AARCH64
+ if (! bfd_set_arch_mach (abfd, bfd_arch_aarch64, 0))
+ bfd_fatal ("bfd_set_arch_mach(aarch64)");
#else
/* FIXME: This is obviously i386 specific. */
if (! bfd_set_arch_mach (abfd, bfd_arch_i386, 0))
diff --git a/gas/configure.tgt b/gas/configure.tgt
index 82f2d44f418..ba49003bc80 100644
--- a/gas/configure.tgt
+++ b/gas/configure.tgt
@@ -135,7 +135,7 @@ case ${generic_target} in
esac ;;
aarch64*-*-netbsd*) fmt=elf em=nbsd;;
aarch64*-*-openbsd*) fmt=elf;;
- aarch64*-*-pe*) fmt=coff em=pepaarch64 ;;
+ aarch64*-*-pe* | aarch64*-*-mingw*) fmt=coff em=pepaarch64 ;;
alpha-*-*vms*) fmt=evax ;;
alpha-*-osf*) fmt=ecoff ;;
alpha-*-linux*ecoff*) fmt=ecoff ;;
diff --git a/gas/testsuite/gas/pe/pe.exp b/gas/testsuite/gas/pe/pe.exp
index 8df750f9dd0..231cdecb12b 100644
--- a/gas/testsuite/gas/pe/pe.exp
+++ b/gas/testsuite/gas/pe/pe.exp
@@ -54,7 +54,7 @@ if ([istarget "x86_64-*-mingw*"]) then {
# This test is only for AArch64
-if ([istarget "aarch64-*-pe*"]) {
+if {[istarget "aarch64-*-pe*"] || [istarget "aarch64-*-mingw*"]} {
run_dump_test "pe-aarch64"
}
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 741b246f67e..5f05f083bba 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -118,9 +118,9 @@ aarch64-*-linux*) targ_emul=aarch64linux
aarch64-*-haiku*) targ_emul=aarch64haiku
targ_extra_emuls="aarch64elf aarch64elf32 aarch64elf32b aarch64elfb armelf armelfb armelf_haiku $targ_extra_libpath"
;;
-aarch64-*-pe*)
+aarch64-*-pe* | aarch64-*-mingw*)
targ_emul=aarch64pe
- targ_extra_ofiles="deffilep.o pep-dll-aarch64.o"
+ targ_extra_ofiles="deffilep.o pep-dll-aarch64.o pe-dll.o"
;;
alpha*-*-freebsd* | alpha*-*-kfreebsd*-gnu)
targ_emul=elf64alpha_fbsd
diff --git a/ld/emultempl/pep.em b/ld/emultempl/pep.em
index e2c538e6d99..0ecce1bc4c1 100644
--- a/ld/emultempl/pep.em
+++ b/ld/emultempl/pep.em
@@ -106,7 +106,7 @@ fragment <<EOF
#define PE_DEF_SECTION_ALIGNMENT ${OVERRIDE_SECTION_ALIGNMENT}
#endif
-#ifdef TARGET_IS_i386pep
+#if defined(TARGET_IS_i386pep) || defined(TARGET_IS_aarch64pe)
#define DLL_SUPPORT
#endif
@@ -115,7 +115,7 @@ fragment <<EOF
| IMAGE_DLL_CHARACTERISTICS_HIGH_ENTROPY_VA \
| IMAGE_DLL_CHARACTERISTICS_NX_COMPAT)
-#if defined(TARGET_IS_i386pep) || ! defined(DLL_SUPPORT)
+#if defined(TARGET_IS_i386pep) || defined(TARGET_IS_aarch64pe) || ! defined(DLL_SUPPORT)
#define PE_DEF_SUBSYSTEM 3
#undef NT_EXE_IMAGE_BASE
#define NT_EXE_IMAGE_BASE \
@@ -1541,14 +1541,14 @@ gld${EMULATION_NAME}_after_open (void)
if (pep_enable_stdcall_fixup) /* -1=warn or 1=enable */
pep_fixup_stdcalls ();
-#ifndef TARGET_IS_i386pep
+#if !defined(TARGET_IS_i386pep) && !defined(TARGET_IS_aarch64pe)
if (bfd_link_pic (&link_info))
#else
if (!bfd_link_relocatable (&link_info))
#endif
pep_dll_build_sections (link_info.output_bfd, &link_info);
-#ifndef TARGET_IS_i386pep
+#if !defined(TARGET_IS_i386pep) && !defined(TARGET_IS_aarch64pe)
else
pep_exe_build_sections (link_info.output_bfd, &link_info);
#endif
@@ -1844,6 +1844,8 @@ gld${EMULATION_NAME}_recognized_file (lang_input_statement_type *entry ATTRIBUTE
#ifdef DLL_SUPPORT
#ifdef TARGET_IS_i386pep
pep_dll_id_target ("pei-x86-64");
+#elif defined(TARGET_IS_aarch64pe)
+ pep_dll_id_target ("pei-aarch64-little");
#endif
if (pep_bfd_is_dll (entry->the_bfd))
return pep_implied_import_dll (entry->filename);
diff --git a/ld/pe-dll.c b/ld/pe-dll.c
index df16e85bbe0..edfcda9cf16 100644
--- a/ld/pe-dll.c
+++ b/ld/pe-dll.c
@@ -2257,13 +2257,12 @@ static const unsigned char jmp_ix86_bytes[] =
0xff, 0x25, 0x00, 0x00, 0x00, 0x00, 0x90, 0x90
};
-/* _function:
- b <__imp_function>
- nop */
static const unsigned char jmp_aarch64_bytes[] =
{
- 0x00, 0x00, 0x00, 0x14,
- 0x1f, 0x20, 0x03, 0xD5
+ 0x10, 0x00, 0x00, 0x90, /* adrp x16, 0 */
+ 0x10, 0x02, 0x00, 0x91, /* add x16, x16, #0x0 */
+ 0x10, 0x02, 0x40, 0xf9, /* ldr x16, [x16] */
+ 0x00, 0x02, 0x1f, 0xd6 /* br x16 */
};
/* _function:
@@ -2431,7 +2430,8 @@ make_one (def_file_export *exp, bfd *parent, bool include_jmp_stub)
quick_reloc (abfd, 8, BFD_RELOC_32, 2);
break;
case PE_ARCH_aarch64:
- quick_reloc (abfd, 0, BFD_RELOC_AARCH64_JUMP26, 2);
+ quick_reloc (abfd, 0, BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL, 2);
+ quick_reloc (abfd, 4, BFD_RELOC_AARCH64_ADD_LO12, 2);
break;
default:
abort ();
diff --git a/ld/testsuite/ld-pe/pe-aarch64.d b/ld/testsuite/ld-pe/pe-aarch64.d
index fac02b5fd87..ab6370fb514 100644
--- a/ld/testsuite/ld-pe/pe-aarch64.d
+++ b/ld/testsuite/ld-pe/pe-aarch64.d
@@ -6,11 +6,20 @@
Disassembly of section .text:
-0000000140001000 <__rt_psrelocs_end>:
+0000000140001000 <___crt_xc_end__>:
140001000: d2800281 mov x1, #0x14 // #20
140001004: 14000001 b 140001008 <foo>
0000000140001008 <foo>:
140001008: d65f03c0 ret
14000100c: 00000000 udf #0
-#...
+
+0000000140001010 <__CTOR_LIST__>:
+ 140001010: ffffffff .inst 0xffffffff ; undefined
+ 140001014: ffffffff .inst 0xffffffff ; undefined
+ ...
+
+0000000140001020 <__DTOR_LIST__>:
+ 140001020: ffffffff .inst 0xffffffff ; undefined
+ 140001024: ffffffff .inst 0xffffffff ; undefined
+ ...
diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp
index 83b20d0da45..58158cc657d 100644
--- a/ld/testsuite/ld-pe/pe.exp
+++ b/ld/testsuite/ld-pe/pe.exp
@@ -78,7 +78,7 @@ if {[istarget i*86-*-cygwin*]
run_ld_link_tests $pe_tests
}
-if {[istarget "aarch64-*-pe*"]} {
+if {[istarget "aarch64-*-pe*"] || [istarget "aarch64-*-mingw*"]} {
run_dump_test "pe-aarch64"
set pe_tests {
--
2.37.4
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/5] Fix size of external_reloc for pe-aarch64
2022-12-16 2:13 [PATCH 1/5] Fix size of external_reloc for pe-aarch64 Mark Harmstone
` (3 preceding siblings ...)
2022-12-16 2:14 ` [PATCH 5/5] Add aarch64-w64-mingw32 target Mark Harmstone
@ 2022-12-16 7:03 ` Jan Beulich
2022-12-16 10:47 ` Tamar Christina
4 siblings, 1 reply; 16+ messages in thread
From: Jan Beulich @ 2022-12-16 7:03 UTC (permalink / raw)
To: Mark Harmstone; +Cc: binutils, wej22007, zac.walker, Tamar Christina
On 16.12.2022 03:13, Mark Harmstone wrote:
> This patch series finishes off the work by Jedidiah Thompson, and adds
> support for creating aarch64 PE images.
>
> This should be essentially complete: I've used this to create a "hello
> world" Windows program in asm, and (with GCC patches) a UEFI program in
> C. I think the only things missing are the .secidx relocation, which is
> needed for PDBs, and the SEH pseudos used for C++ exceptions.
>
> This first patch fixes the size of RELSZ; I'm not sure why it was 14 in
> the first place. This is the size of the "Base Relocation Block" in
> https://learn.microsoft.com/en-us/windows/win32/debug/pe-format, and
> AFAIK should be 10 for everything.
Not sure - there look to be different formats in use, judging from other
headers in include/coff/. See e.g. arm.h which even has two forms.
Clearly in the original commit (b69c9d41e894), targeting only objcopy
(and maybe objdump) for PE binaries, this didn't really matter. Does it
actually matter for you, when you're also only targeting PE? Or are you
(in spite of the title) really after COFF objects as well?
Let me Cc Tamar, the author of the original patch, to possibly shed
some more light on what the struct was initially derived from.
Jan
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/5] Skip ELF-specific tests when targeting pe-aarch64
2022-12-16 2:13 ` [PATCH 2/5] Skip ELF-specific tests when targeting pe-aarch64 Mark Harmstone
@ 2022-12-16 7:07 ` Jan Beulich
2022-12-21 20:19 ` Mark Harmstone
0 siblings, 1 reply; 16+ messages in thread
From: Jan Beulich @ 2022-12-16 7:07 UTC (permalink / raw)
To: Mark Harmstone; +Cc: binutils, wej22007, zac.walker
On 16.12.2022 03:13, Mark Harmstone wrote:
> There's currently an awful lot of test failures for pe-aarch64, because
> of tests that assume that aarch64 implies ELF. This sets notarget for
> these.
Hmm, not very nice, but perhaps okay as a first step. However, ...
> ---
> binutils/testsuite/binutils-all/objcopy.exp | 1 +
> gas/testsuite/gas/aarch64/adr_1.d | 1 +
> gas/testsuite/gas/aarch64/advsimd-mov-bad.d | 1 +
> gas/testsuite/gas/aarch64/b_1.d | 1 +
> gas/testsuite/gas/aarch64/beq_1.d | 1 +
> gas/testsuite/gas/aarch64/bfloat16-directive-be.d | 1 +
> gas/testsuite/gas/aarch64/bfloat16-directive-le.d | 1 +
> gas/testsuite/gas/aarch64/codealign.d | 2 +-
> gas/testsuite/gas/aarch64/codealign_1.d | 1 +
> gas/testsuite/gas/aarch64/dwarf.d | 1 +
> gas/testsuite/gas/aarch64/ilp32-basic.d | 1 +
> gas/testsuite/gas/aarch64/int-insns.d | 1 +
> gas/testsuite/gas/aarch64/ldr_1.d | 1 +
> gas/testsuite/gas/aarch64/litpool.d | 2 +-
> gas/testsuite/gas/aarch64/mapmisc.d | 2 +-
> gas/testsuite/gas/aarch64/mapping.d | 2 +-
> gas/testsuite/gas/aarch64/mapping2.d | 2 +-
> gas/testsuite/gas/aarch64/mapping3.d | 2 +-
> gas/testsuite/gas/aarch64/mapping4.d | 2 +-
> gas/testsuite/gas/aarch64/mapping_5.d | 1 +
> gas/testsuite/gas/aarch64/mapping_6.d | 1 +
> gas/testsuite/gas/aarch64/mops_invalid_2.d | 1 +
> gas/testsuite/gas/aarch64/movw_label.d | 1 +
> gas/testsuite/gas/aarch64/optional.d | 1 +
> gas/testsuite/gas/aarch64/pac_ab_key.d | 1 +
> gas/testsuite/gas/aarch64/pac_negate_ra_state.d | 1 +
> gas/testsuite/gas/aarch64/pr20364.d | 1 +
> gas/testsuite/gas/aarch64/pr27217.d | 1 +
> gas/testsuite/gas/aarch64/pr29519.d | 1 +
> gas/testsuite/gas/aarch64/programmer-friendly.d | 1 +
> gas/testsuite/gas/aarch64/reloc-data.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_g0.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_g1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_g2.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d | 1 +
> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d | 1 +
> gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d | 1 +
> gas/testsuite/gas/aarch64/reloc-gotoff_g1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d | 1 +
> gas/testsuite/gas/aarch64/reloc-gottprel_g1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-insn.d | 1 +
> gas/testsuite/gas/aarch64/reloc-prel_g0.d | 1 +
> gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d | 1 +
> gas/testsuite/gas/aarch64/reloc-prel_g1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d | 1 +
> gas/testsuite/gas/aarch64/reloc-prel_g2.d | 1 +
> gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d | 1 +
> gas/testsuite/gas/aarch64/reloc-prel_g3.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tlsldm-1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d | 1 +
> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_1.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_10.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_11.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_12.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_13.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_14.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_15.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_16.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_17.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_18.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_19.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_2.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_20.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_21.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_22.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_23.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_24.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_25.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_26.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_27.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_28.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_3.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_4.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_5.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_6.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_7.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_8.d | 1 +
> gas/testsuite/gas/aarch64/sve-movprfx_9.d | 1 +
> gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d | 1 +
> gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d | 1 +
> gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d | 1 +
> gas/testsuite/gas/aarch64/system.d | 1 +
> gas/testsuite/gas/aarch64/tail_padding.d | 1 +
> gas/testsuite/gas/aarch64/tbz_1.d | 1 +
> gas/testsuite/gas/aarch64/tls-desc.d | 1 +
> gas/testsuite/gas/aarch64/tls.d | 1 +
> gas/testsuite/gas/pe/big-obj.d | 1 +
... this clearly isn't an ELF test and hence can't fall into here.
At least for PE tests I think it would be better if they really worked.
If anything this should be xfail-ed imo (in a separate patch with a
suitable description).
Jan
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 5/5] Add aarch64-w64-mingw32 target
2022-12-16 2:14 ` [PATCH 5/5] Add aarch64-w64-mingw32 target Mark Harmstone
@ 2022-12-16 7:28 ` Jan Beulich
2022-12-18 22:44 ` Martin Storsjö
0 siblings, 1 reply; 16+ messages in thread
From: Jan Beulich @ 2022-12-16 7:28 UTC (permalink / raw)
To: Mark Harmstone; +Cc: binutils, wej22007, zac.walker
On 16.12.2022 03:14, Mark Harmstone wrote:
> --- a/bfd/config.bfd
> +++ b/bfd/config.bfd
> @@ -249,9 +249,9 @@ case "${targ}" in
> targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec aarch64_pei_le_vec aarch64_pe_le_vec"
> want64=true
> ;;
> - aarch64-*-pe*)
> + aarch64-*-pe* | aarch64-*-mingw*)
> targ_defvec=aarch64_pe_le_vec
> - targ_selvecs="aarch64_pe_le_vec aarch64_pei_le_vec"
> + targ_selvecs="aarch64_pe_le_vec aarch64_pei_le_vec aarch64_elf64_le_vec aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec"
> want64=true
> targ_underscore=no
> ;;
Here and elsewhere - are you really targeting a 32-bit ABI (as per the
title)? Or do you instead mean aarch64-*-mingw64, or yet more generically
aarch64-*-mingw*? (From the *-s I used you can see that I also find a
middle component "w64" odd. Luckily you use this only in the title.) The
32- vs 64-bit ABI distinction should imo be done minimally in a way
preventing later confusion, i.e. it would be fine to support just one,
but then an attempt to configure for the other should result in an error,
not in the building of tools for the other ABI. Seeing that mingw{32,64}
are only really distinguished in the top level directory, I wonder though
whether that isn't improperly separated elsewhere as well.
Jan
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 1/5] Fix size of external_reloc for pe-aarch64
2022-12-16 7:03 ` [PATCH 1/5] Fix size of external_reloc for pe-aarch64 Jan Beulich
@ 2022-12-16 10:47 ` Tamar Christina
2022-12-20 12:59 ` Mark Harmstone
0 siblings, 1 reply; 16+ messages in thread
From: Tamar Christina @ 2022-12-16 10:47 UTC (permalink / raw)
To: Jan Beulich, Mark Harmstone; +Cc: binutils, wej22007, zac.walker
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, December 16, 2022 7:04 AM
> To: Mark Harmstone <mark@harmstone.com>
> Cc: binutils@sourceware.org; wej22007@outlook.com;
> zac.walker@linaro.org; Tamar Christina <Tamar.Christina@arm.com>
> Subject: Re: [PATCH 1/5] Fix size of external_reloc for pe-aarch64
>
> On 16.12.2022 03:13, Mark Harmstone wrote:
> > This patch series finishes off the work by Jedidiah Thompson, and adds
> > support for creating aarch64 PE images.
> >
> > This should be essentially complete: I've used this to create a "hello
> > world" Windows program in asm, and (with GCC patches) a UEFI program
> > in C. I think the only things missing are the .secidx relocation,
> > which is needed for PDBs, and the SEH pseudos used for C++ exceptions.
> >
> > This first patch fixes the size of RELSZ; I'm not sure why it was 14
> > in the first place. This is the size of the "Base Relocation Block" in
> > https://learn.microsoft.com/en-us/windows/win32/debug/pe-format, and
> > AFAIK should be 10 for everything.
>
> Not sure - there look to be different formats in use, judging from other
> headers in include/coff/. See e.g. arm.h which even has two forms.
> Clearly in the original commit (b69c9d41e894), targeting only objcopy (and
> maybe objdump) for PE binaries, this didn't really matter. Does it actually
> matter for you, when you're also only targeting PE? Or are you (in spite of
> the title) really after COFF objects as well?
>
> Let me Cc Tamar, the author of the original patch, to possibly shed some
> more light on what the struct was initially derived from.
The code was taken from the Arm port which weirdly had a different size
for this whether it was a WINCE target or not. For WINCE target it has 10, but for
everything else 14 (See include/coff/arm.h). Since I didn't have relocations
support anyway (the original intention was only to support objcopy workflow)
I didn't dig too deeply into why Arm has it as 14 and the extra field.
That said 10 looks to be the correct value.
Thanks,
Tamar
>
> Jan
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 5/5] Add aarch64-w64-mingw32 target
2022-12-16 7:28 ` Jan Beulich
@ 2022-12-18 22:44 ` Martin Storsjö
2022-12-20 13:18 ` Mark Harmstone
0 siblings, 1 reply; 16+ messages in thread
From: Martin Storsjö @ 2022-12-18 22:44 UTC (permalink / raw)
To: Jan Beulich; +Cc: Mark Harmstone, binutils, wej22007, zac.walker
On Fri, 16 Dec 2022, Jan Beulich via Binutils wrote:
> On 16.12.2022 03:14, Mark Harmstone wrote:
>> --- a/bfd/config.bfd
>> +++ b/bfd/config.bfd
>> @@ -249,9 +249,9 @@ case "${targ}" in
>> targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec aarch64_pei_le_vec aarch64_pe_le_vec"
>> want64=true
>> ;;
>> - aarch64-*-pe*)
>> + aarch64-*-pe* | aarch64-*-mingw*)
>> targ_defvec=aarch64_pe_le_vec
>> - targ_selvecs="aarch64_pe_le_vec aarch64_pei_le_vec"
>> + targ_selvecs="aarch64_pe_le_vec aarch64_pei_le_vec aarch64_elf64_le_vec aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec"
>> want64=true
>> targ_underscore=no
>> ;;
>
> Here and elsewhere - are you really targeting a 32-bit ABI (as per the
> title)? Or do you instead mean aarch64-*-mingw64, or yet more generically
> aarch64-*-mingw*? (From the *-s I used you can see that I also find a
> middle component "w64" odd.
Despite being 64 bit, the OS part of these triples have traditionally
always been "mingw32" (where the arch part of the triple indicates whether
it is 32 or 64 bit). Some tools/libraries/build systems only ever match
for "mingw32" here, while some might tolerate "mingw64" too even though
it's not the norm.
The "w64" bit in the vendor field is usually used to indicate the use of
the "mingw-w64" fork of the mingw runtime (as opposed to the original
mingw.org runtime). This is also used for 32 bit targets, such as
i686-w64-mingw32.
// Martin
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/5] Fix size of external_reloc for pe-aarch64
2022-12-16 10:47 ` Tamar Christina
@ 2022-12-20 12:59 ` Mark Harmstone
2022-12-20 13:10 ` Jan Beulich
0 siblings, 1 reply; 16+ messages in thread
From: Mark Harmstone @ 2022-12-20 12:59 UTC (permalink / raw)
To: Tamar Christina, Jan Beulich; +Cc: binutils, wej22007, zac.walker
On 16/12/22 10:47, Tamar Christina wrote:
>
> The code was taken from the Arm port which weirdly had a different size
> for this whether it was a WINCE target or not. For WINCE target it has 10, but for
> everything else 14 (See include/coff/arm.h). Since I didn't have relocations
> support anyway (the original intention was only to support objcopy workflow)
> I didn't dig too deeply into why Arm has it as 14 and the extra field.
>
> That said 10 looks to be the correct value.
>
> Thanks,
> Tamar
Thanks Tamar. Sorry, I should have copied you in in the first place.
I can't remember the specifics, but I definitely needed this patch to get EXEs working on Windows.
Mark
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/5] Fix size of external_reloc for pe-aarch64
2022-12-20 12:59 ` Mark Harmstone
@ 2022-12-20 13:10 ` Jan Beulich
2022-12-20 13:38 ` Tamar Christina
0 siblings, 1 reply; 16+ messages in thread
From: Jan Beulich @ 2022-12-20 13:10 UTC (permalink / raw)
To: Mark Harmstone; +Cc: binutils, wej22007, zac.walker, Tamar Christina
On 20.12.2022 13:59, Mark Harmstone wrote:
> On 16/12/22 10:47, Tamar Christina wrote:
>>
>> The code was taken from the Arm port which weirdly had a different size
>> for this whether it was a WINCE target or not. For WINCE target it has 10, but for
>> everything else 14 (See include/coff/arm.h). Since I didn't have relocations
>> support anyway (the original intention was only to support objcopy workflow)
>> I didn't dig too deeply into why Arm has it as 14 and the extra field.
>>
>> That said 10 looks to be the correct value.
>>
>> Thanks,
>> Tamar
>
> Thanks Tamar. Sorry, I should have copied you in in the first place.
>
> I can't remember the specifics, but I definitely needed this patch to get EXEs working on Windows.
But EXEs don't use this kind of relocation; the base relocations (fixups)
used there are encoded in an entirely different way. The relocs here should
matter for are COFF object files only.
Jan
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 5/5] Add aarch64-w64-mingw32 target
2022-12-18 22:44 ` Martin Storsjö
@ 2022-12-20 13:18 ` Mark Harmstone
0 siblings, 0 replies; 16+ messages in thread
From: Mark Harmstone @ 2022-12-20 13:18 UTC (permalink / raw)
To: Martin Storsjö, Jan Beulich; +Cc: binutils, wej22007, zac.walker
On 18/12/22 22:44, Martin Storsjö wrote:
> On Fri, 16 Dec 2022, Jan Beulich via Binutils wrote:
>
>> On 16.12.2022 03:14, Mark Harmstone wrote:
>>> --- a/bfd/config.bfd
>>> +++ b/bfd/config.bfd
>>> @@ -249,9 +249,9 @@ case "${targ}" in
>>> targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec aarch64_pei_le_vec aarch64_pe_le_vec"
>>> want64=true
>>> ;;
>>> - aarch64-*-pe*)
>>> + aarch64-*-pe* | aarch64-*-mingw*)
>>> targ_defvec=aarch64_pe_le_vec
>>> - targ_selvecs="aarch64_pe_le_vec aarch64_pei_le_vec"
>>> + targ_selvecs="aarch64_pe_le_vec aarch64_pei_le_vec aarch64_elf64_le_vec aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec"
>>> want64=true
>>> targ_underscore=no
>>> ;;
>>
>> Here and elsewhere - are you really targeting a 32-bit ABI (as per the
>> title)? Or do you instead mean aarch64-*-mingw64, or yet more generically
>> aarch64-*-mingw*? (From the *-s I used you can see that I also find a
>> middle component "w64" odd.
>
> Despite being 64 bit, the OS part of these triples have traditionally always been "mingw32" (where the arch part of the triple indicates whether it is 32 or 64 bit). Some tools/libraries/build systems only ever match for "mingw32" here, while some might tolerate "mingw64" too even though it's not the norm.
>
> The "w64" bit in the vendor field is usually used to indicate the use of the "mingw-w64" fork of the mingw runtime (as opposed to the original mingw.org runtime). This is also used for 32 bit targets, such as i686-w64-mingw32.
>
> // Martin
>
Yes, as Martin says, it's a bit eclectic. aarch64-w64-mingw32 is also the name that LLVM is using already.
Mark
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 1/5] Fix size of external_reloc for pe-aarch64
2022-12-20 13:10 ` Jan Beulich
@ 2022-12-20 13:38 ` Tamar Christina
0 siblings, 0 replies; 16+ messages in thread
From: Tamar Christina @ 2022-12-20 13:38 UTC (permalink / raw)
To: Jan Beulich, Mark Harmstone; +Cc: binutils, wej22007, zac.walker
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Tuesday, December 20, 2022 1:10 PM
> To: Mark Harmstone <mark@harmstone.com>
> Cc: binutils@sourceware.org; wej22007@outlook.com;
> zac.walker@linaro.org; Tamar Christina <Tamar.Christina@arm.com>
> Subject: Re: [PATCH 1/5] Fix size of external_reloc for pe-aarch64
>
> On 20.12.2022 13:59, Mark Harmstone wrote:
> > On 16/12/22 10:47, Tamar Christina wrote:
> >>
> >> The code was taken from the Arm port which weirdly had a different
> >> size for this whether it was a WINCE target or not. For WINCE target it has
> 10, but for
> >> everything else 14 (See include/coff/arm.h). Since I didn't have
> relocations
> >> support anyway (the original intention was only to support objcopy
> >> workflow) I didn't dig too deeply into why Arm has it as 14 and the extra
> field.
> >>
> >> That said 10 looks to be the correct value.
> >>
> >> Thanks,
> >> Tamar
> >
> > Thanks Tamar. Sorry, I should have copied you in in the first place.
> >
> > I can't remember the specifics, but I definitely needed this patch to get
> EXEs working on Windows.
>
> But EXEs don't use this kind of relocation; the base relocations (fixups) used
> there are encoded in an entirely different way. The relocs here should
> matter for are COFF object files only.
Agreed, the relocs here are COFF only. That said 10 still looks like the correct value.
Microsoft's documentation seems to have become a bit unclear after they reworded it for ASLR support.
Originally the Image files didn't have relocations as by then they would have been resolved already, but for ASLR
there is exposed a .reloc section now so the loader can do the fixups. That's what the docs now describe:
https://learn.microsoft.com/en-us/windows/win32/debug/pe-format#the-reloc-section-image-only
They however no longer describe COFF relocations at all. If we find an older spec (like Revision 6.0 - February 1999),
when it was still doc/pdf like https://courses.cs.washington.edu/courses/cse378/03wi/lectures/LinkerFiles/coff.pdf
you'll see that the COFF relocations are described in section 5.2 are still 10 bytes long.
This also coincides with LLVM's description of the COFF relocations https://llvm.org/doxygen/structllvm_1_1COFF_1_1relocation.html
It's highly likely that there is a bug in the Arm port, because the most used PE target on Arm is WINCE which sets 10.
Cheers,
Tamar
> Jan
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/5] Skip ELF-specific tests when targeting pe-aarch64
2022-12-16 7:07 ` Jan Beulich
@ 2022-12-21 20:19 ` Mark Harmstone
2022-12-22 7:38 ` Jan Beulich
0 siblings, 1 reply; 16+ messages in thread
From: Mark Harmstone @ 2022-12-21 20:19 UTC (permalink / raw)
To: Jan Beulich; +Cc: binutils, wej22007, zac.walker
On 16/12/22 07:07, Jan Beulich wrote:
> On 16.12.2022 03:13, Mark Harmstone wrote:
>> There's currently an awful lot of test failures for pe-aarch64, because
>> of tests that assume that aarch64 implies ELF. This sets notarget for
>> these.
> Hmm, not very nice, but perhaps okay as a first step. However, ...
>
>> ---
>> binutils/testsuite/binutils-all/objcopy.exp | 1 +
>> gas/testsuite/gas/aarch64/adr_1.d | 1 +
>> gas/testsuite/gas/aarch64/advsimd-mov-bad.d | 1 +
>> gas/testsuite/gas/aarch64/b_1.d | 1 +
>> gas/testsuite/gas/aarch64/beq_1.d | 1 +
>> gas/testsuite/gas/aarch64/bfloat16-directive-be.d | 1 +
>> gas/testsuite/gas/aarch64/bfloat16-directive-le.d | 1 +
>> gas/testsuite/gas/aarch64/codealign.d | 2 +-
>> gas/testsuite/gas/aarch64/codealign_1.d | 1 +
>> gas/testsuite/gas/aarch64/dwarf.d | 1 +
>> gas/testsuite/gas/aarch64/ilp32-basic.d | 1 +
>> gas/testsuite/gas/aarch64/int-insns.d | 1 +
>> gas/testsuite/gas/aarch64/ldr_1.d | 1 +
>> gas/testsuite/gas/aarch64/litpool.d | 2 +-
>> gas/testsuite/gas/aarch64/mapmisc.d | 2 +-
>> gas/testsuite/gas/aarch64/mapping.d | 2 +-
>> gas/testsuite/gas/aarch64/mapping2.d | 2 +-
>> gas/testsuite/gas/aarch64/mapping3.d | 2 +-
>> gas/testsuite/gas/aarch64/mapping4.d | 2 +-
>> gas/testsuite/gas/aarch64/mapping_5.d | 1 +
>> gas/testsuite/gas/aarch64/mapping_6.d | 1 +
>> gas/testsuite/gas/aarch64/mops_invalid_2.d | 1 +
>> gas/testsuite/gas/aarch64/movw_label.d | 1 +
>> gas/testsuite/gas/aarch64/optional.d | 1 +
>> gas/testsuite/gas/aarch64/pac_ab_key.d | 1 +
>> gas/testsuite/gas/aarch64/pac_negate_ra_state.d | 1 +
>> gas/testsuite/gas/aarch64/pr20364.d | 1 +
>> gas/testsuite/gas/aarch64/pr27217.d | 1 +
>> gas/testsuite/gas/aarch64/pr29519.d | 1 +
>> gas/testsuite/gas/aarch64/programmer-friendly.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-data.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_g0.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_g1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_g2.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-gotoff_g1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-gottprel_g1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-insn.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-prel_g0.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-prel_g1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-prel_g2.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-prel_g3.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tlsldm-1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d | 1 +
>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_1.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_10.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_11.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_12.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_13.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_14.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_15.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_16.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_17.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_18.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_19.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_2.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_20.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_21.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_22.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_23.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_24.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_25.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_26.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_27.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_28.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_3.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_4.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_5.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_6.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_7.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_8.d | 1 +
>> gas/testsuite/gas/aarch64/sve-movprfx_9.d | 1 +
>> gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d | 1 +
>> gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d | 1 +
>> gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d | 1 +
>> gas/testsuite/gas/aarch64/system.d | 1 +
>> gas/testsuite/gas/aarch64/tail_padding.d | 1 +
>> gas/testsuite/gas/aarch64/tbz_1.d | 1 +
>> gas/testsuite/gas/aarch64/tls-desc.d | 1 +
>> gas/testsuite/gas/aarch64/tls.d | 1 +
>> gas/testsuite/gas/pe/big-obj.d | 1 +
> ... this clearly isn't an ELF test and hence can't fall into here.
> At least for PE tests I think it would be better if they really worked.
> If anything this should be xfail-ed imo (in a separate patch with a
> suitable description).
>
> Jan
Thanks Jan. This patch isn't essential, so I'll save it for a later date if it's contentious. The other four are the important ones.
Mark
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/5] Skip ELF-specific tests when targeting pe-aarch64
2022-12-21 20:19 ` Mark Harmstone
@ 2022-12-22 7:38 ` Jan Beulich
0 siblings, 0 replies; 16+ messages in thread
From: Jan Beulich @ 2022-12-22 7:38 UTC (permalink / raw)
To: Mark Harmstone; +Cc: binutils, wej22007, zac.walker
On 21.12.2022 21:19, Mark Harmstone wrote:
> On 16/12/22 07:07, Jan Beulich wrote:
>> On 16.12.2022 03:13, Mark Harmstone wrote:
>>> There's currently an awful lot of test failures for pe-aarch64, because
>>> of tests that assume that aarch64 implies ELF. This sets notarget for
>>> these.
>> Hmm, not very nice, but perhaps okay as a first step. However, ...
>>
>>> ---
>>> binutils/testsuite/binutils-all/objcopy.exp | 1 +
>>> gas/testsuite/gas/aarch64/adr_1.d | 1 +
>>> gas/testsuite/gas/aarch64/advsimd-mov-bad.d | 1 +
>>> gas/testsuite/gas/aarch64/b_1.d | 1 +
>>> gas/testsuite/gas/aarch64/beq_1.d | 1 +
>>> gas/testsuite/gas/aarch64/bfloat16-directive-be.d | 1 +
>>> gas/testsuite/gas/aarch64/bfloat16-directive-le.d | 1 +
>>> gas/testsuite/gas/aarch64/codealign.d | 2 +-
>>> gas/testsuite/gas/aarch64/codealign_1.d | 1 +
>>> gas/testsuite/gas/aarch64/dwarf.d | 1 +
>>> gas/testsuite/gas/aarch64/ilp32-basic.d | 1 +
>>> gas/testsuite/gas/aarch64/int-insns.d | 1 +
>>> gas/testsuite/gas/aarch64/ldr_1.d | 1 +
>>> gas/testsuite/gas/aarch64/litpool.d | 2 +-
>>> gas/testsuite/gas/aarch64/mapmisc.d | 2 +-
>>> gas/testsuite/gas/aarch64/mapping.d | 2 +-
>>> gas/testsuite/gas/aarch64/mapping2.d | 2 +-
>>> gas/testsuite/gas/aarch64/mapping3.d | 2 +-
>>> gas/testsuite/gas/aarch64/mapping4.d | 2 +-
>>> gas/testsuite/gas/aarch64/mapping_5.d | 1 +
>>> gas/testsuite/gas/aarch64/mapping_6.d | 1 +
>>> gas/testsuite/gas/aarch64/mops_invalid_2.d | 1 +
>>> gas/testsuite/gas/aarch64/movw_label.d | 1 +
>>> gas/testsuite/gas/aarch64/optional.d | 1 +
>>> gas/testsuite/gas/aarch64/pac_ab_key.d | 1 +
>>> gas/testsuite/gas/aarch64/pac_negate_ra_state.d | 1 +
>>> gas/testsuite/gas/aarch64/pr20364.d | 1 +
>>> gas/testsuite/gas/aarch64/pr27217.d | 1 +
>>> gas/testsuite/gas/aarch64/pr29519.d | 1 +
>>> gas/testsuite/gas/aarch64/programmer-friendly.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-data.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_g0.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_g1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_g2.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-gotoff_g1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-gottprel_g1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-insn.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-prel_g0.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-prel_g1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-prel_g2.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-prel_g3.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tlsldm-1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d | 1 +
>>> gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_1.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_10.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_11.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_12.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_13.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_14.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_15.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_16.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_17.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_18.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_19.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_2.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_20.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_21.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_22.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_23.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_24.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_25.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_26.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_27.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_28.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_3.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_4.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_5.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_6.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_7.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_8.d | 1 +
>>> gas/testsuite/gas/aarch64/sve-movprfx_9.d | 1 +
>>> gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d | 1 +
>>> gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d | 1 +
>>> gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d | 1 +
>>> gas/testsuite/gas/aarch64/system.d | 1 +
>>> gas/testsuite/gas/aarch64/tail_padding.d | 1 +
>>> gas/testsuite/gas/aarch64/tbz_1.d | 1 +
>>> gas/testsuite/gas/aarch64/tls-desc.d | 1 +
>>> gas/testsuite/gas/aarch64/tls.d | 1 +
>>> gas/testsuite/gas/pe/big-obj.d | 1 +
>> ... this clearly isn't an ELF test and hence can't fall into here.
>> At least for PE tests I think it would be better if they really worked.
>> If anything this should be xfail-ed imo (in a separate patch with a
>> suitable description).
>
> Thanks Jan. This patch isn't essential, so I'll save it for a later date if it's contentious. The other four are the important ones.
FTAOD my comment was merely about pe/big-obj.d. So perhaps you want to
split that off and get the rest of this change in?
Jan
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2022-12-22 7:38 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-12-16 2:13 [PATCH 1/5] Fix size of external_reloc for pe-aarch64 Mark Harmstone
2022-12-16 2:13 ` [PATCH 2/5] Skip ELF-specific tests when targeting pe-aarch64 Mark Harmstone
2022-12-16 7:07 ` Jan Beulich
2022-12-21 20:19 ` Mark Harmstone
2022-12-22 7:38 ` Jan Beulich
2022-12-16 2:13 ` [PATCH 3/5] Add pe-aarch64 relocations Mark Harmstone
2022-12-16 2:13 ` [PATCH 4/5] Add .secrel32 for pe-aarch64 Mark Harmstone
2022-12-16 2:14 ` [PATCH 5/5] Add aarch64-w64-mingw32 target Mark Harmstone
2022-12-16 7:28 ` Jan Beulich
2022-12-18 22:44 ` Martin Storsjö
2022-12-20 13:18 ` Mark Harmstone
2022-12-16 7:03 ` [PATCH 1/5] Fix size of external_reloc for pe-aarch64 Jan Beulich
2022-12-16 10:47 ` Tamar Christina
2022-12-20 12:59 ` Mark Harmstone
2022-12-20 13:10 ` Jan Beulich
2022-12-20 13:38 ` Tamar Christina
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