[Bug tree-optimization/108430] New: [13 Regression] Wrong code with -msve-vector-bits=512 since r13-707-g68e0063397

[Bug tree-optimization/108430] New: [13 Regression] Wrong code with -msve-vector-bits=512 since r13-707-g68e0063397

[acoplan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108430

            Bug ID: 108430
           Summary: [13 Regression] Wrong code with -msve-vector-bits=512
                    since r13-707-g68e0063397
           Product: gcc
           Version: 13.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: tree-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: acoplan at gcc dot gnu.org
  Target Milestone: ---

For the following testcase:

static long d;
static int i = 37;
static unsigned long a[22];
static unsigned short c[22];
static unsigned g[80];
static unsigned short *h = c;
static unsigned long *j = a;
int main() {
  for (long m = 0; m < 8; ++m)
    d = 1;
  for (unsigned char p = 0; p < 17; p += (d ? i : 0) - 35)
  {
    long t = h[p] ? i : j[p];
    g[p] = t;
  }
  if (g[0])
    __builtin_abort ();
}

we appear to miscompile it with -O3 -march=armv8.2-a+sve -msve-vector-bits=512
since r13-707-g68e0063397ba820e71adc220b2da0581dce29ffa :


commit 68e0063397ba820e71adc220b2da0581dce29ffa (HEAD, refs/bisect/bad)         
Author: Richard Biener <rguenther@suse.de>                                      
Date:   Mon Apr 11 12:36:53 2022                                                

    Force the selection operand of a GIMPLE COND_EXPR to be a register

[Bug tree-optimization/108430] [13 Regression] Wrong code with -msve-vector-bits=512 since r13-707-g68e0063397

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108430

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |13.0
                 CC|                            |rguenth at gcc dot gnu.org

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
some more analysis from arm folks would be nice

[Bug tree-optimization/108430] [13 Regression] Wrong code with -msve-vector-bits=512 since r13-707-g68e0063397

[rsandifo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108430

rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |rsandifo at gcc dot gnu.org
             Status|UNCONFIRMED                 |ASSIGNED
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2023-02-09
           Assignee|unassigned at gcc dot gnu.org      |rsandifo at gcc dot gnu.org

--- Comment #2 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> ---
Mine.

[Bug tree-optimization/108430] [13 Regression] Wrong code with -msve-vector-bits=512 since r13-707-g68e0063397

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108430

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P1

[Bug tree-optimization/108430] [13 Regression] Wrong code with -msve-vector-bits=512 since r13-707-g68e0063397

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108430

--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Richard Sandiford <rsandifo@gcc.gnu.org>:

https://gcc.gnu.org/g:2a8ce4b52f5892a10a02b94d7be689e59a444ff6

commit r13-6409-g2a8ce4b52f5892a10a02b94d7be689e59a444ff6
Author: Richard Sandiford <richard.sandiford@arm.com>
Date:   Thu Mar 2 10:30:20 2023 +0000

    vect: Fix voluntarily-masked negative conditionals [PR108430]

    vectorizable_condition checks whether a COND_EXPR condition is used
    elsewhere with a loop mask.  If so, it applies the loop mask to the
    COND_EXPR too, to reduce the number of live masks and to increase the
    chance of combining the AND with the comparison.

    There is also code to do this for inverted conditions.  E.g. if
    we have a < b ? c : d and something else is conditional on !(a < b)
    (such as a load in d), we use !(a < b) ? d : c and apply the loop
    mask to !(a < b).

    This inversion relied on the function's bitop1/bitop2 mechanism.
    However, that mechanism is skipped if the condition is split out of
    the COND_EXPR as a separate statement.  This meant that we could end
    up using the inverse of the intended condition.

    There is a separate way of negating the condition when a mask
    is being applied (which is also used for EXTRACT_LAST reductions).
    This patch uses that instead.

    As well as the testcase, this fixes aarch64/sve/vcond_{4,17}_run.c.

    gcc/
            PR tree-optimization/108430
            * tree-vect-stmts.cc (vectorizable_condition): Fix handling
            of inverted condition.

    gcc/testsuite/
            PR tree-optimization/108430
            * gcc.target/aarch64/sve/pr108430.c: New test.

[Bug tree-optimization/108430] [13 Regression] Wrong code with -msve-vector-bits=512 since r13-707-g68e0063397

[rsandifo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108430

--- Comment #4 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> ---
Fixed on trunk, but the underlying bug is present in GCC 12 too.

[Bug tree-optimization/108430] [12 Regression] Wrong code with -msve-vector-bits=512 since r13-707-g68e0063397

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108430

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to work|                            |13.0
      Known to fail|13.0                        |
   Target Milestone|13.0                        |12.3
            Summary|[13 Regression] Wrong code  |[12 Regression] Wrong code
                   |with -msve-vector-bits=512  |with -msve-vector-bits=512
                   |since r13-707-g68e0063397   |since r13-707-g68e0063397
           Priority|P1                          |P2

[Bug tree-optimization/108430] [12 Regression] Wrong code with -msve-vector-bits=512 since r13-707-g68e0063397

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108430

--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-12 branch has been updated by Richard Sandiford
<rsandifo@gcc.gnu.org>:

https://gcc.gnu.org/g:33a69d0b0b772610463d1d586f3f0c9820fc969e

commit r12-9378-g33a69d0b0b772610463d1d586f3f0c9820fc969e
Author: Richard Sandiford <richard.sandiford@arm.com>
Date:   Mon Apr 3 09:57:06 2023 +0100

    vect: Fix voluntarily-masked negative conditionals [PR108430]

    vectorizable_condition checks whether a COND_EXPR condition is used
    elsewhere with a loop mask.  If so, it applies the loop mask to the
    COND_EXPR too, to reduce the number of live masks and to increase the
    chance of combining the AND with the comparison.

    There is also code to do this for inverted conditions.  E.g. if
    we have a < b ? c : d and something else is conditional on !(a < b)
    (such as a load in d), we use !(a < b) ? d : c and apply the loop
    mask to !(a < b).

    This inversion relied on the function's bitop1/bitop2 mechanism.
    However, that mechanism is skipped if the condition is split out of
    the COND_EXPR as a separate statement.  This meant that we could end
    up using the inverse of the intended condition.

    There is a separate way of negating the condition when a mask
    is being applied (which is also used for EXTRACT_LAST reductions).
    This patch uses that instead.

    As well as the testcase, this fixes aarch64/sve/vcond_{4,17}_run.c.

    gcc/
            PR tree-optimization/108430
            * tree-vect-stmts.cc (vectorizable_condition): Fix handling
            of inverted condition.

    gcc/testsuite/
            PR tree-optimization/108430
            * gcc.target/aarch64/sve/pr108430.c: New test.

    (cherry picked from commit 2a8ce4b52f5892a10a02b94d7be689e59a444ff6)

[Bug tree-optimization/108430] [12 Regression] Wrong code with -msve-vector-bits=512 since r13-707-g68e0063397

[rsandifo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108430

rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|ASSIGNED                    |RESOLVED

--- Comment #6 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> ---
Fixed.