[Bug target/114668] New: [14] RISC-V rv64gcv: miscompile at -O3

[Bug target/114668] New: [14] RISC-V rv64gcv: miscompile at -O3

[patrick at rivosinc dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114668

            Bug ID: 114668
           Summary: [14] RISC-V rv64gcv: miscompile at -O3
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: patrick at rivosinc dot com
  Target Milestone: ---

Testcase:
char a;
int b;
short e[14];
char f[4][12544];
_Bool c[4][5];
int main() {
  for (int i = 0; i < 4; ++i)
    for (int l = 0; l < 15; ++l)
      for (int m = 0; m < 15; ++m)
        f[i][l * m] = 3;
  for (int j = 0; j < 4; j += 1)
    for (int k = 3; k < 13; k += 3)
      for (_Bool l = 0; l < 1; l = 1)
        for (int m = 0; m < 4; m += 1) {
          a = 0;
          b -= e[k];
          c[j][m] = f[j][6];
        }
  for (long i = 2; i < 4; ++i)
    __builtin_printf("%X\n", c[3][3]);
}

Commands:
> /scratch/tc-testing/tc-apr-9/build-rv64gcv/bin/riscv64-unknown-linux-gnu-gcc -march=rv64gcv -O3 red.c -o red.out
> /scratch/tc-testing/tc-apr-9/build-rv64gcv/bin/qemu-riscv64 red.out
1
FF

> /scratch/tc-testing/tc-apr-9/build-rv64gcv/bin/riscv64-unknown-linux-gnu-gcc -march=rv64gcv -O2 red.c -o red.out
> /scratch/tc-testing/tc-apr-9/build-rv64gcv/bin/qemu-riscv64 red.out
1
1

Adjusting the f array to its minimal size of f[4][255] makes the issue go away.

Looks similar to pr114665 so this might be a duplicate/related. Submitting this
bug in case it's easier to understand the root cause.

Found via fuzzer.

[Bug target/114668] [14] RISC-V rv64gcv: miscompile at -O3

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114668

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Looks to be working on aarch64 (both with/without SVE):
```
[apinski@xeond2 upstream-cross-aarch64]$ ./install/bin/aarch64-linux-gnu-gcc
-O3 -fno-vect-cost-model t6.c -static -fno-vect-cost-model
[apinski@xeond2 upstream-cross-aarch64]$ ./install-qemu/bin/qemu-aarch64 a.out
1
1
[apinski@xeond2 upstream-cross-aarch64]$ ./install/bin/aarch64-linux-gnu-gcc
-O3 -fno-vect-cost-model t6.c -static -march=armv9-a+sve -fno-vect-cost-model
[apinski@xeond2 upstream-cross-aarch64]$ ./install-qemu/bin/qemu-aarch64 a.out
1
1

```

[Bug target/114668] [14] RISC-V rv64gcv: miscompile at -O3

[rdapp at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114668

--- Comment #2 from Robin Dapp <rdapp at gcc dot gnu.org> ---
This, again, seems to be a problem with bit extraction from masks.
For some reason I didn't add the VLS modes to the corresponding vec_extract
patterns.  With those in place the problem is gone because we go through the
expander which does the right thing.

I'm still checking what exactly goes wrong without those as there is likely a
latent bug.

[Bug target/114668] [14] RISC-V rv64gcv: miscompile at -O3

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114668

--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Robin Dapp <rdapp@gcc.gnu.org>:

https://gcc.gnu.org/g:02cc8f3e68f9af96d484d9946ceaa9e3eed38151

commit r14-9972-g02cc8f3e68f9af96d484d9946ceaa9e3eed38151
Author: Robin Dapp <rdapp@ventanamicro.com>
Date:   Mon Apr 15 12:44:56 2024 +0200

    RISC-V: Add VLS to mask vec_extract [PR114668].

    This adds the missing VLS modes to the mask extract expanders.

    gcc/ChangeLog:

            PR target/114668

            * config/riscv/autovec.md: Add VLS.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/autovec/pr114668.c: New test.

[Bug target/114668] [14] RISC-V rv64gcv: miscompile at -O3

[rdapp at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114668

Robin Dapp <rdapp at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|UNCONFIRMED                 |RESOLVED

--- Comment #4 from Robin Dapp <rdapp at gcc dot gnu.org> ---
I didn't have the time to fully investigate but the default path without vec
extract is definitely broken for masks.  I'd probably sleep better if we fixed
that at some point but for now the obvious fix is to add the missing expanders.

Patrick, I'm still unable to reproduce PR114665 (maybe also a qemu
difference?).  Could you re-check with this fix?  Thanks.