[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:77a62f8a5dbe5a5838d7b8e258f775e30eda4ead

commit 77a62f8a5dbe5a5838d7b8e258f775e30eda4ead
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Nov 15 13:55:36 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-15   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 3156e91906d..b755a0044ac 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -9,7 +9,7 @@ gcc/
 	* config/rs6000/rs6000.opt (rs6000-memcpy-inline-bytes): New parameter,
 	set to 0.
 	* config/rs6000/rs6000-string.cc (expand_block_move): Only do
-	optimization if rs6000-memcpy-inline-bytes is 16.
+	optimization if rs6000-memcpy-inline-bytes <= 16.
 
 ==================== Dmf004 branch, patch #20.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:4dddc22d82a43bbb311293c2768f7ca27b9cffc8

commit 4dddc22d82a43bbb311293c2768f7ca27b9cffc8
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 17 17:31:51 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-17   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 69ae5984bd9..998df585717 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,14 @@
+==================== Dmf004 branch, patch #29.
+
+Reset memcpy inline bytes parameter.
+
+2022-11-17   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.opt (--param rs6000-memcpy-inline-bytes): Make
+	the default 16, not 32.
+
 ==================== Dmf004 branch, patch #28 was reverted.
 
 ==================== Dmf004 branch, patch #27.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:8ea6d6af739fa48acc2a980525ce986d45d39369

commit 8ea6d6af739fa48acc2a980525ce986d45d39369
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 17 15:06:03 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-17   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index c72f248797d..3186721cb64 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,21 @@
+==================== Dmf004 branch, patch #28.
+
+Add suuport to use stxvl for variable sized memsets.
+
+2022-11-17   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-protos.h (expand_block_set): Add declaration.
+	* config/rs6000/rs6000-string.cc (expand_block_set): New support for
+	optimizing variable sized memsets.
+	* config/rs6000/rs6000.md (setmem<mode>): Add setmemdi along with
+	setmemsi.  Add support for optimizing memsets of other bytes than just
+	0.  Add support for using stxvl to support variable sized sets.
+	* config/rs6000/rs6000.opt (--param rs6000-memcpy-inline-bytes): Make
+	the default 16, not 32.
+	((--param rs6000-memset-inline-bytes): New parameter.
+
 ==================== Dmf004 branch, patch #27.
 
 Fix lxvl and stxvl wrong conditional branch.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:b553f4302e10825e5ed3e006bfc875076a963d56

commit b553f4302e10825e5ed3e006bfc875076a963d56
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 17 00:15:17 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 02847852131..c72f248797d 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,14 @@
+==================== Dmf004 branch, patch #27.
+
+Fix lxvl and stxvl wrong conditional branch.
+
+2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_block_move_variable): Fix wrong
+	conditional branch.
+
 ==================== Dmf004 branch, patch #26.
 
 Limit memcpy inline copy to do just 2 variable moves.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:60e265feb06630d1c826d16e93848264da265949

commit 60e265feb06630d1c826d16e93848264da265949
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 16 15:56:51 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index d0b36e8a986..02847852131 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,19 @@
+==================== Dmf004 branch, patch #26.
+
+Limit memcpy inline copy to do just 2 variable moves.
+
+2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_lxvl_stxvl): New helper
+	function.
+	(expand_block_move_variable): Only do 2 variable moves per memcpy call.
+	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove
+	bumping up rs6000_memcpy_inline_bytes if -mcpu=future.
+	* config/rs6000/rs6000.opt (-param=rs6000-memcpy-inline-bytes=): Set
+	default to 32, not 16.
+
 ==================== Dmf004 branch, patch #25.
 
 Add lxvprl and stxvprl support.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:0b7b794d002581e463edd9c0f5fbe5cd9cf65968

commit 0b7b794d002581e463edd9c0f5fbe5cd9cf65968
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 16 13:55:21 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index fcc4bbbe90e..d0b36e8a986 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,19 @@
+==================== Dmf004 branch, patch #25.
+
+Add lxvprl and stxvprl support.
+
+2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_block_move_variable): Add
+	check for vect_partial_vector_usage before optimizing variable memcpys.
+	Add support for lxvprl and stxvprl if we have them.
+	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Bump up
+	memcpy inline size if we have lxvprl and stxvprl.
+	* config/rs6000/vsx.md (lxvprl): New insn.
+	(stxprl): New insn.
+
 ==================== Dmf004 branch, patch #24.
 
 Tweak variable move support.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:a40f375bb844e10cf7c3127ad211ffb1c58fb85b

commit a40f375bb844e10cf7c3127ad211ffb1c58fb85b
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 16 13:11:46 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index e0b854db699..fcc4bbbe90e 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,17 @@
+==================== Dmf004 branch, patch #24.
+
+Tweak variable move support.
+
+2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_block_move_variable): Move
+	testing whether we want to do variable moves here.  For now, limit moves
+	to 0..16 bytes.
+	(expand_block_move): Move variable tests to
+	expand_block_moves_variable.
+
 ==================== Dmf004 branch, patch #23.
 
 Don't do load/store vector with length if overlap.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:7194a57231439f50c538641365db355a39d0023c

commit 7194a57231439f50c538641365db355a39d0023c
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 16 03:29:30 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 01dfa7e2868..e0b854db699 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,15 @@
+==================== Dmf004 branch, patch #23.
+
+Don't do load/store vector with length if overlap.
+
+2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_block_move): Don't do the
+	optimization to use load/store vector with length if the source and
+	destination might overlap.
+
 ==================== Dmf004 branch, patch #22.
 
 Allow for inline code for memcpy to move more than 16 bytes.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:b2bfe0e370dd0bfc05c32fcbf39bb27ac32e0b5b

commit b2bfe0e370dd0bfc05c32fcbf39bb27ac32e0b5b
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Nov 15 16:23:42 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-15   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index b755a0044ac..01dfa7e2868 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,17 @@
+==================== Dmf004 branch, patch #22.
+
+Allow for inline code for memcpy to move more than 16 bytes.
+
+2022-11-15   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (toplevel): Include optabs.h.
+	(expand_block_move_variable): New helper function, move variable byte
+	copy support here.  Add support to move more than 16 bytes.
+	(expand_block_move): Move variable copy support to
+	expand_block_move_variable.
+
 ==================== Dmf004 branch, patch #21.
 
 Add parameter for memcpy inline code moves

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:965fe0150a7a28575bab68b60c8c7f9895468b8c

commit 965fe0150a7a28575bab68b60c8c7f9895468b8c
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Nov 15 13:55:36 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-15   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 3156e91906d..b755a0044ac 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -9,7 +9,7 @@ gcc/
 	* config/rs6000/rs6000.opt (rs6000-memcpy-inline-bytes): New parameter,
 	set to 0.
 	* config/rs6000/rs6000-string.cc (expand_block_move): Only do
-	optimization if rs6000-memcpy-inline-bytes is 16.
+	optimization if rs6000-memcpy-inline-bytes <= 16.
 
 ==================== Dmf004 branch, patch #20.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:8e93aea4c9c9518da69791875638817bc05245cc

commit 8e93aea4c9c9518da69791875638817bc05245cc
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Nov 15 12:29:15 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-15   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index df595d768f6..3156e91906d 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,16 @@
+==================== Dmf004 branch, patch #21.
+
+Add parameter for memcpy inline code moves
+
+2022-11-15   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.opt (rs6000-memcpy-inline-bytes): New parameter,
+	set to 0.
+	* config/rs6000/rs6000-string.cc (expand_block_move): Only do
+	optimization if rs6000-memcpy-inline-bytes is 16.
+
 ==================== Dmf004 branch, patch #20.
 
 Use lxvl and stxvl for small variable memcpy moves.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:351194afe0231d20d1321bf24446b2a0dfdc688f

commit 351194afe0231d20d1321bf24446b2a0dfdc688f
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Nov 14 19:59:48 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-14   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 3fa2264624b..df595d768f6 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,26 @@
+==================== Dmf004 branch, patch #20.
+
+Use lxvl and stxvl for small variable memcpy moves.
+
+This patch adds support to generate inline code for block copy with a variable
+size if the size is 16 bytes or less.  If the size is more than 16 bytes, just
+call memcpy.
+
+To handle variable sizes, I found we need DImode versions of the two insns for
+copying memory (cpymem<mode> and <movmem<mode>).
+
+2022-11-14   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_block_move): Add support for
+	using lxvl and stxvl to move up to 16 bytes inline without calling
+	memcpy.
+	* config/rs6000/rs6000.md (cpymem<mode>): Expand cpymemsi to also
+	provide cpymemdi to handle DImode sizes as well as SImode sizes.
+	(movmem<mode>): Expand movmemsi to also provide movmemdi to handle
+	DImode sizes as well as SImode sizes.
+
 ==================== Dmf004 branch, patch #17.
 
 Support load/store vector with right length.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:7c6a0007d3c4a1764647cf35019c1541d5b9c36d

commit 7c6a0007d3c4a1764647cf35019c1541d5b9c36d
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Nov 11 22:48:59 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-11   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 39 +++++++++++++++++++++++++++++++++++++--
 1 file changed, 37 insertions(+), 2 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index c910d1b5625..3fa2264624b 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,6 +1,40 @@
+==================== Dmf004 branch, patch #17.
+
+Support load/store vector with right length.
+
+This patch adds support for new instructions that may be added to the PowerPC
+architecture in the future to enhance the load and store vector with length
+instructions.
+
+The current instructions (lxvl, lxvll, stxvl, and stxvll) are inconvient to use
+since the count for the number of bytes must be in the top 8 bits of the GPR
+register, instead of the bottom 8 bits.  This meant that code generating these
+instructions typically had to do a shift left by 56 bits to get the count into
+the right position.  In a future version of the PowerPC architecture, new
+variants of these instructions might be added that expect the count to be in
+the bottom 8 bits of the GPR register.  These patches add this support to GCC
+if the user uses the -mcpu=future option.
+
+2022-11-11   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/vsx.md (lxvl): If -mcpu=future, generate the lxvl with
+	the shift count automaticaly used in the insn.
+	(lxvrl): New insn for -mcpu=future.
+	(lxvrll): Likewise.
+	(stxvl): If -mcpu=future, generate the stxvl with the shift count
+	automaticaly used in the insn.
+	(stxvrl): New insn for -mcpu=future.
+	(stxvrll): Likewise.
+
+gcc/testsuite/
+
+	* gcc.target/powerpc/lxvrl.c: New test.
+
 ==================== Dmf004 branch, patch #16.
 
-Add saturating subtract built-in.
+Add saturating subtract built-ins.
 
 This patch adds support for a saturating subtract built-in function that may be
 added to a future PowerPC processor.  Note, if it is added, the name of the
@@ -32,12 +66,13 @@ gcc/
 	built-in insn declarations.
 	(sat_sub<mode>3_dot): Likewise.
 	(sat_sub<mode>3_dot2): Likewise.
+	* doc/extend.texi (Future PowerPC built-ins): New section.
 
 gcc/testsuite/
 
 	* gcc.target/powerpc/subfus-1.c: New test.
 	* gcc.target/powerpc/subfus-2.c: Likewise.
-	* lib/target-supports.exp (check_effective_target_powerpc_subfus_ok):
+	* lib/target-supports.exp (check_effective_target_powerpc_future_ok):
 	New effective target.
 
 ==================== Dmf004 branch, patch #15.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:56f04bd0591571b3a7e19a724bf7f3624534b573

commit 56f04bd0591571b3a7e19a724bf7f3624534b573
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Nov 11 18:16:30 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-11   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 42 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 3ded45b2e72..c910d1b5625 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,45 @@
+==================== Dmf004 branch, patch #16.
+
+Add saturating subtract built-in.
+
+This patch adds support for a saturating subtract built-in function that may be
+added to a future PowerPC processor.  Note, if it is added, the name of the
+built-in function may change before GCC 13 is released.  If the name changes, we
+will submit a patch changing the name.
+
+I did add support for providing dense math built-in functions, even though at
+present, we have not added any new built-in functions for dense math.
+
+2022-11-11   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add support
+	for flagging invalid use of future built-in functions.
+	(rs6000_builtin_is_supported): Add support for future built-in
+	functions.
+	* config/rs6000/rs6000-builtins.def (__builtin_saturate_subtract32): New
+	built-in function for -mcpu=future.
+	(__builtin_saturate_subtract64): Likewise.
+	* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add stanzas
+	for -mcpu=future built-ins.
+	(stanza_map): Likewise.
+	(enable_string): Likewise.
+	(struct attrinfo): Likewise.
+	(parse_bif_attrs): Likewise.
+	(write_decls): Likewise.
+	* config/rs6000/rs6000.md (sat_sub<mode>3): Add saturating subtract
+	built-in insn declarations.
+	(sat_sub<mode>3_dot): Likewise.
+	(sat_sub<mode>3_dot2): Likewise.
+
+gcc/testsuite/
+
+	* gcc.target/powerpc/subfus-1.c: New test.
+	* gcc.target/powerpc/subfus-2.c: Likewise.
+	* lib/target-supports.exp (check_effective_target_powerpc_subfus_ok):
+	New effective target.
+
 ==================== Dmf004 branch, patch #15.
 
 Add support for 1,024 bit DMR registers.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:a14bc6e59f5f0037c0d1a1991bdfb2bc4bf16da1

commit a14bc6e59f5f0037c0d1a1991bdfb2bc4bf16da1
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 9 17:39:55 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 0c43af20d62..3ded45b2e72 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -55,7 +55,7 @@ gcc/testsuite/
 
 Switch to dense math names for all MMA operations.
 
-2022-11-04   Michael Meissner  <meissner@linux.ibm.com>
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
 
 gcc/

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:c0071679f795434fa4564fff41b47bbad114f3b4

commit c0071679f795434fa4564fff41b47bbad114f3b4
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 9 00:58:09 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 237 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 237 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 5a6fa542ab6..0c43af20d62 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,240 @@
+==================== Dmf004 branch, patch #15.
+
+Add support for 1,024 bit DMR registers.
+
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (UNSPEC_DM_INSERT512_UPPER): New unspec.
+	(UNSPEC_DM_INSERT512_LOWER): Likewise.
+	(UNSPEC_DM_EXTRACT512): Likewise.
+	(UNSPEC_DMR_RELOAD_FROM_MEMORY): Likewise.
+	(UNSPEC_DMR_RELOAD_TO_MEMORY): Likewise.
+	(movtdo): New define_expand and define_insn_and_split to implement 1,024
+	bit DMR registers.
+	(movtdo_insert512_upper): New insn.
+	(movtdo_insert512_lower): Likewise.
+	(movtdo_extract512): Likewise.
+	(reload_dmr_from_memory): Likewise.
+	(reload_dmr_to_memory): Likewise.
+	* config/rs6000/rs6000-builtin.cc (rs6000_type_string): Add DMR
+	support.
+	(rs6000_init_builtins): Add support for __dmr keyword.
+	* config/rs6000/rs6000-call.cc (rs6000_return_in_memory): Add support
+	for TDOmode.
+	(rs6000_function_arg): Likewise.
+	* config/rs6000/rs6000-modes.def (TDOmode): New mode.
+	* config/rs6000/rs6000.cc (rs6000_hard_regno_nregs_internal): Add
+	support for TDOmode.
+	(rs6000_hard_regno_mode_ok_uncached): Likewise.
+	(rs6000_hard_regno_mode_ok): Likewise.
+	(rs6000_modes_tieable_p): Likewise.
+	(rs6000_debug_reg_global): Likewise.
+	(rs6000_setup_reg_addr_masks): Likewise.
+	(rs6000_init_hard_regno_mode_ok): Add support for TDOmode.  Setup reload
+	hooks for DMR mode.
+	(reg_offset_addressing_ok_p): Add support for TDOmode.
+	(rs6000_emit_move): Likewise.
+	(rs6000_secondary_reload_simple_move): Likewise.
+	(rs6000_secondary_reload_class): Likewise.
+	(rs6000_mangle_type): Add mangling for __dmr type.
+	(rs6000_dmr_register_move_cost): Add support for TDOmode.
+	(rs6000_split_multireg_move): Likewise.
+	(rs6000_invalid_conversion): Likewise.
+	* config/rs6000/rs6000.h (VECTOR_ALIGNMENT_P): Add TDOmode.
+	(enum rs6000_builtin_type_index): Add DMR type nodes.
+	(dmr_type_node): Likewise.
+	(ptr_dmr_type_node): Likewise.
+
+gcc/testsuite/
+
+	* gcc.target/powerpc/dm-1024bit.c: New test.
+
+==================== Dmf004 branch, patch #14.
+
+Switch to dense math names for all MMA operations.
+
+2022-11-04   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (vvi4i4i8_dm): New int attribute.
+	(avvi4i4i8_dm): Likewise.
+	(vvi4i4i2_dm): Likewise.
+	(avvi4i4i2_dm): Likewise.
+	(vvi4i4_dm): Likewise.
+	(avvi4i4_dm): Likewise.
+	(pvi4i2_dm): Likewise.
+	(apvi4i2_dm): Likewise.
+	(vvi4i4i4_dm): Likewise.
+	(avvi4i4i4_dm): Likewise.
+	(mma_<vv>): Add support for running on DMF systems, generating the dense
+	math instruction and using the dense math accumulators.
+	(mma_<avv>): Likewise.
+	(mma_<pv>): Likewise.
+	(mma_<apv>): Likewise.
+	(mma_<vvi4i4i8>): Likewise.
+	(mma_<avvi4i4i8>): Likewise.
+	(mma_<vvi4i4i2>): Likewise.
+	(mma_<avvi4i4i2>): Likewise.
+	(mma_<vvi4i4>): Likewise.
+	(mma_<avvi4i4): Likewise.
+	(mma_<pvi4i2>): Likewise.
+	(mma_<apvi4i2): Likewise.
+	(mma_<vvi4i4i4>): Likewise.
+	(mma_<avvi4i4i4>): Likewise.
+
+gcc/testsuite/
+
+	* gcc.target/powerpc/dm-double-test.c: New test.
+	* lib/target-supports.exp (check_effective_target_ppc_dmr_ok): New
+	target test.
+
+==================== Dmf004 branch, patch #13.
+
+Make MMA insns support dmr registers.
+
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (mma_<acc>): New define_expand to handle
+	mma_<acc> for dense math and non dense math.
+	(mma_<acc> insn): Restrict to non dense math.
+	(mma_xxsetaccz): Convert to define_expand to handle non dense math and
+	dense math.
+	(mma_xxsetaccz_p10): Rename from mma_xxsetaccz and restrict usage to non
+	dense math.
+	(mma_xxsetaccz_dm): Dense math version of mma_xxsetaccz.
+	(mma_<vv>): Add support for dense math.
+	(mma_<avv>): Likewise.
+	(mma_<pv>): Likewise.
+	(mma_<apv>): Likewise.
+	(mma_<vvi4i4i8>): Likewise.
+	(mma_<avvi4i4i8>): Likewise.
+	(mma_<vvi4i4i2>): Likewise.
+	(mma_<avvi4i4i2>): Likewise.
+	(mma_<vvi4i4>): Likewise.
+	(mma_<avvi4i4>): Likewise.
+	(mma_<pvi4i2>): Likewise.
+	(mma_<apvi4i2>): Likewise.
+	(mma_<vvi4i4i4>): Likewise.
+	(mma_<avvi4i4i4>): Likewise.
+	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
+	__PPC_DMR__ if we have dense math instructions.
+	* config/rs6000/rs6000.cc (print_operand): Make %A handle only DMRs if
+	dense math and only FPRs if not dense math.
+	(rs6000_split_multireg_move): Do not generate accumulator prime or
+	de-prime instructions if dense math.
+
+==================== Dmf004 branch, patch #12.
+
+Add support for accumulators in DMR registers.
+
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/constraints.md (wD constraint): New constraint.
+	* config/rs6000/mma.md (UNSPEC_DM_ASSEMBLE_ACC): New unspec.
+	(movxo): Convert into define_expand.
+	(movxo_fpr): Version of movxo where accumulators overlap with FPRs.
+	(movxo_dm): Dense math version of movxo.
+	(mma_assemble_acc): Add dense match support to define_expand.
+	(mma_assemble_acc_fpr): Rename from mma_assemble_acc, and restrict it to
+	non dense math.
+	(mma_assemble_acc_dm): Dense math version of mma_assemble_acc.
+	(mma_disassemble_acc): Add dense math support to define_expand.
+	(mma_disassemble_acc_fpr): Rename from mma_disassemble_acc, and restrict
+	it to non dense math.
+	(mma_disassemble_acc_dm): Dense math version of mma_disassemble_acc.
+	* config/rs6000/predicates.md (dmr_operand): New predicate.
+	(accumulator_operand): Likewise.
+	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): Add -mdense-math.
+	(POWERPC_MASKS): Likewise.
+	* config/rs6000/rs6000.cc (enum rs6000_reg_type): Add DMR_REG_TYPE.
+	(enum rs6000_reload_reg_type): Add RELOAD_REG_DMR.
+	(LAST_RELOAD_REG_CLASS): Add support for DMR registers.
+	(reload_reg_map): Likewise.
+	(rs6000_reg_names): Likewise.
+	(alt_reg_names): Likewise.
+	(rs6000_hard_regno_nregs_internal): Likewise.
+	(rs6000_hard_regno_mode_ok_uncached): Likewise.
+	(rs6000_debug_reg_global): Likewise.
+	(rs6000_setup_reg_addr_masks): Likewise.
+	(rs6000_init_hard_regno_mode_ok): Likewise.
+	(rs6000_option_override_internal): Add checking for -mdense-math.
+	(rs6000_secondary_reload_memory): Add support for DMR registers.
+	(rs6000_secondary_reload_simple_move): Likewise.
+	(rs6000_preferred_reload_class): Likewise.
+	(rs6000_secondary_reload_class): Likewise.
+	(print_operand): Make %A handle both FPRs and DMRs.
+	(rs6000_dmr_register_move_cost): New helper function.
+	(rs6000_register_move_cost): Add support for DMR registers.
+	(rs6000_memory_move_cost): Likewise.
+	(rs6000_compute_pressure_classes): Likewise.
+	(rs6000_debugger_regno): Likewise.
+	(rs6000_opt_masks): Add -mdense-math.
+	(rs6000_split_multireg_move): Add support for DMRs.
+	* config/rs6000/rs6000.h (UNITS_PER_DMR_WORD): New macro.
+	(FIRST_PSEUDO_REGISTER): Update for DMRs.
+	(FIXED_REGISTERS): Add DMRs.
+	(CALL_REALLY_USED_REGISTERS): Likewise.
+	(REG_ALLOC_ORDER): Likewise.
+	(enum reg_class): Add DM_REGS.
+	(REG_CLASS_NAMES): Likewise.
+	(REG_CLASS_CONTENTS): Likewise.
+	* config/rs6000/rs6000.md (FIRST_DMR_REGNO): New constant.
+	(LAST_DMR_REGNO): Likewise.
+	(isa attribute): Add 'dm' and 'not_dm' attributes.
+	(enabled attribute): Support 'dm' and 'not_dm' attributes.
+	* config/rs6000/rs6000.opt (-mdense-math): New switch.
+	* doc/md.texi (PowerPC constraints): Document wD constraint.
+
+==================== Dmf004 branch, patch #11.
+
+Make -mcpu=future enable -mblock-ops-vector-pair.
+
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): Add
+	-mblock-ops-vector-pair.
+	(POWERPC_MASKS): Likewise.
+
+==================== Dmf004 branch, patch #10.
+
+Add -mcpu=future.
+
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
+	__ARCH_PWR_FUTURE__ if -mcpu=future.
+	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): New macro.
+	(POWERPC_MASKS): Add -mfuture.
+	* config/rs6000/rs6000-opts.h (enum processor_type): Add
+	PROCESSOR_FUTURE.
+	* config/rs6000/rs6000-tables.opt: Regenerate.
+	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Add
+	-mcpu=future support.  Make -mtune=future act like -mtune=power10 for
+	now.
+	(rs6000_machine_from_flags): Likewise.
+	(rs6000_reassociation_width): Likewise.
+	(rs6000_adjust_cost): Likewise.
+	(rs6000_issue_rate): Likewise.
+	(rs6000_sched_reorder): Likewise.
+	(rs6000_sched_reorder2): Likewise.
+	(rs6000_register_move_cost): Likewise.
+	(rs6000_opt_masks): Add -mfuture.
+	* config/rs6000/rs6000.h (ASM_CPU_SUPPORT): Likewise.
+	* config/rs6000/rs6000.opt (-mfuture): New undocumented debug switch.
+	* config/rs6000/rs6000.md (cpu attribute): Add -mcpu=future support.
+	* doc/invoke.texi (IBM RS/6000 and PowerPC Options): Document -mcpu=future.
+
 ==================== Dmf004 branch, patch #4.
 
 Patch libgcc to always use _Float128 and _Complex _Float128 on PowerPC.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:679d1ff882c19a3c6abcbbf33b9c9c9d07919f21

commit 679d1ff882c19a3c6abcbbf33b9c9c9d07919f21
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 17 15:06:03 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-17   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index c72f248797d..3186721cb64 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,21 @@
+==================== Dmf004 branch, patch #28.
+
+Add suuport to use stxvl for variable sized memsets.
+
+2022-11-17   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-protos.h (expand_block_set): Add declaration.
+	* config/rs6000/rs6000-string.cc (expand_block_set): New support for
+	optimizing variable sized memsets.
+	* config/rs6000/rs6000.md (setmem<mode>): Add setmemdi along with
+	setmemsi.  Add support for optimizing memsets of other bytes than just
+	0.  Add support for using stxvl to support variable sized sets.
+	* config/rs6000/rs6000.opt (--param rs6000-memcpy-inline-bytes): Make
+	the default 16, not 32.
+	((--param rs6000-memset-inline-bytes): New parameter.
+
 ==================== Dmf004 branch, patch #27.
 
 Fix lxvl and stxvl wrong conditional branch.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:188e5f8f1068ee384029dd49fb4e4f00b4104036

commit 188e5f8f1068ee384029dd49fb4e4f00b4104036
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 17 00:15:17 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 02847852131..c72f248797d 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,14 @@
+==================== Dmf004 branch, patch #27.
+
+Fix lxvl and stxvl wrong conditional branch.
+
+2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_block_move_variable): Fix wrong
+	conditional branch.
+
 ==================== Dmf004 branch, patch #26.
 
 Limit memcpy inline copy to do just 2 variable moves.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:8c7389e54e82f03e486830da7a2d4c8b57930974

commit 8c7389e54e82f03e486830da7a2d4c8b57930974
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 16 15:56:51 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index d0b36e8a986..02847852131 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,19 @@
+==================== Dmf004 branch, patch #26.
+
+Limit memcpy inline copy to do just 2 variable moves.
+
+2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_lxvl_stxvl): New helper
+	function.
+	(expand_block_move_variable): Only do 2 variable moves per memcpy call.
+	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove
+	bumping up rs6000_memcpy_inline_bytes if -mcpu=future.
+	* config/rs6000/rs6000.opt (-param=rs6000-memcpy-inline-bytes=): Set
+	default to 32, not 16.
+
 ==================== Dmf004 branch, patch #25.
 
 Add lxvprl and stxvprl support.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:8450e72c1a3ae93b3aa7a022c8e9632fbc0adda1

commit 8450e72c1a3ae93b3aa7a022c8e9632fbc0adda1
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 16 13:55:21 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index fcc4bbbe90e..d0b36e8a986 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,19 @@
+==================== Dmf004 branch, patch #25.
+
+Add lxvprl and stxvprl support.
+
+2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_block_move_variable): Add
+	check for vect_partial_vector_usage before optimizing variable memcpys.
+	Add support for lxvprl and stxvprl if we have them.
+	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Bump up
+	memcpy inline size if we have lxvprl and stxvprl.
+	* config/rs6000/vsx.md (lxvprl): New insn.
+	(stxprl): New insn.
+
 ==================== Dmf004 branch, patch #24.
 
 Tweak variable move support.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:b530e25d13ec2cd1691d1f13b10a1fdbf9adf60b

commit b530e25d13ec2cd1691d1f13b10a1fdbf9adf60b
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 16 13:11:46 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index e0b854db699..fcc4bbbe90e 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,17 @@
+==================== Dmf004 branch, patch #24.
+
+Tweak variable move support.
+
+2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_block_move_variable): Move
+	testing whether we want to do variable moves here.  For now, limit moves
+	to 0..16 bytes.
+	(expand_block_move): Move variable tests to
+	expand_block_moves_variable.
+
 ==================== Dmf004 branch, patch #23.
 
 Don't do load/store vector with length if overlap.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:cae8a017e32eb9467b89d663800de84be1783a57

commit cae8a017e32eb9467b89d663800de84be1783a57
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 16 03:29:30 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 01dfa7e2868..e0b854db699 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,15 @@
+==================== Dmf004 branch, patch #23.
+
+Don't do load/store vector with length if overlap.
+
+2022-11-16   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_block_move): Don't do the
+	optimization to use load/store vector with length if the source and
+	destination might overlap.
+
 ==================== Dmf004 branch, patch #22.
 
 Allow for inline code for memcpy to move more than 16 bytes.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:ece06cb8df9e4265cf02ac8346a5f4c40b7c359a

commit ece06cb8df9e4265cf02ac8346a5f4c40b7c359a
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Nov 15 16:23:42 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-15   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index b755a0044ac..01dfa7e2868 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,17 @@
+==================== Dmf004 branch, patch #22.
+
+Allow for inline code for memcpy to move more than 16 bytes.
+
+2022-11-15   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (toplevel): Include optabs.h.
+	(expand_block_move_variable): New helper function, move variable byte
+	copy support here.  Add support to move more than 16 bytes.
+	(expand_block_move): Move variable copy support to
+	expand_block_move_variable.
+
 ==================== Dmf004 branch, patch #21.
 
 Add parameter for memcpy inline code moves

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:3ad6f4352ce8aafef1717b5d197a7d5ecf83a16e

commit 3ad6f4352ce8aafef1717b5d197a7d5ecf83a16e
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Nov 15 12:29:15 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-15   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index df595d768f6..3156e91906d 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,16 @@
+==================== Dmf004 branch, patch #21.
+
+Add parameter for memcpy inline code moves
+
+2022-11-15   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.opt (rs6000-memcpy-inline-bytes): New parameter,
+	set to 0.
+	* config/rs6000/rs6000-string.cc (expand_block_move): Only do
+	optimization if rs6000-memcpy-inline-bytes is 16.
+
 ==================== Dmf004 branch, patch #20.
 
 Use lxvl and stxvl for small variable memcpy moves.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:c99944842efc1a3324c49e67e66367d6c794f3cd

commit c99944842efc1a3324c49e67e66367d6c794f3cd
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Nov 14 19:59:48 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-14   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 3fa2264624b..df595d768f6 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,26 @@
+==================== Dmf004 branch, patch #20.
+
+Use lxvl and stxvl for small variable memcpy moves.
+
+This patch adds support to generate inline code for block copy with a variable
+size if the size is 16 bytes or less.  If the size is more than 16 bytes, just
+call memcpy.
+
+To handle variable sizes, I found we need DImode versions of the two insns for
+copying memory (cpymem<mode> and <movmem<mode>).
+
+2022-11-14   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-string.cc (expand_block_move): Add support for
+	using lxvl and stxvl to move up to 16 bytes inline without calling
+	memcpy.
+	* config/rs6000/rs6000.md (cpymem<mode>): Expand cpymemsi to also
+	provide cpymemdi to handle DImode sizes as well as SImode sizes.
+	(movmem<mode>): Expand movmemsi to also provide movmemdi to handle
+	DImode sizes as well as SImode sizes.
+
 ==================== Dmf004 branch, patch #17.
 
 Support load/store vector with right length.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:54a8598f5fe52994965538eea71407b9ad5a686c

commit 54a8598f5fe52994965538eea71407b9ad5a686c
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Nov 11 22:48:59 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-11   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 39 +++++++++++++++++++++++++++++++++++++--
 1 file changed, 37 insertions(+), 2 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index c910d1b5625..3fa2264624b 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,6 +1,40 @@
+==================== Dmf004 branch, patch #17.
+
+Support load/store vector with right length.
+
+This patch adds support for new instructions that may be added to the PowerPC
+architecture in the future to enhance the load and store vector with length
+instructions.
+
+The current instructions (lxvl, lxvll, stxvl, and stxvll) are inconvient to use
+since the count for the number of bytes must be in the top 8 bits of the GPR
+register, instead of the bottom 8 bits.  This meant that code generating these
+instructions typically had to do a shift left by 56 bits to get the count into
+the right position.  In a future version of the PowerPC architecture, new
+variants of these instructions might be added that expect the count to be in
+the bottom 8 bits of the GPR register.  These patches add this support to GCC
+if the user uses the -mcpu=future option.
+
+2022-11-11   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/vsx.md (lxvl): If -mcpu=future, generate the lxvl with
+	the shift count automaticaly used in the insn.
+	(lxvrl): New insn for -mcpu=future.
+	(lxvrll): Likewise.
+	(stxvl): If -mcpu=future, generate the stxvl with the shift count
+	automaticaly used in the insn.
+	(stxvrl): New insn for -mcpu=future.
+	(stxvrll): Likewise.
+
+gcc/testsuite/
+
+	* gcc.target/powerpc/lxvrl.c: New test.
+
 ==================== Dmf004 branch, patch #16.
 
-Add saturating subtract built-in.
+Add saturating subtract built-ins.
 
 This patch adds support for a saturating subtract built-in function that may be
 added to a future PowerPC processor.  Note, if it is added, the name of the
@@ -32,12 +66,13 @@ gcc/
 	built-in insn declarations.
 	(sat_sub<mode>3_dot): Likewise.
 	(sat_sub<mode>3_dot2): Likewise.
+	* doc/extend.texi (Future PowerPC built-ins): New section.
 
 gcc/testsuite/
 
 	* gcc.target/powerpc/subfus-1.c: New test.
 	* gcc.target/powerpc/subfus-2.c: Likewise.
-	* lib/target-supports.exp (check_effective_target_powerpc_subfus_ok):
+	* lib/target-supports.exp (check_effective_target_powerpc_future_ok):
 	New effective target.
 
 ==================== Dmf004 branch, patch #15.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:5525aa76ccc6351f9be35e3143a6c7bf943a68e0

commit 5525aa76ccc6351f9be35e3143a6c7bf943a68e0
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Nov 11 18:16:30 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-11   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 42 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 3ded45b2e72..c910d1b5625 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,45 @@
+==================== Dmf004 branch, patch #16.
+
+Add saturating subtract built-in.
+
+This patch adds support for a saturating subtract built-in function that may be
+added to a future PowerPC processor.  Note, if it is added, the name of the
+built-in function may change before GCC 13 is released.  If the name changes, we
+will submit a patch changing the name.
+
+I did add support for providing dense math built-in functions, even though at
+present, we have not added any new built-in functions for dense math.
+
+2022-11-11   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add support
+	for flagging invalid use of future built-in functions.
+	(rs6000_builtin_is_supported): Add support for future built-in
+	functions.
+	* config/rs6000/rs6000-builtins.def (__builtin_saturate_subtract32): New
+	built-in function for -mcpu=future.
+	(__builtin_saturate_subtract64): Likewise.
+	* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add stanzas
+	for -mcpu=future built-ins.
+	(stanza_map): Likewise.
+	(enable_string): Likewise.
+	(struct attrinfo): Likewise.
+	(parse_bif_attrs): Likewise.
+	(write_decls): Likewise.
+	* config/rs6000/rs6000.md (sat_sub<mode>3): Add saturating subtract
+	built-in insn declarations.
+	(sat_sub<mode>3_dot): Likewise.
+	(sat_sub<mode>3_dot2): Likewise.
+
+gcc/testsuite/
+
+	* gcc.target/powerpc/subfus-1.c: New test.
+	* gcc.target/powerpc/subfus-2.c: Likewise.
+	* lib/target-supports.exp (check_effective_target_powerpc_subfus_ok):
+	New effective target.
+
 ==================== Dmf004 branch, patch #15.
 
 Add support for 1,024 bit DMR registers.

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:f07d7a640f42d4f00cdf0a535a5bb0ad20ab42e0

commit f07d7a640f42d4f00cdf0a535a5bb0ad20ab42e0
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 9 17:39:55 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 0c43af20d62..3ded45b2e72 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -55,7 +55,7 @@ gcc/testsuite/
 
 Switch to dense math names for all MMA operations.
 
-2022-11-04   Michael Meissner  <meissner@linux.ibm.com>
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
 
 gcc/

[gcc(refs/users/meissner/heads/dmf004)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:539e5cf18d507b3a5b57a8597cfd8f6bc9985157

commit 539e5cf18d507b3a5b57a8597cfd8f6bc9985157
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 9 00:58:09 2022 -0500

    Update ChangeLog.meissner.
    
    2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 237 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 237 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 5a6fa542ab6..0c43af20d62 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,240 @@
+==================== Dmf004 branch, patch #15.
+
+Add support for 1,024 bit DMR registers.
+
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (UNSPEC_DM_INSERT512_UPPER): New unspec.
+	(UNSPEC_DM_INSERT512_LOWER): Likewise.
+	(UNSPEC_DM_EXTRACT512): Likewise.
+	(UNSPEC_DMR_RELOAD_FROM_MEMORY): Likewise.
+	(UNSPEC_DMR_RELOAD_TO_MEMORY): Likewise.
+	(movtdo): New define_expand and define_insn_and_split to implement 1,024
+	bit DMR registers.
+	(movtdo_insert512_upper): New insn.
+	(movtdo_insert512_lower): Likewise.
+	(movtdo_extract512): Likewise.
+	(reload_dmr_from_memory): Likewise.
+	(reload_dmr_to_memory): Likewise.
+	* config/rs6000/rs6000-builtin.cc (rs6000_type_string): Add DMR
+	support.
+	(rs6000_init_builtins): Add support for __dmr keyword.
+	* config/rs6000/rs6000-call.cc (rs6000_return_in_memory): Add support
+	for TDOmode.
+	(rs6000_function_arg): Likewise.
+	* config/rs6000/rs6000-modes.def (TDOmode): New mode.
+	* config/rs6000/rs6000.cc (rs6000_hard_regno_nregs_internal): Add
+	support for TDOmode.
+	(rs6000_hard_regno_mode_ok_uncached): Likewise.
+	(rs6000_hard_regno_mode_ok): Likewise.
+	(rs6000_modes_tieable_p): Likewise.
+	(rs6000_debug_reg_global): Likewise.
+	(rs6000_setup_reg_addr_masks): Likewise.
+	(rs6000_init_hard_regno_mode_ok): Add support for TDOmode.  Setup reload
+	hooks for DMR mode.
+	(reg_offset_addressing_ok_p): Add support for TDOmode.
+	(rs6000_emit_move): Likewise.
+	(rs6000_secondary_reload_simple_move): Likewise.
+	(rs6000_secondary_reload_class): Likewise.
+	(rs6000_mangle_type): Add mangling for __dmr type.
+	(rs6000_dmr_register_move_cost): Add support for TDOmode.
+	(rs6000_split_multireg_move): Likewise.
+	(rs6000_invalid_conversion): Likewise.
+	* config/rs6000/rs6000.h (VECTOR_ALIGNMENT_P): Add TDOmode.
+	(enum rs6000_builtin_type_index): Add DMR type nodes.
+	(dmr_type_node): Likewise.
+	(ptr_dmr_type_node): Likewise.
+
+gcc/testsuite/
+
+	* gcc.target/powerpc/dm-1024bit.c: New test.
+
+==================== Dmf004 branch, patch #14.
+
+Switch to dense math names for all MMA operations.
+
+2022-11-04   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (vvi4i4i8_dm): New int attribute.
+	(avvi4i4i8_dm): Likewise.
+	(vvi4i4i2_dm): Likewise.
+	(avvi4i4i2_dm): Likewise.
+	(vvi4i4_dm): Likewise.
+	(avvi4i4_dm): Likewise.
+	(pvi4i2_dm): Likewise.
+	(apvi4i2_dm): Likewise.
+	(vvi4i4i4_dm): Likewise.
+	(avvi4i4i4_dm): Likewise.
+	(mma_<vv>): Add support for running on DMF systems, generating the dense
+	math instruction and using the dense math accumulators.
+	(mma_<avv>): Likewise.
+	(mma_<pv>): Likewise.
+	(mma_<apv>): Likewise.
+	(mma_<vvi4i4i8>): Likewise.
+	(mma_<avvi4i4i8>): Likewise.
+	(mma_<vvi4i4i2>): Likewise.
+	(mma_<avvi4i4i2>): Likewise.
+	(mma_<vvi4i4>): Likewise.
+	(mma_<avvi4i4): Likewise.
+	(mma_<pvi4i2>): Likewise.
+	(mma_<apvi4i2): Likewise.
+	(mma_<vvi4i4i4>): Likewise.
+	(mma_<avvi4i4i4>): Likewise.
+
+gcc/testsuite/
+
+	* gcc.target/powerpc/dm-double-test.c: New test.
+	* lib/target-supports.exp (check_effective_target_ppc_dmr_ok): New
+	target test.
+
+==================== Dmf004 branch, patch #13.
+
+Make MMA insns support dmr registers.
+
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (mma_<acc>): New define_expand to handle
+	mma_<acc> for dense math and non dense math.
+	(mma_<acc> insn): Restrict to non dense math.
+	(mma_xxsetaccz): Convert to define_expand to handle non dense math and
+	dense math.
+	(mma_xxsetaccz_p10): Rename from mma_xxsetaccz and restrict usage to non
+	dense math.
+	(mma_xxsetaccz_dm): Dense math version of mma_xxsetaccz.
+	(mma_<vv>): Add support for dense math.
+	(mma_<avv>): Likewise.
+	(mma_<pv>): Likewise.
+	(mma_<apv>): Likewise.
+	(mma_<vvi4i4i8>): Likewise.
+	(mma_<avvi4i4i8>): Likewise.
+	(mma_<vvi4i4i2>): Likewise.
+	(mma_<avvi4i4i2>): Likewise.
+	(mma_<vvi4i4>): Likewise.
+	(mma_<avvi4i4>): Likewise.
+	(mma_<pvi4i2>): Likewise.
+	(mma_<apvi4i2>): Likewise.
+	(mma_<vvi4i4i4>): Likewise.
+	(mma_<avvi4i4i4>): Likewise.
+	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
+	__PPC_DMR__ if we have dense math instructions.
+	* config/rs6000/rs6000.cc (print_operand): Make %A handle only DMRs if
+	dense math and only FPRs if not dense math.
+	(rs6000_split_multireg_move): Do not generate accumulator prime or
+	de-prime instructions if dense math.
+
+==================== Dmf004 branch, patch #12.
+
+Add support for accumulators in DMR registers.
+
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/constraints.md (wD constraint): New constraint.
+	* config/rs6000/mma.md (UNSPEC_DM_ASSEMBLE_ACC): New unspec.
+	(movxo): Convert into define_expand.
+	(movxo_fpr): Version of movxo where accumulators overlap with FPRs.
+	(movxo_dm): Dense math version of movxo.
+	(mma_assemble_acc): Add dense match support to define_expand.
+	(mma_assemble_acc_fpr): Rename from mma_assemble_acc, and restrict it to
+	non dense math.
+	(mma_assemble_acc_dm): Dense math version of mma_assemble_acc.
+	(mma_disassemble_acc): Add dense math support to define_expand.
+	(mma_disassemble_acc_fpr): Rename from mma_disassemble_acc, and restrict
+	it to non dense math.
+	(mma_disassemble_acc_dm): Dense math version of mma_disassemble_acc.
+	* config/rs6000/predicates.md (dmr_operand): New predicate.
+	(accumulator_operand): Likewise.
+	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): Add -mdense-math.
+	(POWERPC_MASKS): Likewise.
+	* config/rs6000/rs6000.cc (enum rs6000_reg_type): Add DMR_REG_TYPE.
+	(enum rs6000_reload_reg_type): Add RELOAD_REG_DMR.
+	(LAST_RELOAD_REG_CLASS): Add support for DMR registers.
+	(reload_reg_map): Likewise.
+	(rs6000_reg_names): Likewise.
+	(alt_reg_names): Likewise.
+	(rs6000_hard_regno_nregs_internal): Likewise.
+	(rs6000_hard_regno_mode_ok_uncached): Likewise.
+	(rs6000_debug_reg_global): Likewise.
+	(rs6000_setup_reg_addr_masks): Likewise.
+	(rs6000_init_hard_regno_mode_ok): Likewise.
+	(rs6000_option_override_internal): Add checking for -mdense-math.
+	(rs6000_secondary_reload_memory): Add support for DMR registers.
+	(rs6000_secondary_reload_simple_move): Likewise.
+	(rs6000_preferred_reload_class): Likewise.
+	(rs6000_secondary_reload_class): Likewise.
+	(print_operand): Make %A handle both FPRs and DMRs.
+	(rs6000_dmr_register_move_cost): New helper function.
+	(rs6000_register_move_cost): Add support for DMR registers.
+	(rs6000_memory_move_cost): Likewise.
+	(rs6000_compute_pressure_classes): Likewise.
+	(rs6000_debugger_regno): Likewise.
+	(rs6000_opt_masks): Add -mdense-math.
+	(rs6000_split_multireg_move): Add support for DMRs.
+	* config/rs6000/rs6000.h (UNITS_PER_DMR_WORD): New macro.
+	(FIRST_PSEUDO_REGISTER): Update for DMRs.
+	(FIXED_REGISTERS): Add DMRs.
+	(CALL_REALLY_USED_REGISTERS): Likewise.
+	(REG_ALLOC_ORDER): Likewise.
+	(enum reg_class): Add DM_REGS.
+	(REG_CLASS_NAMES): Likewise.
+	(REG_CLASS_CONTENTS): Likewise.
+	* config/rs6000/rs6000.md (FIRST_DMR_REGNO): New constant.
+	(LAST_DMR_REGNO): Likewise.
+	(isa attribute): Add 'dm' and 'not_dm' attributes.
+	(enabled attribute): Support 'dm' and 'not_dm' attributes.
+	* config/rs6000/rs6000.opt (-mdense-math): New switch.
+	* doc/md.texi (PowerPC constraints): Document wD constraint.
+
+==================== Dmf004 branch, patch #11.
+
+Make -mcpu=future enable -mblock-ops-vector-pair.
+
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): Add
+	-mblock-ops-vector-pair.
+	(POWERPC_MASKS): Likewise.
+
+==================== Dmf004 branch, patch #10.
+
+Add -mcpu=future.
+
+2022-11-09   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
+	__ARCH_PWR_FUTURE__ if -mcpu=future.
+	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): New macro.
+	(POWERPC_MASKS): Add -mfuture.
+	* config/rs6000/rs6000-opts.h (enum processor_type): Add
+	PROCESSOR_FUTURE.
+	* config/rs6000/rs6000-tables.opt: Regenerate.
+	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Add
+	-mcpu=future support.  Make -mtune=future act like -mtune=power10 for
+	now.
+	(rs6000_machine_from_flags): Likewise.
+	(rs6000_reassociation_width): Likewise.
+	(rs6000_adjust_cost): Likewise.
+	(rs6000_issue_rate): Likewise.
+	(rs6000_sched_reorder): Likewise.
+	(rs6000_sched_reorder2): Likewise.
+	(rs6000_register_move_cost): Likewise.
+	(rs6000_opt_masks): Add -mfuture.
+	* config/rs6000/rs6000.h (ASM_CPU_SUPPORT): Likewise.
+	* config/rs6000/rs6000.opt (-mfuture): New undocumented debug switch.
+	* config/rs6000/rs6000.md (cpu attribute): Add -mcpu=future support.
+	* doc/invoke.texi (IBM RS/6000 and PowerPC Options): Document -mcpu=future.
+
 ==================== Dmf004 branch, patch #4.
 
 Patch libgcc to always use _Float128 and _Complex _Float128 on PowerPC.