From: Robin Dapp <rdapp.gcc@gmail.com>
To: "juzhe.zhong@rivai.ai" <juzhe.zhong@rivai.ai>,
"cooper.joshua" <cooper.joshua@linux.alibaba.com>,
gcc-patches <gcc-patches@gcc.gnu.org>
Cc: rdapp.gcc@gmail.com, Jim Wilson <jim.wilson.gcc@gmail.com>,
palmer <palmer@dabbelt.com>, andrew <andrew@sifive.com>,
"philipp.tomsich" <philipp.tomsich@vrull.eu>,
jeffreyalaw <jeffreyalaw@gmail.com>,
"christoph.muellner" <christoph.muellner@vrull.eu>,
jinma <jinma@linux.alibaba.com>,
"cooper.qu" <cooper.qu@linux.alibaba.com>
Subject: Re: [PATCH v5] RISC-V: Fix register overlap issue for some xtheadvector instructions
Date: Thu, 11 Jan 2024 09:12:56 +0100 [thread overview]
Message-ID: <07f49bbc-c951-4e02-81c2-a4d6d22d8bb0@gmail.com> (raw)
In-Reply-To: <84224FB762A3D832+202401111046250922110@rivai.ai>
LGTM now, thanks. I find it much more readable that way.
Regards
Robin
next prev parent reply other threads:[~2024-01-11 8:13 UTC|newest]
Thread overview: 130+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-29 4:03 [PATCH v4] RISC-V: Support XTheadVector extension Jun Sha (Joshua)
2023-12-29 4:05 ` [PATCH v4] RISC-V: Refactor riscv-vector-builtins-bases.cc Jun Sha (Joshua)
2023-12-29 4:06 ` [PATCH v4] RISC-V: Change csr_operand into Jun Sha (Joshua)
2023-12-29 4:10 ` [PATCH v4] RISC-V: Change csr_operand into vector_length_operand for vsetvl patterns Jun Sha (Joshua)
2024-01-02 1:35 ` juzhe.zhong
2024-01-02 19:50 ` Christoph Müllner
2024-01-02 1:35 ` [PATCH v4] RISC-V: Change csr_operand into juzhe.zhong
2023-12-29 4:13 ` [PATCH v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0 Jun Sha (Joshua)
2024-01-04 9:28 ` Jun Sha (Joshua)
2023-12-29 4:19 ` [PATCH v4] RISC-V: Adds the prefix "th." for the instructions of XTheadVector Jun Sha (Joshua)
2023-12-31 17:43 ` Jeff Law
2024-01-01 22:57 ` 钟居哲
2024-01-03 2:54 ` Andrew Pinski
2024-01-03 3:06 ` juzhe.zhong
2024-01-03 3:19 ` Andrew Pinski
2024-01-03 3:25 ` juzhe.zhong
2024-01-03 3:32 ` Andrew Pinski
2024-01-03 3:32 ` Kito Cheng
2024-01-04 9:15 ` Re：Re: " joshua
2024-01-04 9:18 ` juzhe.zhong
2024-01-04 10:04 ` Christoph Müllner
2024-01-08 2:11 ` Re：Re: " joshua
2024-01-08 3:06 ` Kito Cheng
2024-01-08 3:17 ` Re：Re: " joshua
2024-01-08 3:40 ` Kito Cheng
2024-01-10 3:01 ` Re：Re: " joshua
2024-01-03 6:08 ` Jun Sha (Joshua)
2024-01-08 23:04 ` 钟居哲
2024-01-09 17:49 ` Jeff Law
2024-01-09 22:35 ` 钟居哲
2023-12-29 4:21 ` [PATCH v4] RISC-V: Handle differences between XTheadvector and Vector Jun Sha (Joshua)
2024-01-02 2:00 ` juzhe.zhong
2024-01-02 3:03 ` Re：[PATCH " joshua
2024-01-02 3:10 ` juzhe.zhong
2024-01-02 3:40 ` Re：Re：[PATCH " joshua
2024-01-02 3:41 ` Re：[PATCH " juzhe.zhong
2024-01-02 9:48 ` joshua
2024-01-02 9:52 ` juzhe.zhong
2024-01-02 12:39 ` [PATCH " Jun Sha (Joshua)
2024-01-03 3:11 ` Kito Cheng
2024-01-03 6:15 ` Jun Sha (Joshua)
2024-01-04 2:29 ` Jun Sha (Joshua)
2024-01-09 3:18 ` [PATCH v5] " Jun Sha (Joshua)
2024-01-09 22:33 ` 钟居哲
2024-01-10 2:22 ` Jun Sha (Joshua)
2024-01-10 2:34 ` juzhe.zhong
2024-01-10 2:57 ` Re：[PATCH " joshua
2024-01-10 3:02 ` juzhe.zhong
2024-01-10 6:54 ` juzhe.zhong
2024-01-10 7:01 ` juzhe.zhong
2024-01-10 7:16 ` Re：Re：[PATCH " joshua
2024-01-10 7:17 ` Re：[PATCH " juzhe.zhong
2024-01-10 7:26 ` 回复：Re：[PATCH " joshua
2024-01-10 7:31 ` 回复：[PATCH " juzhe.zhong
2024-01-10 7:28 ` Re：Re：[PATCH " joshua
2024-01-11 11:03 ` [PATCH " Jun Sha (Joshua)
2024-01-08 23:08 ` [PATCH v4] " 钟居哲
2024-01-09 2:12 ` Re：[PATCH " joshua
2024-01-09 3:23 ` joshua
2023-12-29 4:21 ` [PATCH v4 6/6] RISC-V: Add support for xtheadvector-specific intrinsics Jun Sha (Joshua)
2024-01-04 2:34 ` [PATCH v4] " Jun Sha (Joshua)
2024-01-10 9:27 ` [PATCH v5] " Jun Sha (Joshua)
2024-01-10 9:35 ` juzhe.zhong
2024-01-10 9:55 ` Re：[PATCH " joshua
2024-01-10 10:03 ` juzhe.zhong
2024-01-10 10:57 ` Re：Re：[PATCH " joshua
2024-01-10 9:31 ` [PATCH " Jun Sha (Joshua)
2024-01-11 8:46 ` Jun Sha (Joshua)
2024-01-11 9:07 ` juzhe.zhong
2024-01-11 9:11 ` Re：[PATCH " joshua
2024-01-11 9:14 ` joshua
2024-01-11 9:17 ` juzhe.zhong
2024-01-11 9:21 ` Re：Re：[PATCH " joshua
2024-01-11 9:24 ` Re：[PATCH " juzhe.zhong
2024-01-11 9:29 ` Re：Re：[PATCH " joshua
2024-01-11 9:32 ` Re：[PATCH " juzhe.zhong
2024-01-11 9:38 ` Re：Re：[PATCH " joshua
2024-01-11 12:05 ` joshua
2024-01-11 12:13 ` Re：[PATCH " juzhe.zhong
2024-01-11 12:18 ` Re：Re：[PATCH " joshua
2024-01-11 12:28 ` Re：[PATCH " juzhe.zhong
2024-01-11 12:31 ` Re：Re：[PATCH " joshua
2024-01-11 12:33 ` Re：[PATCH " juzhe.zhong
2024-01-11 12:36 ` Re：Re：[PATCH " joshua
2024-01-11 9:26 ` joshua
2024-01-11 9:28 ` Re：[PATCH " juzhe.zhong
2024-01-11 9:35 ` Re：Re：[PATCH " joshua
2024-01-11 9:54 ` Re：[PATCH " joshua
2024-01-11 9:52 ` [PATCH " Jun Sha (Joshua)
2024-01-11 9:57 ` juzhe.zhong
2024-01-11 10:54 ` Re：[PATCH " joshua
2024-01-11 10:55 ` juzhe.zhong
2024-01-11 14:11 ` Re：Re：[PATCH " joshua
2024-01-11 22:59 ` Re：[PATCH " 钟居哲
2024-01-11 23:22 ` 钟居哲
2024-01-12 0:49 ` 回复：Re：[PATCH " joshua
2024-01-12 1:08 ` 回复：[PATCH " juzhe.zhong
2024-01-12 1:14 ` juzhe.zhong
2024-01-12 3:26 ` Re：Re：[PATCH " joshua
2024-01-03 2:37 ` [PATCH v4] RISC-V: Fix register overlap issue for some xtheadvector instructions Jun Sha (Joshua)
2024-01-03 7:54 ` Jun Sha (Joshua)
2024-01-10 6:02 ` [PATCH v5] " Jun Sha (Joshua)
2024-01-10 6:37 ` juzhe.zhong
2024-01-10 6:51 ` Jun Sha (Joshua)
2024-01-10 6:53 ` juzhe.zhong
2024-01-10 13:36 ` Robin Dapp
2024-01-10 13:43 ` 钟居哲
2024-01-11 2:40 ` Re：Re: " joshua
2024-01-11 2:39 ` Jun Sha (Joshua)
2024-01-11 2:46 ` juzhe.zhong
2024-01-11 8:12 ` Robin Dapp [this message]
2024-01-03 2:39 ` [PATCH v4] RISC-V: Rewrite some instructions using ASM targethook Jun Sha (Joshua)
2024-01-03 3:05 ` Kito Cheng
2024-01-03 7:55 ` Jun Sha (Joshua)
2024-01-12 3:18 ` [PATCH v5] RISC-V: Support XTheadVector extension Jun Sha (Joshua)
2024-01-12 3:20 ` [PATCH v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0 Jun Sha (Joshua)
2024-01-12 7:31 ` juzhe.zhong
2024-01-18 9:50 ` Kito Cheng
2024-01-12 3:21 ` [PATCH v5] RISC-V: Adds the prefix "th." for the instructions of XTheadVector Jun Sha (Joshua)
2024-01-12 7:31 ` juzhe.zhong
2024-01-12 3:22 ` [PATCH v6] RISC-V: Handle differences between XTheadvector and Vector Jun Sha (Joshua)
2024-01-12 7:31 ` juzhe.zhong
2024-01-12 3:22 ` [PATCH v6] RISC-V: Add support for xtheadvector-specific intrinsics Jun Sha (Joshua)
2024-01-12 7:32 ` juzhe.zhong
2024-01-12 3:23 ` [PATCH v6] RISC-V: Fix register overlap issue for some xtheadvector instructions Jun Sha (Joshua)
2024-01-12 7:32 ` juzhe.zhong
2024-01-12 3:24 ` [PATCH v5] RISC-V: Rewrite some instructions using ASM targethook Jun Sha (Joshua)
2024-01-12 7:32 ` juzhe.zhong
2024-01-18 14:43 ` [PATCH v5] RISC-V: Support XTheadVector extension Christoph Müllner
2024-01-19 20:03 ` Jeff Law
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